d028f626de0494d70db973ecee58bc0162818332
[sitara-epos/sitara-epos-kernel.git] / drivers / net / ethernet / ti / cpsw.c
1 /*
2  * Texas Instruments Ethernet Switch Driver
3  *
4  * Copyright (C) 2010 Texas Instruments
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License as
8  * published by the Free Software Foundation version 2.
9  *
10  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11  * kind, whether express or implied; without even the implied warranty
12  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  */
15 #include <linux/kernel.h>
16 #include <linux/io.h>
17 #include <linux/clk.h>
18 #include <linux/timer.h>
19 #include <linux/module.h>
20 #include <linux/platform_device.h>
21 #include <linux/if_ether.h>
22 #include <linux/etherdevice.h>
23 #include <linux/ethtool.h>
24 #include <linux/netdevice.h>
25 #include <linux/phy.h>
26 #include <linux/workqueue.h>
27 #include <linux/delay.h>
28 #include <linux/interrupt.h>
30 #include <linux/cpsw.h>
32 #include "cpsw_ale.h"
33 #include "davinci_cpdma.h"
36 #define CPSW_DEBUG      (NETIF_MSG_HW           | NETIF_MSG_WOL         | \
37                          NETIF_MSG_DRV          | NETIF_MSG_LINK        | \
38                          NETIF_MSG_IFUP         | NETIF_MSG_INTR        | \
39                          NETIF_MSG_PROBE        | NETIF_MSG_TIMER       | \
40                          NETIF_MSG_IFDOWN       | NETIF_MSG_RX_ERR      | \
41                          NETIF_MSG_TX_ERR       | NETIF_MSG_TX_DONE     | \
42                          NETIF_MSG_PKTDATA      | NETIF_MSG_TX_QUEUED   | \
43                          NETIF_MSG_RX_STATUS)
45 #define msg(level, type, format, ...)                           \
46 do {                                                            \
47         if (netif_msg_##type(priv) && net_ratelimit())          \
48                 dev_##level(priv->dev, format, ## __VA_ARGS__); \
49 } while (0)
51 #define CPDMA_RXTHRESH          0x0c0
52 #define CPDMA_RXFREE            0x0e0
53 #define CPDMA_TXHDP_VER1        0x100
54 #define CPDMA_TXHDP_VER2        0x200
55 #define CPDMA_RXHDP_VER1        0x120
56 #define CPDMA_RXHDP_VER2        0x220
57 #define CPDMA_TXCP_VER1         0x140
58 #define CPDMA_TXCP_VER2         0x240
59 #define CPDMA_RXCP_VER1         0x160
60 #define CPDMA_RXCP_VER2         0x260
62 #define CPSW_POLL_WEIGHT        64
63 #define CPSW_MIN_PACKET_SIZE    60
64 #define CPSW_MAX_PACKET_SIZE    (1500 + 14 + 4 + 4)
66 #define CPSW_PHY_SPEED          1000
68 #define CPSW_IRQ_QUIRK
69 #ifdef CPSW_IRQ_QUIRK
70 #define cpsw_enable_irq(priv)   \
71         do {                    \
72                 u32 i;          \
73                 for (i = 0; i < priv->num_irqs; i++) \
74                         enable_irq(priv->irqs_table[i]); \
75         } while (0);
76 #define cpsw_disable_irq(priv)  \
77         do {                    \
78                 u32 i;          \
79                 for (i = 0; i < priv->num_irqs; i++) \
80                         disable_irq_nosync(priv->irqs_table[i]); \
81         } while (0);
82 #else
83 #define cpsw_enable_irq(priv) do { } while (0);
84 #define cpsw_disable_irq(priv) do { } while (0);
85 #endif
87 static int debug_level;
88 module_param(debug_level, int, 0);
89 MODULE_PARM_DESC(debug_level, "cpsw debug level (NETIF_MSG bits)");
91 static int ale_ageout = 10;
92 module_param(ale_ageout, int, 0);
93 MODULE_PARM_DESC(ale_ageout, "cpsw ale ageout interval (seconds)");
95 static int rx_packet_max = CPSW_MAX_PACKET_SIZE;
96 module_param(rx_packet_max, int, 0);
97 MODULE_PARM_DESC(rx_packet_max, "maximum receive packet size (bytes)");
99 struct cpsw_ss_regs {
100         u32     id_ver;
101         u32     soft_reset;
102         u32     control;
103         u32     int_control;
104         u32     rx_thresh_en;
105         u32     rx_en;
106         u32     tx_en;
107         u32     misc_en;
108 };
110 struct cpsw_regs {
111         u32     id_ver;
112         u32     control;
113         u32     soft_reset;
114         u32     stat_port_en;
115         u32     ptype;
116 };
118 struct cpsw_slave_regs {
119         u32     max_blks;
120         u32     blk_cnt;
121         u32     flow_thresh;
122         u32     port_vlan;
123         u32     tx_pri_map;
124         u32     ts_seq_mtype;
125 #ifdef CONFIG_ARCH_TI814X
126         u32     ts_ctl;
127         u32     ts_seq_ltype;
128         u32     ts_vlan;
129 #endif
130         u32     sa_lo;
131         u32     sa_hi;
132 };
134 struct cpsw_host_regs {
135         u32     max_blks;
136         u32     blk_cnt;
137         u32     flow_thresh;
138         u32     port_vlan;
139         u32     tx_pri_map;
140         u32     cpdma_tx_pri_map;
141         u32     cpdma_rx_chan_map;
142 };
144 struct cpsw_sliver_regs {
145         u32     id_ver;
146         u32     mac_control;
147         u32     mac_status;
148         u32     soft_reset;
149         u32     rx_maxlen;
150         u32     __reserved_0;
151         u32     rx_pause;
152         u32     tx_pause;
153         u32     __reserved_1;
154         u32     rx_pri_map;
155 };
157 struct cpsw_hw_stats {
158         u32     rxgoodframes;
159         u32     rxbroadcastframes;
160         u32     rxmulticastframes;
161         u32     rxpauseframes;
162         u32     rxcrcerrors;
163         u32     rxaligncodeerrors;
164         u32     rxoversizedframes;
165         u32     rxjabberframes;
166         u32     rxundersizedframes;
167         u32     rxfragments;
168         u32     __pad_0[2];
169         u32     rxoctets;
170         u32     txgoodframes;
171         u32     txbroadcastframes;
172         u32     txmulticastframes;
173         u32     txpauseframes;
174         u32     txdeferredframes;
175         u32     txcollisionframes;
176         u32     txsinglecollframes;
177         u32     txmultcollframes;
178         u32     txexcessivecollisions;
179         u32     txlatecollisions;
180         u32     txunderrun;
181         u32     txcarriersenseerrors;
182         u32     txoctets;
183         u32     octetframes64;
184         u32     octetframes65t127;
185         u32     octetframes128t255;
186         u32     octetframes256t511;
187         u32     octetframes512t1023;
188         u32     octetframes1024tup;
189         u32     netoctets;
190         u32     rxsofoverruns;
191         u32     rxmofoverruns;
192         u32     rxdmaoverruns;
193 };
195 struct cpsw_slave {
196         struct cpsw_slave_regs __iomem  *regs;
197         struct cpsw_sliver_regs __iomem *sliver;
198         int                             slave_num;
199         u32                             mac_control;
200         struct cpsw_slave_data          *data;
201         struct phy_device               *phy;
202 };
204 struct cpsw_priv {
205         spinlock_t                      lock;
206         struct platform_device          *pdev;
207         struct net_device               *ndev;
208         struct resource                 *cpsw_res;
209         struct resource                 *cpsw_ss_res;
210         struct napi_struct              napi;
211 #define napi_to_priv(napi)      container_of(napi, struct cpsw_priv, napi)
212         struct device                   *dev;
213         struct cpsw_platform_data       data;
214         struct cpsw_regs __iomem        *regs;
215         struct cpsw_ss_regs __iomem     *ss_regs;
216         struct cpsw_hw_stats __iomem    *hw_stats;
217         struct cpsw_host_regs __iomem   *host_port_regs;
218         u32                             msg_enable;
219         struct net_device_stats         stats;
220         int                             rx_packet_max;
221         int                             host_port;
222         struct clk                      *clk;
223         u8                              mac_addr[ETH_ALEN];
224         struct cpsw_slave               *slaves;
225 #define for_each_slave(priv, func, arg...)                      \
226         do {                                                    \
227                 int idx;                                        \
228                 for (idx = 0; idx < (priv)->data.slaves; idx++) \
229                         (func)((priv)->slaves + idx, ##arg);    \
230         } while (0)
232         struct cpdma_ctlr               *dma;
233         struct cpdma_chan               *txch, *rxch;
234         struct cpsw_ale                 *ale;
236 #ifdef CPSW_IRQ_QUIRK
237         /* snapshot of IRQ numbers */
238         u32 irqs_table[4];
239         u32 num_irqs;
240 #endif
242 };
244 static void cpsw_intr_enable(struct cpsw_priv *priv)
246         __raw_writel(0xFF, &priv->ss_regs->tx_en);
247         __raw_writel(0xFF, &priv->ss_regs->rx_en);
249         cpdma_ctlr_int_ctrl(priv->dma, true);
250         return;
253 static void cpsw_intr_disable(struct cpsw_priv *priv)
255         __raw_writel(0, &priv->ss_regs->tx_en);
256         __raw_writel(0, &priv->ss_regs->rx_en);
258         cpdma_ctlr_int_ctrl(priv->dma, false);
259         return;
262 void cpsw_tx_handler(void *token, int len, int status)
264         struct sk_buff          *skb = token;
265         struct net_device       *ndev = skb->dev;
266         struct cpsw_priv        *priv = netdev_priv(ndev);
268         if (unlikely(netif_queue_stopped(ndev)))
269                 netif_start_queue(ndev);
270         priv->stats.tx_packets++;
271         priv->stats.tx_bytes += len;
272         dev_kfree_skb_any(skb);
275 void cpsw_rx_handler(void *token, int len, int status)
277         struct sk_buff          *skb = token;
278         struct net_device       *ndev = skb->dev;
279         struct cpsw_priv        *priv = netdev_priv(ndev);
280         int                     ret = 0;
282         if (likely(status >= 0)) {
283                 skb_put(skb, len);
284                 skb->protocol = eth_type_trans(skb, ndev);
285                 netif_receive_skb(skb);
286                 priv->stats.rx_bytes += len;
287                 priv->stats.rx_packets++;
288                 skb = NULL;
289         }
292         if (unlikely(!netif_running(ndev))) {
293                 if (skb)
294                         dev_kfree_skb_any(skb);
295                 return;
296         }
298         if (likely(!skb)) {
299                 skb = netdev_alloc_skb_ip_align(ndev, priv->rx_packet_max);
300                 if (WARN_ON(!skb))
301                         return;
303                 ret = cpdma_chan_submit(priv->rxch, skb, skb->data,
304                                 skb_tailroom(skb), GFP_KERNEL);
305         }
307         WARN_ON(ret < 0);
311 static irqreturn_t cpsw_interrupt(int irq, void *dev_id)
313         struct cpsw_priv *priv = dev_id;
315         if (likely(netif_running(priv->ndev))) {
316                 cpsw_intr_disable(priv);
317                 cpsw_disable_irq(priv);
318                 napi_schedule(&priv->napi);
319         }
322         return IRQ_HANDLED;
325 static int cpsw_poll(struct napi_struct *napi, int budget)
327         struct cpsw_priv        *priv = napi_to_priv(napi);
328         int                     num_tx, num_rx;
331         num_tx = cpdma_chan_process(priv->txch, 128);
332         num_rx = cpdma_chan_process(priv->rxch, budget);
334         if (num_rx || num_tx)
335                 msg(dbg, intr, "poll %d rx, %d tx pkts\n", num_rx, num_tx);
338         if (num_rx < budget) {
339                 napi_complete(napi);
340                 cpdma_ctlr_eoi(priv->dma);
341                 cpsw_intr_enable(priv);
342                 cpsw_enable_irq(priv);
343         }
345         return num_rx;
348 static inline void soft_reset(const char *module, void __iomem *reg)
350         unsigned long timeout = jiffies + HZ;
352         __raw_writel(1, reg);
353         do {
354                 cpu_relax();
355         } while ((__raw_readl(reg) & 1) && time_after(timeout, jiffies));
357         WARN(__raw_readl(reg) & 1, "failed to soft-reset %s\n", module);
360 #define mac_hi(mac)     (((mac)[0] << 0) | ((mac)[1] << 8) |    \
361                          ((mac)[2] << 16) | ((mac)[3] << 24))
362 #define mac_lo(mac)     (((mac)[4] << 0) | ((mac)[5] << 8))
364 static void cpsw_set_slave_mac(struct cpsw_slave *slave,
365                                struct cpsw_priv *priv)
367         __raw_writel(mac_hi(priv->mac_addr), &slave->regs->sa_hi);
368         __raw_writel(mac_lo(priv->mac_addr), &slave->regs->sa_lo);
371 static inline u32 cpsw_get_slave_port(struct cpsw_priv *priv, u32 slave_num)
373         if (priv->host_port == 0)
374                 return slave_num + 1;
375         else
376                 return slave_num;
379 static void _cpsw_adjust_link(struct cpsw_slave *slave,
380                               struct cpsw_priv *priv, bool *link)
382         struct phy_device       *phy = slave->phy;
383         u32                     mac_control = 0;
384         u32                     slave_port;
386         if (!phy)
387                 return;
389         slave_port = cpsw_get_slave_port(priv, slave->slave_num);
391         if (phy->link) {
392                 /* enable forwarding */
393                 cpsw_ale_control_set(priv->ale, slave_port,
394                         ALE_PORT_STATE, ALE_PORT_STATE_FORWARD);
396                 mac_control = priv->data.mac_control;
397                 if (phy->speed == 10)
398                         mac_control |= BIT(18); /* In Band mode */
399                 if (phy->speed == 1000) {
400                         mac_control |= BIT(7);  /* Enable gigabit mode */
401                 }
402                 if (phy->speed == 100)
403                         mac_control |= BIT(15);
404                 if (phy->duplex)
405                         mac_control |= BIT(0);  /* FULLDUPLEXEN */
406                 if (phy->interface == PHY_INTERFACE_MODE_RGMII) /* RGMII */
407                         mac_control |= (BIT(15)|BIT(16));
408                 *link = true;
409         } else {
410                 cpsw_ale_control_set(priv->ale, slave_port,
411                              ALE_PORT_STATE, ALE_PORT_STATE_DISABLE);
412                 mac_control = 0;
413         }
415         if (mac_control != slave->mac_control) {
416                 phy_print_status(phy);
417                 __raw_writel(mac_control, &slave->sliver->mac_control);
418         }
420         slave->mac_control = mac_control;
423 static void cpsw_adjust_link(struct net_device *ndev)
425         struct cpsw_priv        *priv = netdev_priv(ndev);
426         bool                    link = false;
428         for_each_slave(priv, _cpsw_adjust_link, priv, &link);
430         if (link) {
431                 netif_carrier_on(ndev);
432                 if (netif_running(ndev))
433                         netif_wake_queue(ndev);
434         } else {
435                 netif_carrier_off(ndev);
436                 netif_stop_queue(ndev);
437         }
440 static inline int __show_stat(char *buf, int maxlen, const char* name, u32 val)
442         static char *leader = "........................................";
444         if (!val)
445                 return 0;
446         else
447                 return snprintf(buf, maxlen, "%s %s %10d\n", name,
448                                 leader + strlen(name), val);
451 static ssize_t cpsw_hw_stats_show(struct device *dev,
452                                      struct device_attribute *attr,
453                                      char *buf)
455         struct net_device       *ndev = to_net_dev(dev);
456         struct cpsw_priv        *priv = netdev_priv(ndev);
457         int                     len = 0;
458         struct cpdma_chan_stats dma_stats;
460 #define show_stat(x) do {                                               \
461         len += __show_stat(buf + len, SZ_4K - len, #x,                  \
462                            __raw_readl(&priv->hw_stats->x));            \
463 } while (0)
465 #define show_dma_stat(x) do {                                           \
466         len += __show_stat(buf + len, SZ_4K - len, #x, dma_stats.x);    \
467 } while (0)
469         len += snprintf(buf + len, SZ_4K - len, "CPSW Statistics:\n");
470         show_stat(rxgoodframes);        show_stat(rxbroadcastframes);
471         show_stat(rxmulticastframes);   show_stat(rxpauseframes);
472         show_stat(rxcrcerrors);         show_stat(rxaligncodeerrors);
473         show_stat(rxoversizedframes);   show_stat(rxjabberframes);
474         show_stat(rxundersizedframes);  show_stat(rxfragments);
475         show_stat(rxoctets);            show_stat(txgoodframes);
476         show_stat(txbroadcastframes);   show_stat(txmulticastframes);
477         show_stat(txpauseframes);       show_stat(txdeferredframes);
478         show_stat(txcollisionframes);   show_stat(txsinglecollframes);
479         show_stat(txmultcollframes);    show_stat(txexcessivecollisions);
480         show_stat(txlatecollisions);    show_stat(txunderrun);
481         show_stat(txcarriersenseerrors); show_stat(txoctets);
482         show_stat(octetframes64);       show_stat(octetframes65t127);
483         show_stat(octetframes128t255);  show_stat(octetframes256t511);
484         show_stat(octetframes512t1023); show_stat(octetframes1024tup);
485         show_stat(netoctets);           show_stat(rxsofoverruns);
486         show_stat(rxmofoverruns);       show_stat(rxdmaoverruns);
488         cpdma_chan_get_stats(priv->rxch, &dma_stats);
489         len += snprintf(buf + len, SZ_4K - len, "\nRX DMA Statistics:\n");
490         show_dma_stat(head_enqueue);    show_dma_stat(tail_enqueue);
491         show_dma_stat(pad_enqueue);     show_dma_stat(misqueued);
492         show_dma_stat(desc_alloc_fail); show_dma_stat(pad_alloc_fail);
493         show_dma_stat(runt_receive_buff); show_dma_stat(runt_transmit_buff);
494         show_dma_stat(empty_dequeue);   show_dma_stat(busy_dequeue);
495         show_dma_stat(good_dequeue);    show_dma_stat(teardown_dequeue);
497         cpdma_chan_get_stats(priv->txch, &dma_stats);
498         len += snprintf(buf + len, SZ_4K - len, "\nTX DMA Statistics:\n");
499         show_dma_stat(head_enqueue);    show_dma_stat(tail_enqueue);
500         show_dma_stat(pad_enqueue);     show_dma_stat(misqueued);
501         show_dma_stat(desc_alloc_fail); show_dma_stat(pad_alloc_fail);
502         show_dma_stat(runt_receive_buff); show_dma_stat(runt_transmit_buff);
503         show_dma_stat(empty_dequeue);   show_dma_stat(busy_dequeue);
504         show_dma_stat(good_dequeue);    show_dma_stat(teardown_dequeue);
506         return len;
509 DEVICE_ATTR(hw_stats, S_IRUGO, cpsw_hw_stats_show, NULL);
511 #define PHY_CONFIG_REG  22
512 static void cpsw_set_phy_config(struct cpsw_priv *priv, struct phy_device *phy)
514         struct cpsw_platform_data *pdata = priv->pdev->dev.platform_data;
515         struct mii_bus *miibus;
516         int phy_addr = 0;
517         u16 val = 0;
518         u16 tmp = 0;
520         if (!pdata->gigabit_en)
521                 return;
523         if (!phy)
524                 return;
526         miibus = phy->bus;
528         if (!miibus)
529                 return;
531         phy_addr = phy->addr;
533         /* Following lines enable gigbit advertisement capability even in case
534          * the advertisement is not enabled by default
535          */
536         val = miibus->read(miibus, phy_addr, MII_BMCR);
537         val |= (BMCR_SPEED100 | BMCR_ANENABLE | BMCR_FULLDPLX);
538         miibus->write(miibus, phy_addr, MII_BMCR, val);
539         tmp = miibus->read(miibus, phy_addr, MII_BMCR);
541         /* Enable gigabit support only if the speed is 1000Mbps */
542         if (phy->speed == CPSW_PHY_SPEED) {
543                 tmp = miibus->read(miibus, phy_addr, MII_BMSR);
544                 if (tmp & 0x1) {
545                         val = miibus->read(miibus, phy_addr, MII_CTRL1000);
546                         val |= BIT(9);
547                         miibus->write(miibus, phy_addr, MII_CTRL1000, val);
548                         tmp = miibus->read(miibus, phy_addr, MII_CTRL1000);
549                 }
550         }
552         val = miibus->read(miibus, phy_addr, MII_ADVERTISE);
553         val |= (ADVERTISE_10HALF | ADVERTISE_10FULL | \
554                 ADVERTISE_100HALF | ADVERTISE_100FULL);
555         miibus->write(miibus, phy_addr, MII_ADVERTISE, val);
556         tmp = miibus->read(miibus, phy_addr, MII_ADVERTISE);
558         /* TODO : This check is required. This should be
559          * moved to a board init section as its specific
560          * to a phy.*/
561         if (phy->phy_id == 0x0282F014) {
562                 /* This enables TX_CLK-ing in case of 10/100MBps operation */
563                 val = miibus->read(miibus, phy_addr, PHY_CONFIG_REG);
564                 val |= BIT(5);
565                 miibus->write(miibus, phy_addr, PHY_CONFIG_REG, val);
566                 tmp = miibus->read(miibus, phy_addr, PHY_CONFIG_REG);
567         }
569         return;
572 static void cpsw_slave_open(struct cpsw_slave *slave, struct cpsw_priv *priv)
574         char name[32];
575         u32 slave_port;
577         sprintf(name, "slave-%d", slave->slave_num);
579         soft_reset(name, &slave->sliver->soft_reset);
581         /* setup priority mapping */
582         __raw_writel(0x76543210, &slave->sliver->rx_pri_map);
583         __raw_writel(0x33221100, &slave->regs->tx_pri_map);
585         /* setup max packet size, and mac address */
586         __raw_writel(priv->rx_packet_max, &slave->sliver->rx_maxlen);
587         cpsw_set_slave_mac(slave, priv);
589         slave->mac_control = 0; /* no link yet */
591         slave_port = cpsw_get_slave_port(priv, slave->slave_num);
592         cpsw_ale_add_mcast(priv->ale, priv->ndev->broadcast,
593                            1 << slave_port);
595         slave->phy = phy_connect(priv->ndev, slave->data->phy_id,
596                                  &cpsw_adjust_link, 0, slave->data->phy_if);
597         if (IS_ERR(slave->phy)) {
598                 msg(err, ifup, "phy %s not found on slave %d\n",
599                     slave->data->phy_id, slave->slave_num);
600                 slave->phy = NULL;
601         } else {
602                 printk(KERN_ERR"\nCPSW phy found : id is : 0x%x\n",
603                         slave->phy->phy_id);
604                 cpsw_set_phy_config(priv, slave->phy);
605                 phy_start(slave->phy);
606         }
609 static void cpsw_init_host_port(struct cpsw_priv *priv)
611         /* soft reset the controller and initialize ale */
612         soft_reset("cpsw", &priv->regs->soft_reset);
613         cpsw_ale_start(priv->ale);
615         /* switch to vlan unaware mode */
616         cpsw_ale_control_set(priv->ale, 0, ALE_VLAN_AWARE, 0);
618         /* setup host port priority mapping */
619         __raw_writel(0x76543210, &priv->host_port_regs->cpdma_tx_pri_map);
620         __raw_writel(0, &priv->host_port_regs->cpdma_rx_chan_map);
622         cpsw_ale_control_set(priv->ale, priv->host_port,
623                              ALE_PORT_STATE, ALE_PORT_STATE_FORWARD);
625         cpsw_ale_add_ucast(priv->ale, priv->mac_addr, priv->host_port,
626                           0);
627                            /* ALE_SECURE); */
628         cpsw_ale_add_mcast(priv->ale, priv->ndev->broadcast,
629                            1 << priv->host_port);
632 static int cpsw_ndo_open(struct net_device *ndev)
634         struct cpsw_priv *priv = netdev_priv(ndev);
635         int i, ret;
636         u32 reg;
638         cpsw_intr_disable(priv);
639         netif_carrier_off(ndev);
641         ret = clk_enable(priv->clk);
642         if (ret < 0) {
643                 dev_err(priv->dev, "unable to turn on device clock\n");
644                 return ret;
645         }
647         ret = device_create_file(&ndev->dev, &dev_attr_hw_stats);
648         if (ret < 0) {
649                 dev_err(priv->dev, "unable to add device attr\n");
650                 return ret;
651         }
653         if (priv->data.phy_control)
654                 (*priv->data.phy_control)(true);
656         reg = __raw_readl(&priv->regs->id_ver);
658         msg(info, ifup, "initializing cpsw version %d.%d (%d)\n",
659             (reg >> 8 & 0x7), reg & 0xff, (reg >> 11) & 0x1f);
661         /* initialize host and slave ports */
662         cpsw_init_host_port(priv);
663         for_each_slave(priv, cpsw_slave_open, priv);
665         /* setup tx dma to fixed prio and zero offset */
666         cpdma_control_set(priv->dma, CPDMA_TX_PRIO_FIXED, 1);
667         cpdma_control_set(priv->dma, CPDMA_RX_BUFFER_OFFSET, 0);
669         /* disable priority elevation and enable statistics on all ports */
670         __raw_writel(0, &priv->regs->ptype);
672         /* enable statistics collection only on the host port */
673         /* __raw_writel(BIT(priv->host_port), &priv->regs->stat_port_en); */
674         __raw_writel(0x7, &priv->regs->stat_port_en);
676         if (WARN_ON(!priv->data.rx_descs))
677                 priv->data.rx_descs = 128;
679         for (i = 0; i < priv->data.rx_descs; i++) {
680                 struct sk_buff *skb;
682                 ret = -ENOMEM;
683                 skb = netdev_alloc_skb_ip_align(priv->ndev,
684                                                 priv->rx_packet_max);
685                 if (!skb)
686                         break;
687                 ret = cpdma_chan_submit(priv->rxch, skb, skb->data,
688                                         skb_tailroom(skb), GFP_KERNEL);
689                 if (WARN_ON(ret < 0))
690                         break;
691         }
692         /* continue even if we didn't manage to submit all receive descs */
693         msg(info, ifup, "submitted %d rx descriptors\n", i);
695         cpdma_ctlr_start(priv->dma);
696         cpsw_intr_enable(priv);
697         napi_enable(&priv->napi);
698         cpdma_ctlr_eoi(priv->dma);
700         return 0;
703 static void cpsw_slave_stop(struct cpsw_slave *slave, struct cpsw_priv *priv)
705         if (!slave->phy)
706                 return;
707         phy_stop(slave->phy);
708         phy_disconnect(slave->phy);
709         slave->phy = NULL;
712 static int cpsw_ndo_stop(struct net_device *ndev)
714         struct cpsw_priv *priv = netdev_priv(ndev);
716         msg(info, ifdown, "shutting down cpsw device\n");
717         cpsw_intr_disable(priv);
718         cpdma_ctlr_int_ctrl(priv->dma, false);
719         cpdma_ctlr_stop(priv->dma);
720         netif_stop_queue(priv->ndev);
721         napi_disable(&priv->napi);
722         netif_carrier_off(priv->ndev);
723         cpsw_ale_stop(priv->ale);
724         device_remove_file(&ndev->dev, &dev_attr_hw_stats);
725         for_each_slave(priv, cpsw_slave_stop, priv);
726         if (priv->data.phy_control)
727                 (*priv->data.phy_control)(false);
728         clk_disable(priv->clk);
729         return 0;
732 static netdev_tx_t cpsw_ndo_start_xmit(struct sk_buff *skb,
733                                        struct net_device *ndev)
735         struct cpsw_priv *priv = netdev_priv(ndev);
736         int ret;
738         ndev->trans_start = jiffies;
740         ret = skb_padto(skb, CPSW_MIN_PACKET_SIZE);
741         if (unlikely(ret < 0)) {
742                 msg(err, tx_err, "packet pad failed");
743                 goto fail;
744         }
746         ret = cpdma_chan_submit(priv->txch, skb, skb->data,
747                                 skb->len, GFP_KERNEL);
748         if (unlikely(ret != 0)) {
749                 msg(err, tx_err, "desc submit failed");
750                 goto fail;
751         }
753         return NETDEV_TX_OK;
754 fail:
755         priv->stats.tx_dropped++;
756         netif_stop_queue(ndev);
757         return NETDEV_TX_BUSY;
760 static void cpsw_ndo_change_rx_flags(struct net_device *ndev, int flags)
762         /*
763          * The switch cannot operate in promiscuous mode without substantial
764          * headache.  For promiscuous mode to work, we would need to put the
765          * ALE in bypass mode and route all traffic to the host port.
766          * Subsequently, the host will need to operate as a "bridge", learn,
767          * and flood as needed.  For now, we simply complain here and
768          * do nothing about it :-)
769          */
770         if ((flags & IFF_PROMISC) && (ndev->flags & IFF_PROMISC))
771                 dev_err(&ndev->dev, "promiscuity ignored!\n");
773         /*
774          * The switch cannot filter multicast traffic unless it is configured
775          * in "VLAN Aware" mode.  Unfortunately, VLAN awareness requires a
776          * whole bunch of additional logic that this driver does not implement
777          * at present.
778          */
779         if ((flags & IFF_ALLMULTI) && !(ndev->flags & IFF_ALLMULTI))
780                 dev_err(&ndev->dev, "multicast traffic cannot be filtered!\n");
783 static int cpsw_ndo_set_mac_address(struct net_device *ndev, void *addr)
785         struct cpsw_priv *priv = netdev_priv(ndev);
787         cpsw_ale_del_ucast(priv->ale, priv->mac_addr, priv->host_port);
788         memcpy(priv->mac_addr, ndev->dev_addr, ETH_ALEN);
789         cpsw_ale_add_ucast(priv->ale, priv->mac_addr, priv->host_port,
790                            0);
791                            /* ALE_SECURE); */
792         for_each_slave(priv, cpsw_set_slave_mac, priv);
793         return 0;
796 static void cpsw_ndo_tx_timeout(struct net_device *ndev)
798         struct cpsw_priv *priv = netdev_priv(ndev);
800         msg(err, tx_err, "transmit timeout, restarting dma");
801         priv->stats.tx_errors++;
802         cpsw_intr_disable(priv);
803         cpdma_ctlr_int_ctrl(priv->dma, false);
804         cpdma_chan_stop(priv->txch);
805         cpdma_chan_start(priv->txch);
806         cpdma_ctlr_int_ctrl(priv->dma, true);
807         cpsw_intr_enable(priv);
808         cpdma_ctlr_eoi(priv->dma);
811 static struct net_device_stats *cpsw_ndo_get_stats(struct net_device *ndev)
813         struct cpsw_priv *priv = netdev_priv(ndev);
814         return &priv->stats;
817 #ifdef CONFIG_NET_POLL_CONTROLLER
818 static void cpsw_ndo_poll_controller(struct net_device *ndev)
820         struct cpsw_priv *priv = netdev_priv(ndev);
822         cpsw_intr_disable(priv);
823         cpdma_ctlr_int_ctrl(priv->dma, false);
824         cpsw_interrupt(ndev->irq, priv);
825         cpdma_ctlr_int_ctrl(priv->dma, true);
826         cpsw_intr_enable(priv);
827         cpdma_ctlr_eoi(priv->dma);
829 #endif
831 static const struct net_device_ops cpsw_netdev_ops = {
832         .ndo_open               = cpsw_ndo_open,
833         .ndo_stop               = cpsw_ndo_stop,
834         .ndo_start_xmit         = cpsw_ndo_start_xmit,
835         .ndo_change_rx_flags    = cpsw_ndo_change_rx_flags,
836         .ndo_set_mac_address    = cpsw_ndo_set_mac_address,
837         .ndo_validate_addr      = eth_validate_addr,
838         .ndo_tx_timeout         = cpsw_ndo_tx_timeout,
839         .ndo_get_stats          = cpsw_ndo_get_stats,
840 #ifdef CONFIG_NET_POLL_CONTROLLER
841         .ndo_poll_controller    = cpsw_ndo_poll_controller,
842 #endif
843 };
845 static void cpsw_get_drvinfo(struct net_device *ndev,
846                              struct ethtool_drvinfo *info)
848         struct cpsw_priv *priv = netdev_priv(ndev);
849         strcpy(info->driver, "TI CPSW Driver v1.0");
850         strcpy(info->version, "1.0");
851         strcpy(info->bus_info, priv->pdev->name);
854 static u32 cpsw_get_msglevel(struct net_device *ndev)
856         struct cpsw_priv *priv = netdev_priv(ndev);
857         return priv->msg_enable;
860 static void cpsw_set_msglevel(struct net_device *ndev, u32 value)
862         struct cpsw_priv *priv = netdev_priv(ndev);
863         priv->msg_enable = value;
866 static const struct ethtool_ops cpsw_ethtool_ops = {
867         .get_drvinfo    = cpsw_get_drvinfo,
868         .get_msglevel   = cpsw_get_msglevel,
869         .set_msglevel   = cpsw_set_msglevel,
870         .get_link       = ethtool_op_get_link,
871 };
873 static void cpsw_slave_init(struct cpsw_slave *slave, struct cpsw_priv *priv)
875         void __iomem            *regs = priv->regs;
876         int                     slave_num = slave->slave_num;
877         struct cpsw_slave_data  *data = priv->data.slave_data + slave_num;
879         slave->data     = data;
880         slave->regs     = regs + data->slave_reg_ofs;
881         slave->sliver   = regs + data->sliver_reg_ofs;
884 static int __devinit cpsw_probe(struct platform_device *pdev)
886         struct cpsw_platform_data       *data = pdev->dev.platform_data;
887         struct net_device               *ndev;
888         struct cpsw_priv                *priv;
889         struct cpdma_params             dma_params;
890         struct cpsw_ale_params          ale_params;
891         void __iomem                    *regs;
892         struct resource                 *res;
893         int ret = 0, i, k = 0;
895         if (!data) {
896                 pr_err("cpsw: platform data missing\n");
897                 return -ENODEV;
898         }
900         ndev = alloc_etherdev(sizeof(struct cpsw_priv));
901         if (!ndev) {
902                 pr_err("cpsw: error allocating net_device\n");
903                 return -ENOMEM;
904         }
906         platform_set_drvdata(pdev, ndev);
907         priv = netdev_priv(ndev);
908         spin_lock_init(&priv->lock);
909         priv->data = *data;
910         priv->pdev = pdev;
911         priv->ndev = ndev;
912         priv->dev  = &ndev->dev;
913         priv->msg_enable = netif_msg_init(debug_level, CPSW_DEBUG);
914         priv->rx_packet_max = max(rx_packet_max, 128);
916         if (is_valid_ether_addr(data->mac_addr)) {
917                 memcpy(priv->mac_addr, data->mac_addr, ETH_ALEN);
918                 printk(KERN_INFO"Detected MACID=%x:%x:%x:%x:%x:%x\n",
919                         priv->mac_addr[0], priv->mac_addr[1],
920                         priv->mac_addr[2], priv->mac_addr[3],
921                         priv->mac_addr[4], priv->mac_addr[5]);
922         } else {
923                 random_ether_addr(priv->mac_addr);
924                 printk(KERN_INFO"Random MACID=%x:%x:%x:%x:%x:%x\n",
925                         priv->mac_addr[0], priv->mac_addr[1],
926                         priv->mac_addr[2], priv->mac_addr[3],
927                         priv->mac_addr[4], priv->mac_addr[5]);
928         }
930         memcpy(ndev->dev_addr, priv->mac_addr, ETH_ALEN);
932         priv->slaves = kzalloc(sizeof(struct cpsw_slave) * data->slaves,
933                                GFP_KERNEL);
934         if (!priv->slaves) {
935                 dev_err(priv->dev, "failed to allocate slave ports\n");
936                 ret = -EBUSY;
937                 goto clean_ndev_ret;
938         }
939         for (i = 0; i < data->slaves; i++)
940                 priv->slaves[i].slave_num = i;
942         priv->clk = clk_get(&pdev->dev, NULL);
943         if (IS_ERR(priv->clk))
944                 dev_err(priv->dev, "failed to get device clock\n");
945         priv->cpsw_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
946         if (!priv->cpsw_res) {
947                 dev_err(priv->dev, "error getting i/o resource\n");
948                 ret = -ENOENT;
949                 goto clean_clk_ret;
950         }
952         if (!request_mem_region(priv->cpsw_res->start,
953                 resource_size(priv->cpsw_res), ndev->name)) {
954                 dev_err(priv->dev, "failed request i/o region\n");
955                 ret = -ENXIO;
956                 goto clean_clk_ret;
957         }
959         regs = ioremap(priv->cpsw_res->start, resource_size(priv->cpsw_res));
960         if (!regs) {
961                 dev_err(priv->dev, "unable to map i/o region\n");
962                 goto clean_cpsw_iores_ret;
963         }
964         priv->regs = regs;
965         priv->host_port = data->host_port_num;
966         priv->host_port_regs = regs + data->host_port_reg_ofs;
967         priv->hw_stats = regs + data->hw_stats_reg_ofs;
969         priv->cpsw_ss_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
970         if (!priv->cpsw_ss_res) {
971                 dev_err(priv->dev, "error getting i/o resource\n");
972                 ret = -ENOENT;
973                 goto clean_clk_ret;
974         }
976         if (!request_mem_region(priv->cpsw_ss_res->start,
977                 resource_size(priv->cpsw_ss_res), ndev->name)) {
978                 dev_err(priv->dev, "failed request i/o region\n");
979                 ret = -ENXIO;
980                 goto clean_clk_ret;
981         }
983         regs = ioremap(priv->cpsw_ss_res->start,
984                         resource_size(priv->cpsw_ss_res));
985         if (!regs) {
986                 dev_err(priv->dev, "unable to map i/o region\n");
987                 goto clean_cpsw_ss_iores_ret;
988         }
989         priv->ss_regs = regs;
992         for_each_slave(priv, cpsw_slave_init, priv);
994         memset(&dma_params, 0, sizeof(dma_params));
995         dma_params.dev                  = &pdev->dev;
996         dma_params.dmaregs              = (void __iomem *)(((u32)priv->regs) +
997                                                 data->cpdma_reg_ofs);
998         dma_params.rxthresh             = (void __iomem *)(((u32)priv->regs) +
999                                         data->cpdma_reg_ofs + CPDMA_RXTHRESH);
1000         dma_params.rxfree               = (void __iomem *)(((u32)priv->regs) +
1001                                         data->cpdma_reg_ofs + CPDMA_RXFREE);
1003         if (data->version == CPSW_VERSION_2) {
1004                 dma_params.txhdp        = (void __iomem *)(((u32)priv->regs) +
1005                                         data->cpdma_reg_ofs + CPDMA_TXHDP_VER2);
1006                 dma_params.rxhdp        = (void __iomem *)(((u32)priv->regs) +
1007                                         data->cpdma_reg_ofs + CPDMA_RXHDP_VER2);
1008                 dma_params.txcp         = (void __iomem *)(((u32)priv->regs) +
1009                                         data->cpdma_reg_ofs + CPDMA_TXCP_VER2);
1010                 dma_params.rxcp         = (void __iomem *)(((u32)priv->regs) +
1011                                         data->cpdma_reg_ofs + CPDMA_RXCP_VER2);
1012         } else {
1013                 dma_params.txhdp        = (void __iomem *)(((u32)priv->regs) +
1014                                         data->cpdma_reg_ofs + CPDMA_TXHDP_VER1);
1015                 dma_params.rxhdp        = (void __iomem *)(((u32)priv->regs) +
1016                                         data->cpdma_reg_ofs + CPDMA_RXHDP_VER1);
1017                 dma_params.txcp         = (void __iomem *)(((u32)priv->regs) +
1018                                         data->cpdma_reg_ofs + CPDMA_TXCP_VER1);
1019                 dma_params.rxcp         = (void __iomem *)(((u32)priv->regs) +
1020                                         data->cpdma_reg_ofs + CPDMA_RXCP_VER1);
1021         }
1023         dma_params.num_chan             = data->channels;
1024         dma_params.has_soft_reset       = true;
1025         dma_params.min_packet_size      = CPSW_MIN_PACKET_SIZE;
1026         dma_params.desc_mem_size        = data->bd_ram_size;
1027         dma_params.desc_align           = 16;
1028         dma_params.has_ext_regs         = true;
1029         dma_params.desc_mem_phys        = data->no_bd_ram ? 0 :
1030                         (u32 __force)priv->cpsw_res->start + data->bd_ram_ofs;
1031         dma_params.desc_hw_addr         = data->hw_ram_addr ?
1032                                 data->hw_ram_addr : dma_params.desc_mem_phys ;
1034         priv->dma = cpdma_ctlr_create(&dma_params);
1035         if (!priv->dma) {
1036                 dev_err(priv->dev, "error initializing dma\n");
1037                 ret = -ENOMEM;
1038                 goto clean_iomap_ret;
1039         }
1041         priv->txch = cpdma_chan_create(priv->dma, tx_chan_num(0),
1042                                        cpsw_tx_handler);
1043         priv->rxch = cpdma_chan_create(priv->dma, rx_chan_num(0),
1044                                        cpsw_rx_handler);
1046         if (WARN_ON(!priv->txch || !priv->rxch)) {
1047                 dev_err(priv->dev, "error initializing dma channels\n");
1048                 ret = -ENOMEM;
1049                 goto clean_dma_ret;
1050         }
1052         memset(&ale_params, 0, sizeof(ale_params));
1053         ale_params.dev          = &ndev->dev;
1054         ale_params.ale_regs     = (void *)((u32)priv->regs) +
1055                                         ((u32)data->ale_reg_ofs);
1056         ale_params.ale_ageout   = ale_ageout;
1057         ale_params.ale_entries  = data->ale_entries;
1058         ale_params.ale_ports    = data->slaves;
1060         priv->ale = cpsw_ale_create(&ale_params);
1061         if (!priv->ale) {
1062                 dev_err(priv->dev, "error initializing ale engine\n");
1063                 ret = -ENODEV;
1064                 goto clean_dma_ret;
1065         }
1067         ndev->irq = platform_get_irq(pdev, 0);
1068         if (ndev->irq < 0) {
1069                 dev_err(priv->dev, "error getting irq resource\n");
1070                 ret = -ENOENT;
1071                 goto clean_ale_ret;
1072         }
1074         while ((res = platform_get_resource(priv->pdev, IORESOURCE_IRQ, k))) {
1075                 for (i = res->start; i <= res->end; i++) {
1076                         if (request_irq(i, cpsw_interrupt, IRQF_DISABLED,
1077                                         dev_name(&pdev->dev), priv)) {
1078                                 dev_err(priv->dev, "error attaching irq\n");
1079                                 goto clean_ale_ret;
1080                         }
1081                         #ifdef CPSW_IRQ_QUIRK
1082                         priv->irqs_table[k] = i;
1083                         priv->num_irqs = k;
1084                         #endif
1085                 }
1086                 k++;
1087         }
1089         ndev->flags |= IFF_ALLMULTI;    /* see cpsw_ndo_change_rx_flags() */
1091         ndev->netdev_ops = &cpsw_netdev_ops;
1092         SET_ETHTOOL_OPS(ndev, &cpsw_ethtool_ops);
1093         netif_napi_add(ndev, &priv->napi, cpsw_poll, CPSW_POLL_WEIGHT);
1095         /* register the network device */
1096         SET_NETDEV_DEV(ndev, &pdev->dev);
1097         ret = register_netdev(ndev);
1098         if (ret) {
1099                 dev_err(priv->dev, "error registering net device\n");
1100                 ret = -ENODEV;
1101                 goto clean_irq_ret;
1102         }
1104         msg(notice, probe, "initialized device (regs %x, irq %d)\n",
1105             priv->cpsw_res->start, ndev->irq);
1107         return 0;
1109 clean_irq_ret:
1110         free_irq(ndev->irq, priv);
1111 clean_ale_ret:
1112         cpsw_ale_destroy(priv->ale);
1113 clean_dma_ret:
1114         cpdma_chan_destroy(priv->txch);
1115         cpdma_chan_destroy(priv->rxch);
1116         cpdma_ctlr_destroy(priv->dma);
1117 clean_iomap_ret:
1118         iounmap(priv->regs);
1119 clean_cpsw_ss_iores_ret:
1120         release_mem_region(priv->cpsw_ss_res->start,
1121                                 resource_size(priv->cpsw_ss_res));
1122 clean_cpsw_iores_ret:
1123         release_mem_region(priv->cpsw_res->start,
1124                                 resource_size(priv->cpsw_res));
1125 clean_clk_ret:
1126         clk_put(priv->clk);
1127         kfree(priv->slaves);
1128 clean_ndev_ret:
1129         free_netdev(ndev);
1130         return ret;
1133 static int __devexit cpsw_remove(struct platform_device *pdev)
1135         struct net_device *ndev = platform_get_drvdata(pdev);
1136         struct cpsw_priv *priv = netdev_priv(ndev);
1138         msg(notice, probe, "removing device\n");
1139         platform_set_drvdata(pdev, NULL);
1141         free_irq(ndev->irq, priv);
1142         cpsw_ale_destroy(priv->ale);
1143         cpdma_chan_destroy(priv->txch);
1144         cpdma_chan_destroy(priv->rxch);
1145         cpdma_ctlr_destroy(priv->dma);
1146         iounmap(priv->regs);
1147         release_mem_region(priv->cpsw_res->start,
1148                                 resource_size(priv->cpsw_res));
1149         release_mem_region(priv->cpsw_ss_res->start,
1150                                 resource_size(priv->cpsw_ss_res));
1151         clk_put(priv->clk);
1152         kfree(priv->slaves);
1153         free_netdev(ndev);
1155         return 0;
1158 static int cpsw_suspend(struct device *dev)
1160         struct platform_device  *pdev = to_platform_device(dev);
1161         struct net_device       *ndev = platform_get_drvdata(pdev);
1163         if (netif_running(ndev))
1164                 cpsw_ndo_stop(ndev);
1165         return 0;
1168 static int cpsw_resume(struct device *dev)
1170         struct platform_device  *pdev = to_platform_device(dev);
1171         struct net_device       *ndev = platform_get_drvdata(pdev);
1173         if (netif_running(ndev))
1174                 cpsw_ndo_open(ndev);
1175         return 0;
1178 static const struct dev_pm_ops cpsw_pm_ops = {
1179         .suspend        = cpsw_suspend,
1180         .resume         = cpsw_resume,
1181 };
1183 static struct platform_driver cpsw_driver = {
1184         .driver = {
1185                 .name    = "cpsw",
1186                 .owner   = THIS_MODULE,
1187                 .pm      = &cpsw_pm_ops,
1188         },
1189         .probe = cpsw_probe,
1190         .remove = __devexit_p(cpsw_remove),
1191 };
1193 static int __init cpsw_init(void)
1195         return platform_driver_register(&cpsw_driver);
1197 late_initcall(cpsw_init);
1199 static void __exit cpsw_exit(void)
1201         platform_driver_unregister(&cpsw_driver);
1203 module_exit(cpsw_exit);
1205 MODULE_LICENSE("GPL");
1206 MODULE_DESCRIPTION("TI CPSW Ethernet driver");