1 /*
2 * MUSB OTG driver defines
3 *
4 * Copyright 2005 Mentor Graphics Corporation
5 * Copyright (C) 2005-2006 by Texas Instruments
6 * Copyright (C) 2006-2007 Nokia Corporation
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20 * 02110-1301 USA
21 *
22 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
23 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
24 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
25 * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
29 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 *
33 */
35 #ifndef __MUSB_CORE_H__
36 #define __MUSB_CORE_H__
38 #include <linux/slab.h>
39 #include <linux/list.h>
40 #include <linux/interrupt.h>
41 #include <linux/errno.h>
42 #include <linux/device.h>
43 #include <linux/usb/ch9.h>
44 #include <linux/usb/gadget.h>
45 #include <linux/usb.h>
46 #include <linux/usb/otg.h>
47 #include <linux/usb/musb.h>
49 struct musb;
50 struct musb_hw_ep;
51 struct musb_ep;
53 /* Helper defines for struct musb->hwvers */
54 #define MUSB_HWVERS_MAJOR(x) ((x >> 10) & 0x1f)
55 #define MUSB_HWVERS_MINOR(x) (x & 0x3ff)
56 #define MUSB_HWVERS_RC 0x8000
57 #define MUSB_HWVERS_1300 0x52C
58 #define MUSB_HWVERS_1400 0x590
59 #define MUSB_HWVERS_1800 0x720
60 #define MUSB_HWVERS_1900 0x784
61 #define MUSB_HWVERS_2000 0x800
63 extern u8 (*musb_readb)(const void __iomem *addr, unsigned offset);
64 extern void (*musb_writeb)(void __iomem *addr, unsigned offset, u8 data);
66 #include "musb_debug.h"
67 #include "musb_dma.h"
69 #include "musb_io.h"
70 #include "musb_regs.h"
72 #include "musb_gadget.h"
73 #include <linux/usb/hcd.h>
74 #include "musb_host.h"
76 #define is_peripheral_enabled(musb) ((musb)->board_mode != MUSB_HOST)
77 #define is_host_enabled(musb) ((musb)->board_mode != MUSB_PERIPHERAL)
78 #define is_otg_enabled(musb) ((musb)->board_mode == MUSB_OTG)
80 /* NOTE: otg and peripheral-only state machines start at B_IDLE.
81 * OTG or host-only go to A_IDLE when ID is sensed.
82 */
83 #define is_peripheral_active(m) (!(m)->is_host)
84 #define is_host_active(m) ((m)->is_host)
86 #ifndef CONFIG_HAVE_CLK
87 /* Dummy stub for clk framework */
88 #define clk_get(dev, id) NULL
89 #define clk_put(clock) do {} while (0)
90 #define clk_enable(clock) do {} while (0)
91 #define clk_disable(clock) do {} while (0)
92 #endif
94 #ifdef CONFIG_PROC_FS
95 #include <linux/fs.h>
96 #define MUSB_CONFIG_PROC_FS
97 #endif
99 /****************************** PERIPHERAL ROLE *****************************/
101 #define is_peripheral_capable() (1)
103 extern irqreturn_t musb_g_ep0_irq(struct musb *);
104 extern void musb_g_tx(struct musb *, u8);
105 extern void musb_g_rx(struct musb *, u8);
106 extern void musb_g_reset(struct musb *);
107 extern void musb_g_suspend(struct musb *);
108 extern void musb_g_resume(struct musb *);
109 extern void musb_g_wakeup(struct musb *);
110 extern void musb_g_disconnect(struct musb *);
112 /****************************** HOST ROLE ***********************************/
114 #define is_host_capable() (1)
116 extern irqreturn_t musb_h_ep0_irq(struct musb *);
117 extern void musb_host_tx(struct musb *, u8);
118 extern void musb_host_rx(struct musb *, u8);
120 /****************************** CONSTANTS ********************************/
122 #ifndef MUSB_C_NUM_EPS
123 #define MUSB_C_NUM_EPS ((u8)16)
124 #endif
126 #ifndef MUSB_MAX_END0_PACKET
127 #define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE)
128 #endif
130 /* host side ep0 states */
131 enum musb_h_ep0_state {
132 MUSB_EP0_IDLE,
133 MUSB_EP0_START, /* expect ack of setup */
134 MUSB_EP0_IN, /* expect IN DATA */
135 MUSB_EP0_OUT, /* expect ack of OUT DATA */
136 MUSB_EP0_STATUS, /* expect ack of STATUS */
137 } __attribute__ ((packed));
139 /* peripheral side ep0 states */
140 enum musb_g_ep0_state {
141 MUSB_EP0_STAGE_IDLE, /* idle, waiting for SETUP */
142 MUSB_EP0_STAGE_SETUP, /* received SETUP */
143 MUSB_EP0_STAGE_TX, /* IN data */
144 MUSB_EP0_STAGE_RX, /* OUT data */
145 MUSB_EP0_STAGE_STATUSIN, /* (after OUT data) */
146 MUSB_EP0_STAGE_STATUSOUT, /* (after IN data) */
147 MUSB_EP0_STAGE_ACKWAIT, /* after zlp, before statusin */
148 } __attribute__ ((packed));
150 /* OTG protocol constants */
151 #define OTG_TIME_A_WAIT_VRISE 100 /* msec (max) */
152 #define OTG_TIME_A_WAIT_BCON 0 /* 0=infinite; min 1000 msec */
153 #define OTG_TIME_A_IDLE_BDIS 200 /* msec (min) */
155 /*************************** REGISTER ACCESS ********************************/
157 /* Endpoint registers (other than dynfifo setup) can be accessed either
158 * directly with the "flat" model, or after setting up an index register.
159 */
161 #define musb_ep_select(_musb, _mbase, _epnum) do { \
162 if (_musb->ops->flags & MUSB_GLUE_EP_ADDR_INDEXED_MAPPING) \
163 musb_writeb((_mbase), MUSB_INDEX, (_epnum)); \
164 } while (0)
166 #define MUSB_EP_OFFSET MUSB_OFFSET
167 /****************************** FUNCTIONS ********************************/
169 #define MUSB_HST_MODE(_musb)\
170 { (_musb)->is_host = true; }
171 #define MUSB_DEV_MODE(_musb) \
172 { (_musb)->is_host = false; }
174 #define test_devctl_hst_mode(_x) \
175 (musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM)
177 #define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral")
179 /******************************** TYPES *************************************/
181 #define MUSB_GLUE_TUSB_STYLE 0x0001
182 #define MUSB_GLUE_EP_ADDR_FLAT_MAPPING 0x0002
183 #define MUSB_GLUE_EP_ADDR_INDEXED_MAPPING 0x0004
184 #define MUSB_GLUE_DMA_INVENTRA 0x0008
185 #define MUSB_GLUE_DMA_CPPI 0x0010
186 #define MUSB_GLUE_DMA_TUSB 0x0020
187 #define MUSB_GLUE_DMA_UX500 0x0040
188 #define MUSB_GLUE_DMA_CPPI41 0x0080
191 /**
192 * struct musb_platform_ops - Operations passed to musb_core by HW glue layer
193 * @fifo_mode: which fifo_mode is taken by me
194 * @flags: each hw glue difference information will be here
195 * @init: turns on clocks, sets up platform-specific registers, etc
196 * @exit: undoes @init
197 * @read_fifo: read data from musb fifo in PIO
198 * @write_fifo: write data into musb fifo in PIO
199 * @set_mode: forcefully changes operating mode
200 * @try_ilde: tries to idle the IP
201 * @get_hw_revision: get hardware revision
202 * @vbus_status: returns vbus status if possible
203 * @set_vbus: forces vbus status
204 * @adjust_channel_params: pre check for standard dma channel_program func
205 * @dma_controller_create: create dma controller for me
206 * @dma_controller_destroy: destroy dma controller
207 */
208 struct musb_platform_ops {
209 short fifo_mode;
210 unsigned short flags;
211 int (*init)(struct musb *musb);
212 int (*exit)(struct musb *musb);
214 void (*enable)(struct musb *musb);
215 void (*disable)(struct musb *musb);
217 void (*read_fifo)(struct musb_hw_ep *hw_ep, u16 len, u8 *buf);
218 void (*write_fifo)(struct musb_hw_ep *hw_ep, u16 len, const u8 *buf);
220 int (*set_mode)(struct musb *musb, u8 mode);
221 void (*try_idle)(struct musb *musb, unsigned long timeout);
223 u16 (*get_hw_revision)(struct musb *musb);
225 int (*vbus_status)(struct musb *musb);
226 void (*set_vbus)(struct musb *musb, int on);
228 int (*adjust_channel_params)(struct dma_channel *channel,
229 u16 packet_sz, u8 *mode,
230 dma_addr_t *dma_addr, u32 *len);
231 struct dma_controller* (*dma_controller_create)(struct musb *,
232 void __iomem *);
233 void (*dma_controller_destroy)(struct dma_controller *);
234 int (*simulate_babble_intr)(struct musb *musb);
235 };
237 /*
238 * struct musb_hw_ep - endpoint hardware (bidirectional)
239 *
240 * Ordered slightly for better cacheline locality.
241 */
242 struct musb_hw_ep {
243 struct musb *musb;
244 void __iomem *fifo;
245 void __iomem *regs;
247 /*Fixme: the following field is only used by tusb*/
248 void __iomem *conf;
250 /* index in musb->endpoints[] */
251 u8 epnum;
253 /* hardware configuration, possibly dynamic */
254 bool is_shared_fifo;
255 bool tx_double_buffered;
256 bool rx_double_buffered;
257 u16 max_packet_sz_tx;
258 u16 max_packet_sz_rx;
260 struct dma_channel *tx_channel;
261 struct dma_channel *rx_channel;
263 /*
264 * TUSB has "asynchronous" and "synchronous" dma modes
265 * Fixme: the following three fields are only valid for TUSB.
266 * */
267 dma_addr_t fifo_async;
268 dma_addr_t fifo_sync;
269 void __iomem *fifo_sync_va;
271 void __iomem *target_regs;
273 /* currently scheduled peripheral endpoint */
274 struct musb_qh *in_qh;
275 struct musb_qh *out_qh;
277 u8 rx_reinit;
278 u8 tx_reinit;
280 /* peripheral side */
281 struct musb_ep ep_in; /* TX */
282 struct musb_ep ep_out; /* RX */
283 };
285 static inline struct musb_request *next_in_request(struct musb_hw_ep *hw_ep)
286 {
287 return next_request(&hw_ep->ep_in);
288 }
290 static inline struct musb_request *next_out_request(struct musb_hw_ep *hw_ep)
291 {
292 return next_request(&hw_ep->ep_out);
293 }
295 struct musb_csr_regs {
296 /* FIFO registers */
297 u16 txmaxp, txcsr, rxmaxp, rxcsr;
298 u16 rxfifoadd, txfifoadd;
299 u8 txtype, txinterval, rxtype, rxinterval;
300 u8 rxfifosz, txfifosz;
301 u8 txfunaddr, txhubaddr, txhubport;
302 u8 rxfunaddr, rxhubaddr, rxhubport;
303 };
305 struct musb_context_registers {
307 u8 power;
308 u16 intrtxe, intrrxe;
309 u8 intrusbe;
310 u16 frame;
311 u8 index, testmode;
313 u8 devctl, busctl, misc;
314 u32 otg_interfsel;
316 struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
317 };
319 /*
320 * struct musb - Driver instance data.
321 */
322 struct musb {
323 /* device lock */
324 spinlock_t lock;
326 const struct musb_platform_ops *ops;
327 struct musb_context_registers context;
329 irqreturn_t (*isr)(int, void *);
330 struct work_struct irq_work;
331 struct work_struct work;
332 struct work_struct otg_notifier_work;
333 u8 enable_babble_work;
334 u16 hwvers;
336 /* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
337 #define MUSB_PORT_STAT_RESUME (1 << 31)
339 u32 port1_status;
341 unsigned long rh_timer;
343 enum musb_h_ep0_state ep0_stage;
345 /* bulk traffic normally dedicates endpoint hardware, and each
346 * direction has its own ring of host side endpoints.
347 * we try to progress the transfer at the head of each endpoint's
348 * queue until it completes or NAKs too much; then we try the next
349 * endpoint.
350 */
351 struct musb_hw_ep *bulk_ep;
353 struct list_head control; /* of musb_qh */
354 struct list_head in_bulk; /* of musb_qh */
355 struct list_head out_bulk; /* of musb_qh */
357 struct workqueue_struct *gb_queue;
358 struct work_struct gb_work;
359 spinlock_t gb_lock;
360 struct list_head gb_list; /* of urbs */
362 struct notifier_block nb;
364 struct dma_controller *dma_controller;
366 struct device *controller;
367 void __iomem *ctrl_base;
368 void __iomem *mregs;
370 /*Fixme: the three fields below are only used by tusb*/
371 dma_addr_t async;
372 dma_addr_t sync;
373 void __iomem *sync_va;
375 /* passed down from chip/board specific irq handlers */
376 u8 int_usb;
377 u16 int_rx;
378 u16 int_tx;
380 struct otg_transceiver *xceiv;
381 u8 xceiv_event;
383 int nIrq;
384 unsigned irq_wake:1;
386 struct musb_hw_ep endpoints[MUSB_C_NUM_EPS];
387 #define control_ep endpoints
389 #define VBUSERR_RETRY_COUNT 3
390 u16 vbuserr_retry;
391 u16 epmask;
392 u8 nr_endpoints;
394 u8 board_mode; /* enum musb_mode */
395 int (*board_set_power)(int state);
397 u8 min_power; /* vbus for periph, in mA/2 */
399 bool is_host;
401 int a_wait_bcon; /* VBUS timeout in msecs */
402 unsigned long idle_timeout; /* Next timeout in jiffies */
404 /* active means connected and not suspended */
405 unsigned is_active:1;
407 unsigned is_multipoint:1;
408 unsigned ignore_disconnect:1; /* during bus resets */
410 unsigned hb_iso_rx:1; /* high bandwidth iso rx? */
411 unsigned hb_iso_tx:1; /* high bandwidth iso tx? */
412 unsigned dyn_fifo:1; /* dynamic FIFO supported? */
414 unsigned bulk_split:1;
415 #define can_bulk_split(musb,type) \
416 (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split)
418 unsigned bulk_combine:1;
419 #define can_bulk_combine(musb,type) \
420 (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine)
422 /* is_suspended means USB B_PERIPHERAL suspend */
423 unsigned is_suspended:1;
425 /* may_wakeup means remote wakeup is enabled */
426 unsigned may_wakeup:1;
428 /* is_self_powered is reported in device status and the
429 * config descriptor. is_bus_powered means B_PERIPHERAL
430 * draws some VBUS current; both can be true.
431 */
432 unsigned is_self_powered:1;
433 unsigned is_bus_powered:1;
435 unsigned set_address:1;
436 unsigned test_mode:1;
437 unsigned softconnect:1;
439 u8 address;
440 u8 test_mode_nr;
441 u16 ackpend; /* ep0 */
442 enum musb_g_ep0_state ep0_state;
443 struct usb_gadget g; /* the gadget */
444 struct usb_gadget_driver *gadget_driver; /* its driver */
446 /*
447 * FIXME: Remove this flag.
448 *
449 * This is only added to allow Blackfin to work
450 * with current driver. For some unknown reason
451 * Blackfin doesn't work with double buffering
452 * and that's enabled by default.
453 *
454 * We added this flag to forcefully disable double
455 * buffering until we get it working.
456 */
457 unsigned double_buffer_not_ok:1 __deprecated;
459 struct musb_hdrc_config *config;
461 #ifdef MUSB_CONFIG_PROC_FS
462 struct proc_dir_entry *proc_entry;
463 #endif
464 /* id for multiple musb instances */
465 u8 id;
466 };
468 static inline struct musb *gadget_to_musb(struct usb_gadget *g)
469 {
470 return container_of(g, struct musb, g);
471 }
473 #ifdef CONFIG_BLACKFIN
474 static inline int musb_read_fifosize(struct musb *musb,
475 struct musb_hw_ep *hw_ep, u8 epnum)
476 {
477 musb->nr_endpoints++;
478 musb->epmask |= (1 << epnum);
480 if (epnum < 5) {
481 hw_ep->max_packet_sz_tx = 128;
482 hw_ep->max_packet_sz_rx = 128;
483 } else {
484 hw_ep->max_packet_sz_tx = 1024;
485 hw_ep->max_packet_sz_rx = 1024;
486 }
487 hw_ep->is_shared_fifo = false;
489 return 0;
490 }
492 static inline void musb_configure_ep0(struct musb *musb)
493 {
494 musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
495 musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
496 musb->endpoints[0].is_shared_fifo = true;
497 }
499 #else
501 static inline int musb_read_fifosize(struct musb *musb,
502 struct musb_hw_ep *hw_ep, u8 epnum)
503 {
504 void *mbase = musb->mregs;
505 u8 reg = 0;
507 /* read from core using indexed model */
508 reg = musb_readb(mbase, MUSB_EP_OFFSET(musb, epnum, MUSB_FIFOSIZE));
509 /* 0's returned when no more endpoints */
510 if (!reg)
511 return -ENODEV;
513 musb->nr_endpoints++;
514 musb->epmask |= (1 << epnum);
516 hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f);
518 /* shared TX/RX FIFO? */
519 if ((reg & 0xf0) == 0xf0) {
520 hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx;
521 hw_ep->is_shared_fifo = true;
522 return 0;
523 } else {
524 hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4);
525 hw_ep->is_shared_fifo = false;
526 }
528 return 0;
529 }
531 static inline void musb_configure_ep0(struct musb *musb)
532 {
533 musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
534 musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
535 musb->endpoints[0].is_shared_fifo = true;
536 }
537 #endif /* CONFIG_BLACKFIN */
540 /***************************** Glue it together *****************************/
542 extern const char musb_driver_name[];
544 extern void musb_start(struct musb *musb);
545 extern void musb_stop(struct musb *musb);
547 extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src);
548 extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst);
550 extern void musb_load_testpacket(struct musb *);
552 extern irqreturn_t musb_interrupt(struct musb *);
554 extern void musb_hnp_stop(struct musb *musb);
556 static inline void musb_platform_set_vbus(struct musb *musb, int is_on)
557 {
558 if (musb->ops->set_vbus)
559 musb->ops->set_vbus(musb, is_on);
560 }
562 static inline void musb_platform_enable(struct musb *musb)
563 {
564 if (musb->ops->enable)
565 musb->ops->enable(musb);
566 }
568 static inline void musb_platform_disable(struct musb *musb)
569 {
570 if (musb->ops->disable)
571 musb->ops->disable(musb);
572 }
574 static inline int musb_platform_set_mode(struct musb *musb, u8 mode)
575 {
576 if (!musb->ops->set_mode)
577 return 0;
579 return musb->ops->set_mode(musb, mode);
580 }
582 static inline void musb_platform_try_idle(struct musb *musb,
583 unsigned long timeout)
584 {
585 if (musb->ops->try_idle)
586 musb->ops->try_idle(musb, timeout);
587 }
589 static inline int musb_platform_get_vbus_status(struct musb *musb)
590 {
591 if (!musb->ops->vbus_status)
592 return 0;
594 return musb->ops->vbus_status(musb);
595 }
597 static inline int musb_platform_init(struct musb *musb)
598 {
599 if (!musb->ops->init)
600 return -EINVAL;
602 return musb->ops->init(musb);
603 }
605 static inline int musb_platform_exit(struct musb *musb)
606 {
607 if (!musb->ops->exit)
608 return -EINVAL;
610 return musb->ops->exit(musb);
611 }
613 static inline u16 musb_platform_get_hw_revision(struct musb *musb)
614 {
615 if (!musb->ops->get_hw_revision)
616 return musb_readw(musb->mregs, MUSB_HWVERS);
618 return musb->ops->get_hw_revision(musb);
619 }
621 static inline int musb_simulate_babble_intr(struct musb *musb)
622 {
623 if (!musb->ops->simulate_babble_intr)
624 return -EINVAL;
626 return musb->ops->simulate_babble_intr(musb);
627 }
629 static inline const char *get_dma_name(struct musb *musb)
630 {
631 #ifdef CONFIG_MUSB_PIO_ONLY
632 return "pio";
633 #else
634 if (musb->ops->flags & MUSB_GLUE_DMA_INVENTRA)
635 return "dma-inventra";
636 else if (musb->ops->flags & MUSB_GLUE_DMA_CPPI)
637 return "dma-cppi3";
638 else if (musb->ops->flags & MUSB_GLUE_DMA_CPPI41)
639 return "dma-cppi41";
640 else if (musb->ops->flags & MUSB_GLUE_DMA_TUSB)
641 return "dma-tusb-omap";
642 else
643 return "?dma?";
644 #endif
645 }
647 extern void musb_gb_work(struct work_struct *data);
648 /*-------------------------- ProcFS definitions ---------------------*/
650 struct proc_dir_entry;
652 extern struct proc_dir_entry *musb_debug_create(char *name, struct musb *data);
653 extern void musb_debug_delete(char *name, struct musb *data);
654 #endif /* __MUSB_CORE_H__ */