index a490a1d79ca58323d138317399b1bf1ef11f3ba1..31dc5d7725fc2e31e1e67dba34b0dae48f6c5dd7 100644 (file)
#include <linux/err.h>
#include <linux/wl12xx.h>
#include <linux/ethtool.h>
+#include <linux/mfd/tps65910.h>
+#include <linux/pwm_backlight.h>
/* LCD controller is similar to DA850 */
#include <video/da8xx-fb.h>
#include <plat/lcdc.h>
#include <plat/usb.h>
#include <plat/mmc.h>
+#include <plat/emif.h>
#include "board-flash.h"
+#include "cpuidle33xx.h"
#include "mux.h"
#include "devices.h"
#include "hsmmc.h"
#define TLK110_SCFALLBACK_VAL 0xC11D
#define TLK110_PHYRCR_VAL 0x4000
-#ifdef CONFIG_TLK110_WORKAROUND
+#if defined(CONFIG_TLK110_WORKAROUND) || \
+ defined(CONFIG_TLK110_WORKAROUND_MODULE)
#define am335x_tlk110_phy_init()\
do { \
phy_register_fixup_for_uid(TLK110_PHY_ID,\
COLOR_ACTIVE,
};
+/* LCD backlight platform Data */
+#define AM335X_BACKLIGHT_MAX_BRIGHTNESS 100
+#define AM335X_BACKLIGHT_DEFAULT_BRIGHTNESS 100
+#define AM335X_PWM_PERIOD_NANO_SECONDS (10000 * 10)
+
+#define PWM_DEVICE_ID "ecap.0"
+
+static struct platform_pwm_backlight_data am335x_backlight_data = {
+ .pwm_id = PWM_DEVICE_ID,
+ .ch = -1,
+ .max_brightness = AM335X_BACKLIGHT_MAX_BRIGHTNESS,
+ .dft_brightness = AM335X_BACKLIGHT_DEFAULT_BRIGHTNESS,
+ .pwm_period_ns = AM335X_PWM_PERIOD_NANO_SECONDS,
+};
+
static struct lcd_ctrl_config lcd_cfg = {
&disp_panel,
.ac_bias = 255,
/* TSc controller */
#include <linux/input/ti_tscadc.h>
+#include <linux/lis3lv02d.h>
static struct resource tsc_resources[] = {
[0] = {
{NULL, 0},
};
+/* Module pin mux for uart2 */
+static struct pinmux_config uart2_pin_mux[] = {
+ {"spi0_sclk.uart2_rxd", OMAP_MUX_MODE1 | AM33XX_SLEWCTRL_SLOW |
+ AM33XX_PIN_INPUT_PULLUP},
+ {"spi0_d0.uart2_txd", OMAP_MUX_MODE1 | AM33XX_PULL_UP |
+ AM33XX_PULL_DISA |
+ AM33XX_SLEWCTRL_SLOW},
+ {NULL, 0},
+};
+
+
/*
* @pin_mux - single module pin-mux structure which defines pin-mux
* details for all its pins.
}
}
-#define AM335X_LCD_BL_PIN GPIO_TO_PIN(0, 7)
/* pinmux for usb0 drvvbus */
static struct pinmux_config usb0_pin_mux[] = {
/* Module pin mux for eCAP0 */
static struct pinmux_config ecap0_pin_mux[] = {
- {"ecap0_in_pwm0_out.gpio0_7", AM33XX_PIN_OUTPUT},
+ {"ecap0_in_pwm0_out.ecap0_in_pwm0_out",
+ OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
{NULL, 0},
};
static struct pinmux_config wl12xx_pin_mux_evm_rev1_1a[] = {
{"gpmc_a0.gpio1_16", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},
{"mcasp0_ahclkr.gpio3_17", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
- {"mcasp0_ahclkx.gpio0_17", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},
+ {"mcasp0_ahclkx.gpio3_21", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},
{NULL, 0},
};
backlight_enable = true;
}
+/* Setup pwm-backlight */
+static struct platform_device am335x_backlight = {
+ .name = "pwm-backlight",
+ .id = -1,
+ .dev = {
+ .platform_data = &am335x_backlight_data,
+ }
+};
+
static int __init ecap0_init(void)
{
int status = 0;
if (backlight_enable) {
setup_pin_mux(ecap0_pin_mux);
-
- status = gpio_request(AM335X_LCD_BL_PIN, "lcd bl\n");
- if (status < 0)
- pr_warn("Failed to request gpio for LCD backlight\n");
-
- gpio_direction_output(AM335X_LCD_BL_PIN, 1);
+ platform_device_register(&am335x_backlight);
}
return status;
}
return;
}
+/* setup uart2 */
+static void uart2_init(int evm_id, int profile)
+{
+ setup_pin_mux(uart2_pin_mux);
+ return;
+}
+
/* NAND partition information */
static struct mtd_partition am335x_nand_partitions[] = {
/* All the partition sizes are listed in terms of NAND block size */
ARRAY_SIZE(am335x_nand_partitions), 0, 0);
}
+static struct lis3lv02d_platform_data lis331dlh_pdata = {
+ .click_flags = LIS3_CLICK_SINGLE_X |
+ LIS3_CLICK_SINGLE_Y |
+ LIS3_CLICK_SINGLE_Z,
+ .wakeup_flags = LIS3_WAKEUP_X_LO | LIS3_WAKEUP_X_HI |
+ LIS3_WAKEUP_Y_LO | LIS3_WAKEUP_Y_HI |
+ LIS3_WAKEUP_Z_LO | LIS3_WAKEUP_Z_HI,
+ .irq_cfg = LIS3_IRQ1_CLICK | LIS3_IRQ2_CLICK,
+ .wakeup_thresh = 10,
+ .click_thresh_x = 10,
+ .click_thresh_y = 10,
+ .click_thresh_z = 10,
+ .g_range = 2,
+ .st_min_limits[0] = 120,
+ .st_min_limits[1] = 120,
+ .st_min_limits[2] = 140,
+ .st_max_limits[0] = 550,
+ .st_max_limits[1] = 550,
+ .st_max_limits[2] = 750,
+};
+
static struct i2c_board_info am335x_i2c_boardinfo1[] = {
{
I2C_BOARD_INFO("tlv320aic3x", 0x1b),
},
+ {
+ I2C_BOARD_INFO("lis331dlh", 0x18),
+ .platform_data = &lis331dlh_pdata,
+ },
+ {
+ I2C_BOARD_INFO("tsl2550", 0x39),
+ },
+ {
+ I2C_BOARD_INFO("tmp275", 0x48),
+ },
};
static void i2c1_init(int evm_id, int profile)
static int wl12xx_set_power(struct device *dev, int slot, int on, int vdd)
{
- if (on)
+ if (on) {
gpio_set_value(am335xevm_wlan_data.wlan_enable_gpio, 1);
+ mdelay(70);
+ }
else
gpio_set_value(am335xevm_wlan_data.wlan_enable_gpio, 0);
/* Register WLAN and BT enable pins based on the evm board revision */
if (gp_evm_revision == GP_EVM_REV_IS_1_1A) {
am335xevm_wlan_data.wlan_enable_gpio = GPIO_TO_PIN(1, 16);
- am335xevm_wlan_data.bt_enable_gpio = GPIO_TO_PIN(0, 17);
+ am335xevm_wlan_data.bt_enable_gpio = GPIO_TO_PIN(3, 21);
}
else {
am335xevm_wlan_data.wlan_enable_gpio = GPIO_TO_PIN(1, 30);
return 0;
}
-#ifdef CONFIG_TLK110_WORKAROUND
+#if defined(CONFIG_TLK110_WORKAROUND) || \
+ defined(CONFIG_TLK110_WORKAROUND_MODULE)
static int am335x_tlk110_phy_fixup(struct phy_device *phydev)
{
unsigned int val;
{usb1_init, DEV_ON_BASEBOARD, PROFILE_ALL},
{evm_nand_init, DEV_ON_DGHTR_BRD,
(PROFILE_ALL & ~PROFILE_2 & ~PROFILE_3)},
- {i2c1_init, DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_3 | PROFILE_7)},
+ {i2c1_init, DEV_ON_DGHTR_BRD, (PROFILE_ALL & ~PROFILE_2)},
{mcasp1_init, DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_3 | PROFILE_7)},
{mmc1_init, DEV_ON_DGHTR_BRD, PROFILE_2},
{mmc2_wl12xx_init, DEV_ON_BASEBOARD, (PROFILE_0 | PROFILE_3 |
{d_can_init, DEV_ON_DGHTR_BRD, PROFILE_1},
{matrix_keypad_init, DEV_ON_DGHTR_BRD, PROFILE_0},
{volume_keys_init, DEV_ON_DGHTR_BRD, PROFILE_0},
+ {uart2_init, DEV_ON_DGHTR_BRD, PROFILE_3},
{NULL, 0, 0},
};
phy_register_fixup_for_uid(BBB_PHY_ID, BBB_PHY_MASK,
beaglebone_phy_fixup);
+
+ /* Fill up global evmid */
+ am33xx_evmid_fillup(BEAGLE_BONE_OLD);
}
/* BeagleBone after Rev A3 */
am335x_mmc[0].gpio_wp = -EINVAL;
_configure_device(LOW_COST_EVM, beaglebone_dev_cfg, PROFILE_NONE);
+
+ /* Fill up global evmid */
+ am33xx_evmid_fillup(BEAGLE_BONE_A3);
}
.context = (void *)NULL,
};
+static struct regulator_init_data am335x_dummy = {
+ .constraints.always_on = true,
+};
+
+static struct regulator_consumer_supply am335x_vdd1_supply[] = {
+ REGULATOR_SUPPLY("vdd_mpu", NULL),
+};
+
+static struct regulator_init_data am335x_vdd1 = {
+ .constraints = {
+ .min_uV = 600000,
+ .max_uV = 1500000,
+ .valid_modes_mask = REGULATOR_MODE_NORMAL,
+ .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
+ .always_on = 1,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(am335x_vdd1_supply),
+ .consumer_supplies = am335x_vdd1_supply,
+};
+
+static struct tps65910_board am335x_tps65910_info = {
+ .tps65910_pmic_init_data[TPS65910_REG_VRTC] = &am335x_dummy,
+ .tps65910_pmic_init_data[TPS65910_REG_VIO] = &am335x_dummy,
+ .tps65910_pmic_init_data[TPS65910_REG_VDD1] = &am335x_vdd1,
+ .tps65910_pmic_init_data[TPS65910_REG_VDD2] = &am335x_dummy,
+ .tps65910_pmic_init_data[TPS65910_REG_VDD3] = &am335x_dummy,
+ .tps65910_pmic_init_data[TPS65910_REG_VDIG1] = &am335x_dummy,
+ .tps65910_pmic_init_data[TPS65910_REG_VDIG2] = &am335x_dummy,
+ .tps65910_pmic_init_data[TPS65910_REG_VPLL] = &am335x_dummy,
+ .tps65910_pmic_init_data[TPS65910_REG_VDAC] = &am335x_dummy,
+ .tps65910_pmic_init_data[TPS65910_REG_VAUX1] = &am335x_dummy,
+ .tps65910_pmic_init_data[TPS65910_REG_VAUX2] = &am335x_dummy,
+ .tps65910_pmic_init_data[TPS65910_REG_VAUX33] = &am335x_dummy,
+ .tps65910_pmic_init_data[TPS65910_REG_VMMC] = &am335x_dummy,
+};
+
/*
* Daughter board Detection.
* Every board has a ID memory (EEPROM) on board. We probe these devices at
{
I2C_BOARD_INFO("tlc59108", 0x40),
},
+ {
+ I2C_BOARD_INFO("tps65910", TPS65910_I2C_ID1),
+ .platform_data = &am335x_tps65910_info,
+ },
};
static struct omap_musb_board_data musb_board_data = {
.interface_type = MUSB_INTERFACE_ULPI,
- .mode = MUSB_OTG,
+ /*
+ * mode[0:3] = USB0PORT's mode
+ * mode[4:7] = USB1PORT's mode
+ * AM335X beta EVM has USB0 in OTG mode and USB1 in host mode.
+ */
+ .mode = (MUSB_HOST << 4) | MUSB_OTG,
.power = 500,
.instances = 1,
};
setup_pin_mux(clkout2_pin_mux);
}
+void __iomem *am33xx_emif_base;
+
+void __iomem * __init am33xx_get_mem_ctlr(void)
+{
+
+ am33xx_emif_base = ioremap(AM33XX_EMIF0_BASE, SZ_32K);
+
+ if (!am33xx_emif_base)
+ pr_warning("%s: Unable to map DDR2 controller", __func__);
+
+ return am33xx_emif_base;
+}
+
+void __iomem *am33xx_get_ram_base(void)
+{
+ return am33xx_emif_base;
+}
+
+static struct resource am33xx_cpuidle_resources[] = {
+ {
+ .start = AM33XX_EMIF0_BASE,
+ .end = AM33XX_EMIF0_BASE + SZ_32K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+/* AM33XX devices support DDR2 power down */
+static struct am33xx_cpuidle_config am33xx_cpuidle_pdata = {
+ .ddr2_pdown = 1,
+};
+
+static struct platform_device am33xx_cpuidle_device = {
+ .name = "cpuidle-am33xx",
+ .num_resources = ARRAY_SIZE(am33xx_cpuidle_resources),
+ .resource = am33xx_cpuidle_resources,
+ .dev = {
+ .platform_data = &am33xx_cpuidle_pdata,
+ },
+};
+
+static void __init am33xx_cpuidle_init(void)
+{
+ int ret;
+
+ am33xx_cpuidle_pdata.emif_base = am33xx_get_mem_ctlr();
+
+ ret = platform_device_register(&am33xx_cpuidle_device);
+
+ if (ret)
+ pr_warning("AM33XX cpuidle registration failed\n");
+
+}
+
static void __init am335x_evm_init(void)
{
+ am33xx_cpuidle_init();
am33xx_mux_init(board_mux);
omap_serial_init();
am335x_rtc_init();
usb_musb_init(&musb_board_data);
omap_board_config = am335x_evm_config;
omap_board_config_size = ARRAY_SIZE(am335x_evm_config);
+ /* Create an alias for icss clock */
+ if (clk_add_alias("pruss", NULL, "icss_uart_gclk", NULL))
+ pr_err("failed to create an alias: icss_uart_gclk --> pruss\n");
+ /* Create an alias for gfx/sgx clock */
+ if (clk_add_alias("sgx_ck", NULL, "gfx_fclk", NULL))
+ pr_err("failed to create an alias: gfx_fclk --> sgx_ck\n");
}
static void __init am335x_evm_map_io(void)