index d95f3f945d4a6cebbbce97ea583039308a873084..0e540c8c2a357bcd31e73d368364e6a373ac43d4 100644 (file)
OPP_INITIALIZER("iva", false, 800000000, OMAP3630_VDD_MPU_OPP1G_UV),
};
+/* 33xx */
+
+/* VDD1 */
+
+#define AM33XX_VDD_MPU_OPP50_UV 950000
+#define AM33XX_VDD_MPU_OPP100_UV 1100000
+#define AM33XX_VDD_MPU_OPP120_UV 1200000
+#define AM33XX_VDD_MPU_OPPTURBO_UV 1260000
+
+static struct omap_opp_def __initdata am33xx_opp_def_list[] = {
+ /* MPU OPP1 - OPP50 */
+ OPP_INITIALIZER("mpu", true, 275000000, AM33XX_VDD_MPU_OPP50_UV),
+ /* MPU OPP2 - OPP100 */
+ OPP_INITIALIZER("mpu", true, 500000000, AM33XX_VDD_MPU_OPP100_UV),
+ /* MPU OPP3 - OPP120 */
+ OPP_INITIALIZER("mpu", true, 600000000, AM33XX_VDD_MPU_OPP120_UV),
+ /* MPU OPP4 - OPPTurbo */
+ OPP_INITIALIZER("mpu", true, 720000000, AM33XX_VDD_MPU_OPPTURBO_UV),
+};
+
/**
* omap3_opp_init() - initialize omap3 opp table
*/
if (cpu_is_omap3630())
r = omap_init_opp_table(omap36xx_opp_def_list,
ARRAY_SIZE(omap36xx_opp_def_list));
+ else if (cpu_is_am33xx())
+ r = omap_init_opp_table(am33xx_opp_def_list,
+ ARRAY_SIZE(am33xx_opp_def_list));
else
r = omap_init_opp_table(omap34xx_opp_def_list,
ARRAY_SIZE(omap34xx_opp_def_list));