ARM: OMAP2+: hwmod: Add two new sysc_field types

[sitara-epos/sitara-epos-kernel.git] / arch / arm / plat-omap / include / plat / omap_hwmod.h

diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 53ccf2da52a114eb98b589be1bbdb9e55d6acbaa..a3b8b5c3a6bf08b27dfecf611edc6970c01c90aa 100644 (file)
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -41,6 +41,8 @@ struct omap_device;
 
 extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type1;
 extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2;
+extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type3;
+extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type4;
 
 /*
  * OCP SYSCONFIG bit shifts/masks TYPE1. These are for IPs compliant
@@ -70,6 +72,32 @@ extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2;
 #define SYSC_TYPE2_MIDLEMODE_SHIFT     4
 #define SYSC_TYPE2_MIDLEMODE_MASK      (0x3 << SYSC_TYPE2_MIDLEMODE_SHIFT)
 
+/*
+ * OCP SYSCONFIG bit shifts/masks TYPE3.
+ * This is applicable for some IPs present in AM33XX
+ */
+#define SYSC_TYPE3_SIDLEMODE_SHIFT     0
+#define SYSC_TYPE3_SIDLEMODE_MASK      (0x3 << SYSC_TYPE3_SIDLEMODE_SHIFT)
+#define SYSC_TYPE3_MIDLEMODE_SHIFT     2
+#define SYSC_TYPE3_MIDLEMODE_MASK      (0x3 << SYSC_TYPE3_MIDLEMODE_SHIFT)
+
+/*
+ * OCP SYSCONFIG bit shifts/masks TYPE4.
+ * This is applicable for some IPs present in AM33XX
+ */
+#define SYSC_TYPE4_CLOCKACTIVITY_SHIFT 8
+#define SYSC_TYPE4_CLOCKACTIVITY_MASK  (0x3 << SYSC_CLOCKACTIVITY_SHIFT)
+#define SYSC_TYPE4_MIDLEMODE_SHIFT     5
+#define SYSC_TYPE4_MIDLEMODE_MASK      (0x3 << SYSC_MIDLEMODE_SHIFT)
+#define SYSC_TYPE4_SIDLEMODE_SHIFT     3
+#define SYSC_TYPE4_SIDLEMODE_MASK      (0x3 << SYSC_SIDLEMODE_SHIFT)
+#define SYSC_TYPE4_ENAWAKEUP_SHIFT     2
+#define SYSC_TYPE4_ENAWAKEUP_MASK      (1 << SYSC_ENAWAKEUP_SHIFT)
+#define SYSC_TYPE4_SOFTRESET_SHIFT     1
+#define SYSC_TYPE4_SOFTRESET_MASK      (1 << SYSC_SOFTRESET_SHIFT)
+#define SYSC_TYPE4_AUTOIDLE_SHIFT      0
+#define SYSC_TYPE4_AUTOIDLE_MASK       (1 << SYSC_AUTOIDLE_SHIFT)
+
 /* OCP SYSSTATUS bit shifts/masks */
 #define SYSS_RESETDONE_SHIFT           0
 #define SYSS_RESETDONE_MASK            (1 << SYSS_RESETDONE_SHIFT)
@@ -569,6 +597,7 @@ int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name);
 int omap_hwmod_enable_clocks(struct omap_hwmod *oh);
 int omap_hwmod_disable_clocks(struct omap_hwmod *oh);
 
+int omap_hwmod_set_master_standbymode(struct omap_hwmod *oh, u8 idlemode);
 int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode);
 int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle);