index 343c4f9e2103c57002f8db9394245ede23b4604b..09544e18acb6d409597ab41d0a9e99ef6db5ea10 100644 (file)
__raw_writel(0xCFDE, OMAP24XX_VA_READPERM0); /* all i-read */
__raw_writel(0xCFDE, OMAP24XX_VA_WRITEPERM0); /* all i-write */
}
- if (cpu_is_omap34xx()) {
+ if (cpu_is_omap34xx() && !cpu_is_am33xx()) {
__raw_writel(0xFFFF, OMAP34XX_VA_REQINFOPERM0); /* all q-vects */
__raw_writel(0xFFFF, OMAP34XX_VA_READPERM0); /* all i-read */
__raw_writel(0xFFFF, OMAP34XX_VA_WRITEPERM0); /* all i-write */
{
if (cpu_class_is_omap2()) {
if (is_sram_locked()) {
- if (cpu_is_omap34xx()) {
+ if (cpu_is_omap34xx() && !cpu_is_am33xx()) {
omap_sram_start = OMAP3_SRAM_PUB_PA;
if ((omap_type() == OMAP2_DEVICE_TYPE_EMU) ||
(omap_type() == OMAP2_DEVICE_TYPE_SEC)) {
omap_sram_size = 0x800; /* 2K */
}
} else {
- if (cpu_is_omap34xx()) {
+ if (cpu_is_omap34xx() && !cpu_is_am33xx()) {
omap_sram_start = OMAP3_SRAM_PA;
omap_sram_size = 0x10000; /* 64K */
} else if (cpu_is_omap44xx()) {
omap_sram_start = OMAP4_SRAM_PA;
omap_sram_size = 0xe000; /* 56K */
+ } else if (cpu_is_am33xx()) {
+ omap_sram_start = AM33XX_SRAM_PA;
+ omap_sram_size = 0x10000; /* 64K */
} else {
omap_sram_start = OMAP2_SRAM_PA;
if (cpu_is_omap242x())
omap_sram_size = 0x4000;
}
}
- {
- /* The first SRAM_BOOTLOADER_SZ of SRAM are reserved */
- void *base = (void *)omap_sram_base + SRAM_BOOTLOADER_SZ;
- phys_addr_t phys = omap_sram_start + SRAM_BOOTLOADER_SZ;
- size_t len = omap_sram_size - SRAM_BOOTLOADER_SZ;
-
- omap_gen_pool = gen_pool_create(ilog2(FNCPY_ALIGN), -1);
- if (omap_gen_pool)
- WARN_ON(gen_pool_add_virt(omap_gen_pool,
- (unsigned long)base, phys, len, -1));
- WARN_ON(!omap_gen_pool);
- }
}
/*
*/
memset((void *)omap_sram_base + SRAM_BOOTLOADER_SZ, 0,
omap_sram_size - SRAM_BOOTLOADER_SZ);
+ {
+ /* The first SRAM_BOOTLOADER_SZ of SRAM are reserved */
+ void *base = (void *)omap_sram_base + SRAM_BOOTLOADER_SZ;
+ phys_addr_t phys = omap_sram_start + SRAM_BOOTLOADER_SZ;
+ size_t len = omap_sram_size - SRAM_BOOTLOADER_SZ;
+
+ omap_gen_pool = gen_pool_create(ilog2(FNCPY_ALIGN), -1);
+ if (omap_gen_pool)
+ WARN_ON(gen_pool_add_virt(omap_gen_pool,
+ (unsigned long)base, phys, len, -1));
+ WARN_ON(!omap_gen_pool);
+ }
}
#ifdef CONFIG_ARCH_OMAP1
return 0;
}
-int __init omap_sram_init(void)
+static inline int am33xx_sram_init(void)
{
- if (cpu_is_am33xx())
- return 0;
+ am33xx_push_sram_idle();
+ return 0;
+}
+int __init omap_sram_init(void)
+{
omap_detect_sram();
omap_map_sram();
omap242x_sram_init();
else if (cpu_is_omap2430())
omap243x_sram_init();
- else if (cpu_is_omap34xx())
+ else if (cpu_is_omap34xx() && !cpu_is_am33xx())
omap34xx_sram_init();
+ else if (cpu_is_am33xx())
+ am33xx_sram_init();
return 0;
}