index 8b28664d1c62634b0d8ec68e62f1a23a5d06a27a..24100b528f88666e77795b0953aa22751aab7349 100644 (file)
#define OMAP1_SRAM_PA 0x20000000
#define OMAP2_SRAM_PUB_PA (OMAP2_SRAM_PA + 0xf800)
#define OMAP3_SRAM_PUB_PA (OMAP3_SRAM_PA + 0x8000)
+#ifdef CONFIG_OMAP4_ERRATA_I688
+#define OMAP4_SRAM_PUB_PA OMAP4_SRAM_PA
+#else
#define OMAP4_SRAM_PUB_PA (OMAP4_SRAM_PA + 0x4000)
+#endif
#if defined(CONFIG_ARCH_OMAP2PLUS)
#define SRAM_BOOTLOADER_SZ 0x00
static unsigned long omap_sram_start;
static void __iomem *omap_sram_base;
static unsigned long omap_sram_size;
-static void __iomem *omap_sram_ceil;
/*
* Depending on the target RAMFS firewall setup, the public usable amount of
return 1; /* assume locked with no PPA or security driver */
}
+struct gen_pool *omap_gen_pool;
+EXPORT_SYMBOL_GPL(omap_gen_pool);
+
/*
* The amount of SRAM depends on the core type.
* Note that we cannot try to test for SRAM here because writes
omap_sram_size = 0x32000; /* 200K */
else if (cpu_is_omap15xx())
omap_sram_size = 0x30000; /* 192K */
- else if (cpu_is_omap1610() || cpu_is_omap1621() ||
- cpu_is_omap1710())
+ else if (cpu_is_omap1610() || cpu_is_omap1611() ||
+ cpu_is_omap1621() || cpu_is_omap1710())
omap_sram_size = 0x4000; /* 16K */
- else if (cpu_is_omap1611())
- omap_sram_size = SZ_256K;
else {
pr_err("Could not detect SRAM size\n");
omap_sram_size = 0x4000;
if (omap_sram_size == 0)
return;
+#ifdef CONFIG_OMAP4_ERRATA_I688
+ omap_sram_start += PAGE_SIZE;
+ omap_sram_size -= SZ_16K;
+#endif
if (cpu_is_omap34xx()) {
/*
* SRAM must be marked as non-cached on OMAP3 since the
return;
}
- omap_sram_ceil = omap_sram_base + omap_sram_size;
-
/*
* Looks like we need to preserve some bootloader code at the
* beginning of SRAM for jumping to flash for reboot to work...
*/
memset((void *)omap_sram_base + SRAM_BOOTLOADER_SZ, 0,
omap_sram_size - SRAM_BOOTLOADER_SZ);
-}
-
-/*
- * Memory allocator for SRAM: calculates the new ceiling address
- * for pushing a function using the fncpy API.
- *
- * Note that fncpy requires the returned address to be aligned
- * to an 8-byte boundary.
- */
-void *omap_sram_push_address(unsigned long size)
-{
- unsigned long available, new_ceil = (unsigned long)omap_sram_ceil;
-
- available = omap_sram_ceil - (omap_sram_base + SRAM_BOOTLOADER_SZ);
-
- if (size > available) {
- pr_err("Not enough space in SRAM\n");
- return NULL;
+ {
+ /* The first SRAM_BOOTLOADER_SZ of SRAM are reserved */
+ void *base = (void *)omap_sram_base + SRAM_BOOTLOADER_SZ;
+ phys_addr_t phys = omap_sram_start + SRAM_BOOTLOADER_SZ;
+ size_t len = omap_sram_size - SRAM_BOOTLOADER_SZ;
+
+ omap_gen_pool = gen_pool_create(ilog2(FNCPY_ALIGN), -1);
+ if (omap_gen_pool)
+ WARN_ON(gen_pool_add_virt(omap_gen_pool,
+ (unsigned long)base, phys, len, -1));
+ WARN_ON(!omap_gen_pool);
}
-
- new_ceil -= size;
- new_ceil = ROUND_DOWN(new_ceil, FNCPY_ALIGN);
- omap_sram_ceil = IOMEM(new_ceil);
-
- return (void *)omap_sram_ceil;
}
#ifdef CONFIG_ARCH_OMAP1
void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl)
{
BUG_ON(!_omap_sram_reprogram_clock);
+ /* On 730, bit 13 must always be 1 */
+ if (cpu_is_omap7xx())
+ ckctl |= 0x2000;
_omap_sram_reprogram_clock(dpllctl, ckctl);
}
#ifdef CONFIG_PM
void omap3_sram_restore_context(void)
{
- omap_sram_ceil = omap_sram_base + omap_sram_size;
-
_omap3_sram_configure_core_dpll =
omap_sram_push(omap3_sram_configure_core_dpll,
omap3_sram_configure_core_dpll_sz);
int __init omap_sram_init(void)
{
+ if (cpu_is_am33xx())
+ return 0;
+
omap_detect_sram();
omap_map_sram();