index 4243bdcc87bcb99fe8ba3f26341757cd47ea41d9..ff0b66f1b285b7541454a4b54552889139004124 100644 (file)
static unsigned long omap_sram_start;
static void __iomem *omap_sram_base;
static unsigned long omap_sram_size;
-static void __iomem *omap_sram_ceil;
/*
* Depending on the target RAMFS firewall setup, the public usable amount of
__raw_writel(0xCFDE, OMAP24XX_VA_READPERM0); /* all i-read */
__raw_writel(0xCFDE, OMAP24XX_VA_WRITEPERM0); /* all i-write */
}
- if (cpu_is_omap34xx()) {
+ if (cpu_is_omap34xx() && !cpu_is_am33xx()) {
__raw_writel(0xFFFF, OMAP34XX_VA_REQINFOPERM0); /* all q-vects */
__raw_writel(0xFFFF, OMAP34XX_VA_READPERM0); /* all i-read */
__raw_writel(0xFFFF, OMAP34XX_VA_WRITEPERM0); /* all i-write */
return 1; /* assume locked with no PPA or security driver */
}
+struct gen_pool *omap_gen_pool;
+EXPORT_SYMBOL_GPL(omap_gen_pool);
+
/*
* The amount of SRAM depends on the core type.
* Note that we cannot try to test for SRAM here because writes
{
if (cpu_class_is_omap2()) {
if (is_sram_locked()) {
- if (cpu_is_omap34xx()) {
+ if (cpu_is_omap34xx() && !cpu_is_am33xx()) {
omap_sram_start = OMAP3_SRAM_PUB_PA;
if ((omap_type() == OMAP2_DEVICE_TYPE_EMU) ||
(omap_type() == OMAP2_DEVICE_TYPE_SEC)) {
omap_sram_size = 0x800; /* 2K */
}
} else {
- if (cpu_is_omap34xx()) {
+ if (cpu_is_omap34xx() && !cpu_is_am33xx()) {
omap_sram_start = OMAP3_SRAM_PA;
omap_sram_size = 0x10000; /* 64K */
} else if (cpu_is_omap44xx()) {
omap_sram_start = OMAP4_SRAM_PA;
omap_sram_size = 0xe000; /* 56K */
+ } else if (cpu_is_am33xx()) {
+ omap_sram_start = AM33XX_SRAM_PA;
+ omap_sram_size = 0x10000; /* 64K */
} else {
omap_sram_start = OMAP2_SRAM_PA;
if (cpu_is_omap242x())
return;
}
- omap_sram_ceil = omap_sram_base + omap_sram_size;
-
/*
* Looks like we need to preserve some bootloader code at the
* beginning of SRAM for jumping to flash for reboot to work...
*/
memset((void *)omap_sram_base + SRAM_BOOTLOADER_SZ, 0,
omap_sram_size - SRAM_BOOTLOADER_SZ);
-}
-
-/*
- * Memory allocator for SRAM: calculates the new ceiling address
- * for pushing a function using the fncpy API.
- *
- * Note that fncpy requires the returned address to be aligned
- * to an 8-byte boundary.
- */
-void *omap_sram_push_address(unsigned long size)
-{
- unsigned long available, new_ceil = (unsigned long)omap_sram_ceil;
-
- available = omap_sram_ceil - (omap_sram_base + SRAM_BOOTLOADER_SZ);
-
- if (size > available) {
- pr_err("Not enough space in SRAM\n");
- return NULL;
+ {
+ /* The first SRAM_BOOTLOADER_SZ of SRAM are reserved */
+ void *base = (void *)omap_sram_base + SRAM_BOOTLOADER_SZ;
+ phys_addr_t phys = omap_sram_start + SRAM_BOOTLOADER_SZ;
+ size_t len = omap_sram_size - SRAM_BOOTLOADER_SZ;
+
+ omap_gen_pool = gen_pool_create(ilog2(FNCPY_ALIGN), -1);
+ if (omap_gen_pool)
+ WARN_ON(gen_pool_add_virt(omap_gen_pool,
+ (unsigned long)base, phys, len, -1));
+ WARN_ON(!omap_gen_pool);
}
-
- new_ceil -= size;
- new_ceil = ROUND_DOWN(new_ceil, FNCPY_ALIGN);
- omap_sram_ceil = IOMEM(new_ceil);
-
- return (void *)omap_sram_ceil;
}
#ifdef CONFIG_ARCH_OMAP1
#ifdef CONFIG_PM
void omap3_sram_restore_context(void)
{
- omap_sram_ceil = omap_sram_base + omap_sram_size;
-
_omap3_sram_configure_core_dpll =
omap_sram_push(omap3_sram_configure_core_dpll,
omap3_sram_configure_core_dpll_sz);
return 0;
}
+static inline int am33xx_sram_init(void)
+{
+ return 0;
+}
+
int __init omap_sram_init(void)
{
omap_detect_sram();
omap242x_sram_init();
else if (cpu_is_omap2430())
omap243x_sram_init();
- else if (cpu_is_omap34xx())
+ else if (cpu_is_omap34xx() && !cpu_is_am33xx())
omap34xx_sram_init();
+ else if (cpu_is_am33xx())
+ am33xx_sram_init();
return 0;
}