| author | Vaibhav Bedia <vaibhav.bedia@ti.com> | |
| Mon, 10 Oct 2011 15:15:05 +0000 (20:45 +0530) | ||
| committer | Vaibhav Hiremath <hvaibhav@ti.com> | |
| Mon, 23 Jan 2012 19:14:27 +0000 (00:44 +0530) | ||
| commit | 1d780038b5ecb4c75e697fc9cadb936d3026fcb4 | |
| tree | 8e257a0fff832ae92186711160aa092ae1a81f98 | tree | snapshot (tar.xz tar.gz zip) |
| parent | 3320573b9efc1a88e4eaf67972d979263f8b255b | commit | diff |
arm:omap:mcspi - DMA support has added for MCSPI
Support for DMA transmission on MCSPI added.
1. MCSPI TX and RX registers are not 256-bit aligned address, as
required for Constant address mode in DAM and SAM in EDMA, causing EDMA
error generation condition. With this commit SAM and DAM are set to
Increment address mode.
2. SPI uses EDMA AB synchronized mode for transmission and EDMA A
synchronized mode for reception, which can be used to handle large chunk
of data above 64KB with single EDMA completion interrupt.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Support for DMA transmission on MCSPI added.
1. MCSPI TX and RX registers are not 256-bit aligned address, as
required for Constant address mode in DAM and SAM in EDMA, causing EDMA
error generation condition. With this commit SAM and DAM are set to
Increment address mode.
2. SPI uses EDMA AB synchronized mode for transmission and EDMA A
synchronized mode for reception, which can be used to handle large chunk
of data above 64KB with single EDMA completion interrupt.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
| drivers/spi/spi-omap2-mcspi.c | diff | blob | history |