arm:omap:am335x: Corrects cpsw sa_lo and sa_hi offset
authorChandan Nath <chandan.nath@ti.com>
Fri, 21 Oct 2011 09:42:06 +0000 (15:12 +0530)
committerVaibhav Hiremath <hvaibhav@ti.com>
Mon, 23 Jan 2012 19:14:33 +0000 (00:44 +0530)
commit4e0eb1b7be40735771436fa3060c7cb23caa3f0f
treef2e9a9994492b41e2c82831f1c6d4c9f539923e7
parent33f41e93ebf0db86e8039cc5c9882264fb1be117
arm:omap:am335x: Corrects cpsw sa_lo and sa_hi offset

This patch is added to correct register offset of cpgmac
sl1 source low register address and cpgmac sl2 source high
register address. The register offset were 0x21c, 0x220 and
0x31c, 0x320. Instead they are corrected as 0x220, 0x224 and
0x320, 0x324. This is corrected by adding missing P1_TS_SEQ_MTYPE
register in cpsw_slave_reg structure.

Signed-off-by: Chandan Nath <chandan.nath@ti.com>
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
drivers/net/ethernet/ti/cpsw.c