]> Gitweb @ Texas Instruments - Open Source Git Repositories - git.TI.com/gitweb - sitara-epos/sitara-epos-kernel.git/commit
ARM:omap:am33xx: Implement CPSW interrupt pacing functionality
authorChandan Nath <chandan.nath@ti.com>
Wed, 23 Nov 2011 13:13:19 +0000 (18:43 +0530)
committerVaibhav Hiremath <hvaibhav@ti.com>
Mon, 23 Jan 2012 19:14:37 +0000 (00:44 +0530)
commit7124162daf8e74713193d9669dd59ae9c50b47f6
tree011b183545911b0fbf9d9f77f1e801dad796db85
parent8c32c4f2798e652d51920bfdd9d5ad32be68f565
ARM:omap:am33xx: Implement CPSW interrupt pacing functionality

CPSW module includes an interrupt pacing block that can
be programmed to throttle the rate at which interrupts are
generated. This patch implements interrupt pacing logic that can
be controlled through the ethtool interface(only rx_coalesce_usecs
param is honored)

Signed-off-by: Chandan Nath <chandan.nath@ti.com>
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
drivers/net/ethernet/ti/cpsw.c