ARM: OMAP: AM33XX: Yet one more DS0 update
authorVaibhav Bedia <vaibhav.bedia@ti.com>
Thu, 8 Mar 2012 14:42:15 +0000 (20:12 +0530)
committerVaibhav Bedia <vaibhav.bedia@ti.com>
Fri, 9 Mar 2012 19:08:30 +0000 (00:38 +0530)
commita94174da51e75ed1569f721f8f617e9c191206a1
tree7de0d353a8e3ebf965554b993b5c8cadcc404b51
parent8ff773a0085d444def001a9e2ee7fd8c3f3cc90a
ARM: OMAP: AM33XX: Yet one more DS0 update

When suspending the PHY is programmed in mDDR mode
and the PLLs put in LP bypass mode.

While at it also cleanup the low level assembly code
and PM code. Also fixup the error message in case of
suspend failure

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
arch/arm/mach-omap2/pm33xx.c
arch/arm/mach-omap2/pm33xx.h
arch/arm/mach-omap2/powerdomains33xx_data.c
arch/arm/mach-omap2/sleep33xx.S