author | Vaibhav Bedia <vaibhav.bedia@ti.com> | |
Thu, 8 Mar 2012 14:42:15 +0000 (20:12 +0530) | ||
committer | Vaibhav Bedia <vaibhav.bedia@ti.com> | |
Fri, 9 Mar 2012 19:08:30 +0000 (00:38 +0530) | ||
commit | a94174da51e75ed1569f721f8f617e9c191206a1 | |
tree | 7de0d353a8e3ebf965554b993b5c8cadcc404b51 | tree | snapshot (tar.xz tar.gz zip) |
parent | 8ff773a0085d444def001a9e2ee7fd8c3f3cc90a | commit | diff |
ARM: OMAP: AM33XX: Yet one more DS0 update
When suspending the PHY is programmed in mDDR mode
and the PLLs put in LP bypass mode.
While at it also cleanup the low level assembly code
and PM code. Also fixup the error message in case of
suspend failure
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
When suspending the PHY is programmed in mDDR mode
and the PLLs put in LP bypass mode.
While at it also cleanup the low level assembly code
and PM code. Also fixup the error message in case of
suspend failure
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>