arm: omap: am33xx: update TSC hwmod data

Sysconfig register bits are updated for TSC
hwmod. TSC supports idle mode at bit position 2&3,
hence following omap4 IP's.

Signed-off-by: Patil, Rachna <rachna@ti.com>

diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
index f9b91fa988511b0110522033527e02fd86b5dc52..77030e41a3587e1c3a0919433114c9f35531b0a5 100644 (file)
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
@@ -277,8 +277,18 @@ static struct omap_hwmod am33xx_l4wkup_hwmod = {
 };
 
 /* 'adc_tsc' class */
+static struct omap_hwmod_class_sysconfig am33xx_adc_tsc_sysc = {
+       .rev_offs       = 0x00,
+       .sysc_offs      = 0x10,
+       .sysc_flags     = SYSC_HAS_SIDLEMODE,
+       .idlemodes      = (SIDLE_FORCE | SIDLE_NO |
+                               SIDLE_SMART | SIDLE_SMART_WKUP),
+       .sysc_fields    = &omap_hwmod_sysc_type2,
+};
+
 static struct omap_hwmod_class am33xx_adc_tsc_hwmod_class = {
        .name           = "adc_tsc",
+       .sysc           = &am33xx_adc_tsc_sysc,
 };
 
 /* adc_tsc */