summary | shortlog | log | commit | commitdiff | tree
raw | patch | inline | side by side (parent: bee4571)
raw | patch | inline | side by side (parent: bee4571)
author | Sugumar Natarajan <sugumar@ti.com> | |
Wed, 20 Jul 2011 15:07:00 +0000 (20:37 +0530) | ||
committer | Vaibhav Hiremath <hvaibhav@ti.com> | |
Mon, 23 Jan 2012 19:14:21 +0000 (00:44 +0530) |
NAND flash device support is added.
1. Pin-muxing enabled for profiles.
2. NAND partition information is added.
Signed-off-by: Sugumar Natarajan <sugumar@ti.com>
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
1. Pin-muxing enabled for profiles.
2. NAND partition information is added.
Signed-off-by: Sugumar Natarajan <sugumar@ti.com>
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
arch/arm/mach-omap2/board-am335xevm.c | patch | blob | history |
index 888e88bde54584272e1991fa1a4901ddd15256a9..74edfa959ba0246f6f9dea4bdf6630f6677525ac 100644 (file)
#include <linux/module.h>
#include <linux/i2c/at24.h>
#include <linux/gpio.h>
#include <linux/module.h>
#include <linux/i2c/at24.h>
#include <linux/gpio.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/partitions.h>
+#include <linux/platform_device.h>
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/clk.h>
#include <linux/err.h>
.resource = tsc_resources,
};
.resource = tsc_resources,
};
+#include "board-flash.h"
#include "mux.h"
#ifdef CONFIG_OMAP_MUX
#include "mux.h"
#ifdef CONFIG_OMAP_MUX
{NULL, 0},
};
{NULL, 0},
};
+/* Pin mux for nand flash module */
+static struct pinmux_config nand_pin_mux[] = {
+ {"gpmc_ad0.gpmc_ad0", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
+ {"gpmc_ad1.gpmc_ad1", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
+ {"gpmc_ad2.gpmc_ad2", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
+ {"gpmc_ad3.gpmc_ad3", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
+ {"gpmc_ad4.gpmc_ad4", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
+ {"gpmc_ad5.gpmc_ad5", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
+ {"gpmc_ad6.gpmc_ad6", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
+ {"gpmc_ad7.gpmc_ad7", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
+ {"gpmc_wait0.gpmc_wait0", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
+ {"gpmc_wpn.gpmc_wpn", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},
+ {"gpmc_csn0.gpmc_csn0", OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
+ {"gpmc_advn_ale.gpmc_advn_ale", OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
+ {"gpmc_oen_ren.gpmc_oen_ren", OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
+ {"gpmc_wen.gpmc_wen", OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
+ {"gpmc_ben0_cle.gpmc_ben0_cle", OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
+ {NULL, 0},
+};
+
/* Module pin mux for rgmii1 */
static struct pinmux_config rgmii1_pin_mux[] = {
/* Module pin mux for rgmii1 */
static struct pinmux_config rgmii1_pin_mux[] = {
{NULL, 0},
};
{NULL, 0},
};
+
/*
* @pin_mux - single module pin-mux structure which defines pin-mux
* details for all its pins.
/*
* @pin_mux - single module pin-mux structure which defines pin-mux
* details for all its pins.
return;
}
return;
}
+/* NAND partition information */
+static struct mtd_partition am335x_nand_partitions[] = {
+/* All the partition sizes are listed in terms of NAND block size */
+ {
+ .name = "SPL",
+ .offset = 0, /* Offset = 0x0 */
+ .size = SZ_128K,
+ .mask_flags = MTD_WRITEABLE, /* force read-only */
+ },
+ {
+ .name = "SPL.backup1",
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x20000 */
+ .size = SZ_128K,
+ .mask_flags = MTD_WRITEABLE, /* force read-only */
+ },
+ {
+ .name = "SPL.backup2",
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x40000 */
+ .size = SZ_128K,
+ .mask_flags = MTD_WRITEABLE, /* force read-only */
+ },
+ {
+ .name = "SPL.backup3",
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x60000 */
+ .size = SZ_128K,
+ .mask_flags = MTD_WRITEABLE, /* force read-only */
+ },
+ {
+ .name = "U-Boot",
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
+ .size = 15 * SZ_128K,
+ .mask_flags = MTD_WRITEABLE, /* force read-only */
+ },
+ {
+ .name = "U-Boot Env",
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */
+ .size = 1 * SZ_128K,
+ },
+ {
+ .name = "Kernel",
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
+ .size = 40 * SZ_128K,
+ },
+ {
+ .name = "File System",
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x780000 */
+ .size = MTDPART_SIZ_FULL,
+ },
+};
+
+static void evm_nand_init(int evm_id, int profile)
+{
+ setup_pin_mux(nand_pin_mux);
+ board_nand_init(am335x_nand_partitions,
+ ARRAY_SIZE(am335x_nand_partitions), 0, 0);
+}
+
/* Low-Cost EVM */
static struct evm_dev_cfg low_cost_evm_dev_cfg[] = {
{rgmii1_init, DEV_ON_BASEBOARD, PROFILE_NONE},
{usb0_init, DEV_ON_BASEBOARD, PROFILE_NONE},
{usb1_init, DEV_ON_BASEBOARD, PROFILE_NONE},
/* Low-Cost EVM */
static struct evm_dev_cfg low_cost_evm_dev_cfg[] = {
{rgmii1_init, DEV_ON_BASEBOARD, PROFILE_NONE},
{usb0_init, DEV_ON_BASEBOARD, PROFILE_NONE},
{usb1_init, DEV_ON_BASEBOARD, PROFILE_NONE},
+ {evm_nand_init, DEV_ON_BASEBOARD, PROFILE_NONE},
{NULL, 0, 0},
};
{NULL, 0, 0},
};
PROFILE_4 | PROFILE_6) },
{usb0_init, DEV_ON_BASEBOARD, PROFILE_ALL},
{usb1_init, DEV_ON_BASEBOARD, PROFILE_ALL},
PROFILE_4 | PROFILE_6) },
{usb0_init, DEV_ON_BASEBOARD, PROFILE_ALL},
{usb1_init, DEV_ON_BASEBOARD, PROFILE_ALL},
+ {evm_nand_init, DEV_ON_DGHTR_BRD,
+ (PROFILE_ALL & ~PROFILE_2 & ~PROFILE_3)},
{NULL, 0, 0},
};
{NULL, 0, 0},
};
{mii1_init, DEV_ON_DGHTR_BRD, PROFILE_ALL},
{usb0_init, DEV_ON_BASEBOARD, PROFILE_ALL},
{usb1_init, DEV_ON_BASEBOARD, PROFILE_ALL},
{mii1_init, DEV_ON_DGHTR_BRD, PROFILE_ALL},
{usb0_init, DEV_ON_BASEBOARD, PROFILE_ALL},
{usb1_init, DEV_ON_BASEBOARD, PROFILE_ALL},
+ {evm_nand_init, DEV_ON_DGHTR_BRD, PROFILE_ALL},
{NULL, 0, 0},
};
{NULL, 0, 0},
};
{rgmii2_init, DEV_ON_DGHTR_BRD, PROFILE_NONE},
{usb0_init, DEV_ON_BASEBOARD, PROFILE_NONE},
{usb1_init, DEV_ON_BASEBOARD, PROFILE_NONE},
{rgmii2_init, DEV_ON_DGHTR_BRD, PROFILE_NONE},
{usb0_init, DEV_ON_BASEBOARD, PROFILE_NONE},
{usb1_init, DEV_ON_BASEBOARD, PROFILE_NONE},
+ {evm_nand_init, DEV_ON_DGHTR_BRD, PROFILE_NONE},
{NULL, 0, 0},
};
{NULL, 0, 0},
};