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raw | patch | inline | side by side (parent: a9e22f9)
raw | patch | inline | side by side (parent: a9e22f9)
author | Hebbar, Gururaja <gururaja.hebbar@ti.com> | |
Fri, 7 Oct 2011 14:42:08 +0000 (20:12 +0530) | ||
committer | Vaibhav Hiremath <hvaibhav@ti.com> | |
Mon, 23 Jan 2012 19:14:27 +0000 (00:44 +0530) |
This patch adds support for
1. SPI (instance 0 & 1) controller on am335x
2. MTD Partition table and Pin-muxing for spi flash device.
3. SPI clock is fixed to 24 MHz on SPI bus 0 and 12 MHz for SPI bus 1.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
1. SPI (instance 0 & 1) controller on am335x
2. MTD Partition table and Pin-muxing for spi flash device.
3. SPI clock is fixed to 24 MHz on SPI bus 0 and 12 MHz for SPI bus 1.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
arch/arm/mach-omap2/board-am335xevm.c | patch | blob | history |
index 13707b61b0ebf3e4e92fb45d91871fb4f356636a..a9fc494ba1f9ccb42603e22b4a943505a65be524 100644 (file)
#include <linux/module.h>
#include <linux/i2c/at24.h>
#include <linux/gpio.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/flash.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
{NULL, 0},
};
+/* Module pin mux for SPI fash */
+static struct pinmux_config spi0_pin_mux[] = {
+ {"spi0_sclk.spi0_sclk", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL
+ | AM33XX_INPUT_EN},
+ {"spi0_d0.spi0_d0", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL | AM33XX_PULL_UP
+ | AM33XX_INPUT_EN},
+ {"spi0_d1.spi0_d1", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL
+ | AM33XX_INPUT_EN},
+ {"spi0_cs0.spi0_cs0", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL | AM33XX_PULL_UP
+ | AM33XX_INPUT_EN},
+ {NULL, 0},
+};
+
+/* Module pin mux for SPI flash */
+static struct pinmux_config spi1_pin_mux[] = {
+ {"mcasp0_aclkx.spi1_sclk", OMAP_MUX_MODE3 | AM33XX_PULL_ENBL
+ | AM33XX_INPUT_EN},
+ {"mcasp0_fsx.spi1_d0", OMAP_MUX_MODE3 | AM33XX_PULL_ENBL
+ | AM33XX_PULL_UP | AM33XX_INPUT_EN},
+ {"mcasp0_axr0.spi1_d1", OMAP_MUX_MODE3 | AM33XX_PULL_ENBL
+ | AM33XX_INPUT_EN},
+ {"mcasp0_ahclkr.spi1_cs0", OMAP_MUX_MODE3 | AM33XX_PULL_ENBL
+ | AM33XX_PULL_UP | AM33XX_INPUT_EN},
+ {NULL, 0},
+};
/* Module pin mux for rgmii1 */
static struct pinmux_config rgmii1_pin_mux[] = {
},
};
+/* SPI 0/1 Platform Data */
+/* SPI flash information */
+static struct mtd_partition am335x_spi_partitions[] = {
+ /* All the partition sizes are listed in terms of erase size */
+ {
+ .name = "SPL",
+ .offset = 0, /* Offset = 0x0 */
+ .size = SZ_128K,
+ },
+ {
+ .name = "U-Boot",
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x20000 */
+ .size = 2 * SZ_128K,
+ },
+ {
+ .name = "U-Boot Env",
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x60000 */
+ .size = 2 * SZ_4K,
+ },
+ {
+ .name = "Kernel",
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x62000 */
+ .size = 28 * SZ_128K,
+ },
+ {
+ .name = "File System",
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x3E2000 */
+ .size = MTDPART_SIZ_FULL, /* size ~= 4.1 MiB */
+ }
+};
+
+static const struct flash_platform_data am335x_spi_flash = {
+ .type = "w25q64",
+ .name = "spi_flash",
+ .parts = am335x_spi_partitions,
+ .nr_parts = ARRAY_SIZE(am335x_spi_partitions),
+};
+
+/*
+ * SPI Flash works at 80Mhz however SPI Controller works at 48MHz.
+ * So setup Max speed to be less than that of Controller speed
+ */
+static struct spi_board_info am335x_spi0_slave_info[] = {
+ {
+ .modalias = "m25p80",
+ .platform_data = &am335x_spi_flash,
+ .irq = -1,
+ .max_speed_hz = 24000000,
+ .bus_num = 1,
+ .chip_select = 0,
+ },
+};
+
+static struct spi_board_info am335x_spi1_slave_info[] = {
+ {
+ .modalias = "m25p80",
+ .platform_data = &am335x_spi_flash,
+ .irq = -1,
+ .max_speed_hz = 12000000,
+ .bus_num = 2,
+ .chip_select = 0,
+ },
+};
+
static void evm_nand_init(int evm_id, int profile)
{
setup_pin_mux(nand_pin_mux);
}
+/* setup spi0 */
+static void spi0_init(int evm_id, int profile)
+{
+ setup_pin_mux(spi0_pin_mux);
+ spi_register_board_info(am335x_spi0_slave_info,
+ ARRAY_SIZE(am335x_spi0_slave_info));
+ return;
+}
+
+/* setup spi1 */
+static void spi1_init(int evm_id, int profile)
+{
+ setup_pin_mux(spi1_pin_mux);
+ spi_register_board_info(am335x_spi1_slave_info,
+ ARRAY_SIZE(am335x_spi1_slave_info));
+ return;
+}
+
/* Low-Cost EVM */
static struct evm_dev_cfg low_cost_evm_dev_cfg[] = {
{rgmii1_init, DEV_ON_BASEBOARD, PROFILE_NONE},
{mmc1_init, DEV_ON_DGHTR_BRD, PROFILE_2},
{mmc0_init, DEV_ON_BASEBOARD, (PROFILE_ALL & ~PROFILE_5)},
{mmc0_no_cd_init, DEV_ON_BASEBOARD, PROFILE_5},
+ {spi0_init, DEV_ON_DGHTR_BRD, PROFILE_2},
{NULL, 0, 0},
};
{usb0_init, DEV_ON_BASEBOARD, PROFILE_ALL},
{usb1_init, DEV_ON_BASEBOARD, PROFILE_ALL},
{evm_nand_init, DEV_ON_DGHTR_BRD, PROFILE_ALL},
+ {spi1_init, DEV_ON_DGHTR_BRD, PROFILE_ALL},
{NULL, 0, 0},
};