arm:omap:cpsw: Enable/Disable gig support for different evm rev

This patch is added to enable cpsw gigabit mode support for beta
evm and disable gigabit support for alpha EVMs. Please note that
phy_register_fixup_for_uid() function cannot be used to configure
phydev->supported as it is not register configuration and that needs
to be configured after phy->connect.

Signed-off-by: Chandan Nath <chandan.nath@ti.com>
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>

diff --git a/arch/arm/mach-omap2/board-am335xevm.c b/arch/arm/mach-omap2/board-am335xevm.c
index d2618b6dcb010417889f4d7e51227f0efc7bf68a..47a5b07d199b11d441b60ac222a67e476d0d47c5 100644 (file)
--- a/arch/arm/mach-omap2/board-am335xevm.c
+++ b/arch/arm/mach-omap2/board-am335xevm.c
@@ -299,6 +299,7 @@ static bool daughter_brd_detected;
 #define GP_EVM_REV_IS_1_1A             0x2
 #define GP_EVM_REV_IS_UNKNOWN          0xFF
 static unsigned int gp_evm_revision = GP_EVM_REV_IS_UNKNOWN;
 #define GP_EVM_REV_IS_1_1A             0x2
 #define GP_EVM_REV_IS_UNKNOWN          0xFF
 static unsigned int gp_evm_revision = GP_EVM_REV_IS_UNKNOWN;

+unsigned int gigabit_enable = 1;

 
 #define EEPROM_MAC_ADDRESS_OFFSET      60 /* 4+8+4+12+32 */
 #define EEPROM_NO_OF_MAC_ADDR          3
 
 #define EEPROM_MAC_ADDRESS_OFFSET      60 /* 4+8+4+12+32 */
 #define EEPROM_NO_OF_MAC_ADDR          3


@@ -1395,7 +1396,7 @@ static void am335x_evm_setup(struct memory_accessor *mem_acc, void *context)
         * information is required for configuring phy address and hence
         * should be call only after board detection
         */
         * information is required for configuring phy address and hence
         * should be call only after board detection
         */

-       am33xx_cpsw_init();
+       am33xx_cpsw_init(gigabit_enable);

 
        return;
 out:
 
        return;
 out:


@@ -1413,7 +1414,8 @@ out:
         * information is required for configuring phy address and hence
         * should be call only after board detection
         */
         * information is required for configuring phy address and hence
         * should be call only after board detection
         */

-       am33xx_cpsw_init();
+
+       am33xx_cpsw_init(gigabit_enable);

 }
 
 static struct at24_platform_data am335x_daughter_board_eeprom_info = {
 }
 
 static struct at24_platform_data am335x_daughter_board_eeprom_info = {

diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 2f342fbb0e7854ce10eb9087389230b21a3a3cbb..aa1f0b1342cc627756ced334c92544dc9a7bb423 100644 (file)
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -54,8 +54,6 @@
 #define L3_MODULES_MAX_LEN 12
 #define L3_MODULES 3
 
 #define L3_MODULES_MAX_LEN 12
 #define L3_MODULES 3
 

-void am33xx_cpsw_init(void);
-

 static int __init omap3_l3_init(void)
 {
        int l;
 static int __init omap3_l3_init(void)
 {
        int l;


@@ -1242,7 +1240,7 @@ void am33xx_cpsw_macidfillup(char *eeprommacid0, char *eeprommacid1)
        return;
 }
 
        return;
 }
 

-void am33xx_cpsw_init(void)
+void am33xx_cpsw_init(unsigned int gigen)

 {
        u32 mac_lo, mac_hi;
        u32 i;
 {
        u32 mac_lo, mac_hi;
        u32 i;


@@ -1282,6 +1280,8 @@ void am33xx_cpsw_init(void)
                am33xx_cpsw_slaves[1].phy_id = "0:00";
        }
 
                am33xx_cpsw_slaves[1].phy_id = "0:00";
        }
 

+       am33xx_cpsw_pdata.gigabit_en = gigen;
+

        memcpy(am33xx_cpsw_pdata.mac_addr,
                        am33xx_cpsw_slaves[0].mac_addr, ETH_ALEN);
        platform_device_register(&am33xx_cpsw_mdiodevice);
        memcpy(am33xx_cpsw_pdata.mac_addr,
                        am33xx_cpsw_slaves[0].mac_addr, ETH_ALEN);
        platform_device_register(&am33xx_cpsw_mdiodevice);

diff --git a/arch/arm/mach-omap2/include/mach/board-am335xevm.h b/arch/arm/mach-omap2/include/mach/board-am335xevm.h
index 5bbd8584218f384d4e61d411bca2cbf634df43d5..fae17511a5d0550670e55ef79f348db97902ce2d 100644 (file)
--- a/arch/arm/mach-omap2/include/mach/board-am335xevm.h
+++ b/arch/arm/mach-omap2/include/mach/board-am335xevm.h
@@ -39,6 +39,6 @@
 
 void am33xx_evmid_fillup(unsigned int evmid);
 void am33xx_cpsw_macidfillup(char *eeprommacid0, char *eeprommacid1);
 
 void am33xx_evmid_fillup(unsigned int evmid);
 void am33xx_cpsw_macidfillup(char *eeprommacid0, char *eeprommacid1);

-void am33xx_cpsw_init(void);
+void am33xx_cpsw_init(unsigned int gigen);

 
 #endif
 
 #endif

diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti/cpsw.c
index d028f626de0494d70db973ecee58bc0162818332..1f228f13d83610384d834df444337f7a81b8c6a2 100644 (file)
--- a/drivers/net/ethernet/ti/cpsw.c
+++ b/drivers/net/ethernet/ti/cpsw.c
@@ -517,9 +517,6 @@ static void cpsw_set_phy_config(struct cpsw_priv *priv, struct phy_device *phy)
        u16 val = 0;
        u16 tmp = 0;
 
        u16 val = 0;
        u16 tmp = 0;
 

-       if (!pdata->gigabit_en)
-               return;
-

        if (!phy)
                return;
 
        if (!phy)
                return;
 


@@ -530,6 +527,11 @@ static void cpsw_set_phy_config(struct cpsw_priv *priv, struct phy_device *phy)
 
        phy_addr = phy->addr;
 
 
        phy_addr = phy->addr;
 

+       /* Disable 1 Gig mode support if it is not supported */
+       if (!pdata->gigabit_en)
+               phy->supported &= ~(SUPPORTED_1000baseT_Half |
+                                       SUPPORTED_1000baseT_Full);
+

        /* Following lines enable gigbit advertisement capability even in case
         * the advertisement is not enabled by default
         */
        /* Following lines enable gigbit advertisement capability even in case
         * the advertisement is not enabled by default
         */