ARM: OMAP2+: nand: Synching HAMMING ECC layout with that of U-boot.

For OOb_64, offset is fixed to 40 for kernel/fs, by changing
kernel code to calculate hw_ecc layout considering these:
1) 12 bytes in case of 512 byte access and 24 bytes in case of 256 byte
access in OOB_64 can be supported.
2) Ecc bytes lie to the end of OOB area.
Introducing a new macro : MAX_HWECC_BYTES_OOB_64 which is the maximum
number of eccbytes supported for OOB_64n Hamming ECC mode.

Signed-off-by: Hrishikesh Bhandiwad <hrishikesh.b@ti.com>
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>

diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 9371bd1f9b1453642c904ce88928c284ee50c1e0..e0c20427deb8457296b237c6be2ed2026704eee4 100644 (file)
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -1122,7 +1122,14 @@ static int __devinit omap_nand_probe(struct platform_device *pdev)
                        omap_oobinfo.oobfree->offset = offset;
                        omap_oobinfo.oobfree->length = info->mtd.oobsize -
                                                offset - omap_oobinfo.eccbytes;
-                       offset = info->mtd.oobsize - omap_oobinfo.eccbytes;
+                       /*
+                       offset is calculated considering the following :
+                       1) 12 bytes ECC for 512 byte access and 24 bytes ECC for
+                       256 byte access in OOB_64 can be supported
+                       2)Ecc bytes lie to the end of OOB area.
+                       3)Ecc layout must match with u-boot's ECC layout.
+                       */
+                       offset = info->mtd.oobsize - MAX_HWECC_BYTES_OOB_64;
                }
 
                for (i = 0; i < omap_oobinfo.eccbytes; i++)