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raw | patch | inline | side by side (parent: 3a275ec)
raw | patch | inline | side by side (parent: 3a275ec)
author | Ajay Kumar Gupta <ajay.gupta@ti.com> | |
Mon, 25 Oct 2010 08:51:49 +0000 (14:21 +0530) | ||
committer | Vaibhav Hiremath <hvaibhav@ti.com> | |
Mon, 23 Jan 2012 19:14:12 +0000 (00:44 +0530) |
IO_ADDRESS for AM35x MUSB doesn't work and thus CPPI41 programming
also fails.
Fixing this by ioremapping MUSB complete address space (~32K) and
updating CPPI41 related memory base with this mappings.
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
also fails.
Fixing this by ioremapping MUSB complete address space (~32K) and
updating CPPI41 related memory base with this mappings.
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
drivers/usb/musb/am35x.c | patch | blob | history | |
drivers/usb/musb/cppi41.h | patch | blob | history |
index 76a6c558bcf2c2c7ae7530209ee9c85311ba87ac..7ff7d7f1aea10a7a4a8a98f3a9ff256e557f5092 100644 (file)
--- a/drivers/usb/musb/am35x.c
+++ b/drivers/usb/musb/am35x.c
struct cppi41_dma_block cppi41_dma_block[CPPI41_NUM_DMA_BLOCK] = {
[0] = {
- .global_ctrl_base =
- IO_ADDRESS(OMAP34XX_HSUSB_OTG_BASE) + 0x1000,
- .ch_ctrl_stat_base =
- IO_ADDRESS(OMAP34XX_HSUSB_OTG_BASE) + 0x1800,
- .sched_ctrl_base =
- IO_ADDRESS(OMAP34XX_HSUSB_OTG_BASE) + 0x2000,
- .sched_table_base =
- IO_ADDRESS(OMAP34XX_HSUSB_OTG_BASE) + 0x2800,
.num_tx_ch = 15,
.num_rx_ch = 15,
.tx_ch_info = tx_ch_info
/* Queue manager information */
struct cppi41_queue_mgr cppi41_queue_mgr[CPPI41_NUM_QUEUE_MGR] = {
[0] = {
- .q_mgr_rgn_base =
- IO_ADDRESS(OMAP34XX_HSUSB_OTG_BASE) + 0x4000,
- .desc_mem_rgn_base =
- IO_ADDRESS(OMAP34XX_HSUSB_OTG_BASE) + 0x5000,
- .q_mgmt_rgn_base =
- IO_ADDRESS(OMAP34XX_HSUSB_OTG_BASE) + 0x6000,
- .q_stat_rgn_base =
- IO_ADDRESS(OMAP34XX_HSUSB_OTG_BASE) + 0x6800,
-
.num_queue = 96,
.queue_types = CPPI41_FREE_DESC_BUF_QUEUE |
CPPI41_UNASSIGNED_QUEUE,
{
u16 numch, blknum = usb_cppi41_info.dma_block, order;
+ /* init mappings */
+ cppi41_queue_mgr[0].q_mgr_rgn_base = musb->ctrl_base + 0x4000;
+ cppi41_queue_mgr[0].desc_mem_rgn_base = musb->ctrl_base + 0x5000;
+ cppi41_queue_mgr[0].q_mgmt_rgn_base = musb->ctrl_base + 0x6000;
+ cppi41_queue_mgr[0].q_stat_rgn_base = musb->ctrl_base + 0x6800;
+
+ cppi41_dma_block[0].global_ctrl_base = musb->ctrl_base + 0x1000;
+ cppi41_dma_block[0].ch_ctrl_stat_base = musb->ctrl_base + 0x1800;
+ cppi41_dma_block[0].sched_ctrl_base = musb->ctrl_base + 0x2000;
+ cppi41_dma_block[0].sched_table_base = musb->ctrl_base + 0x2800;
+
/* Initialize for Linking RAM region 0 alone */
cppi41_queue_mgr_init(usb_cppi41_info.q_mgr, 0, 0x3fff);
msleep(5);
#ifdef CONFIG_USB_TI_CPPI41_DMA
- cppi41_init();
+ cppi41_init(musb);
#endif
musb->isr = am35x_musb_interrupt;
index 9dbc38a58ba528cb969512916ba488b75f1e3c32..8450baaaef07aad408260af05864c29995ad13cd 100644 (file)
const struct cppi41_tx_ch *tx_ch_info;
};
-extern const struct cppi41_queue_mgr cppi41_queue_mgr[];
-extern const struct cppi41_dma_block cppi41_dma_block[];
+extern struct cppi41_queue_mgr cppi41_queue_mgr[];
+extern struct cppi41_dma_block cppi41_dma_block[];
/**
* struct cppi41_dma_ch_obj - CPPI 4.1 DMA Channel object