author | Linus Torvalds <torvalds@linux-foundation.org> | |
Fri, 18 Sep 2009 04:07:08 +0000 (21:07 -0700) | ||
committer | Linus Torvalds <torvalds@linux-foundation.org> | |
Fri, 18 Sep 2009 04:07:08 +0000 (21:07 -0700) |
* 'x86-mce-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (21 commits)
x86, mce: Fix compilation with !CONFIG_DEBUG_FS in mce-severity.c
x86, mce: CE in last bank prevents panic by unknown MCE
x86, mce: Fake panic support for MCE testing
x86, mce: Move debugfs mce dir creating to mce.c
x86, mce: Support specifying raise mode for software MCE injection
x86, mce: Support specifying context for software mce injection
x86, mce: fix reporting of Thermal Monitoring mechanism enabled
x86, mce: remove never executed code
x86, mce: add missing __cpuinit tags
x86, mce: fix "mce" boot option handling for CONFIG_X86_NEW_MCE
x86, mce: don't log boot MCEs on Pentium M (model == 13) CPUs
x86: mce: Lower maximum number of banks to architecture limit
x86: mce: macros to compute banks MSRs
x86: mce: Move per bank data in a single datastructure
x86: mce: Move code in mce.c
x86: mce: Rename CONFIG_X86_NEW_MCE to CONFIG_X86_MCE
x86: mce: Remove old i386 machine check code
x86: mce: Update X86_MCE description in x86/Kconfig
x86: mce: Make CONFIG_X86_ANCIENT_MCE dependent on CONFIG_X86_MCE
x86, mce: use atomic_inc_return() instead of add by 1
...
Manually fixed up trivial conflicts:
Documentation/feature-removal-schedule.txt
arch/x86/kernel/cpu/mcheck/mce.c
x86, mce: Fix compilation with !CONFIG_DEBUG_FS in mce-severity.c
x86, mce: CE in last bank prevents panic by unknown MCE
x86, mce: Fake panic support for MCE testing
x86, mce: Move debugfs mce dir creating to mce.c
x86, mce: Support specifying raise mode for software MCE injection
x86, mce: Support specifying context for software mce injection
x86, mce: fix reporting of Thermal Monitoring mechanism enabled
x86, mce: remove never executed code
x86, mce: add missing __cpuinit tags
x86, mce: fix "mce" boot option handling for CONFIG_X86_NEW_MCE
x86, mce: don't log boot MCEs on Pentium M (model == 13) CPUs
x86: mce: Lower maximum number of banks to architecture limit
x86: mce: macros to compute banks MSRs
x86: mce: Move per bank data in a single datastructure
x86: mce: Move code in mce.c
x86: mce: Rename CONFIG_X86_NEW_MCE to CONFIG_X86_MCE
x86: mce: Remove old i386 machine check code
x86: mce: Update X86_MCE description in x86/Kconfig
x86: mce: Make CONFIG_X86_ANCIENT_MCE dependent on CONFIG_X86_MCE
x86, mce: use atomic_inc_return() instead of add by 1
...
Manually fixed up trivial conflicts:
Documentation/feature-removal-schedule.txt
arch/x86/kernel/cpu/mcheck/mce.c
1 | 2 | |||
---|---|---|---|---|
Documentation/feature-removal-schedule.txt | patch | | diff1 | | diff2 | | blob | history |
arch/x86/Kconfig | patch | | diff1 | | diff2 | | blob | history |
arch/x86/include/asm/msr-index.h | patch | | diff1 | | diff2 | | blob | history |
arch/x86/kernel/apic/nmi.c | patch | | diff1 | | diff2 | | blob | history |
arch/x86/kernel/cpu/mcheck/mce.c | patch | | diff1 | | diff2 | | blob | history |
arch/x86/kernel/cpu/mcheck/therm_throt.c | patch | | diff1 | | diff2 | | blob | history |
arch/x86/kernel/irqinit.c | patch | | diff1 | | diff2 | | blob | history |
arch/x86/kernel/signal.c | patch | | diff1 | | diff2 | | blob | history |
index 503d21216d58195ece5d6892e8fa871cac9f7a18,edb2f0b076168deee52986ffdba744e05d7fabf4..fa75220f8d34e602d166cecfffe0a7036fc2cb64
When: 2.6.33
Why: Should be implemented in userspace, policy daemon.
Who: Johannes Berg <johannes@sipsolutions.net>
- What: CONFIG_X86_OLD_MCE
- When: 2.6.32
- Why: Remove the old legacy 32bit machine check code. This has been
- superseded by the newer machine check code from the 64bit port,
- but the old version has been kept around for easier testing. Note this
- doesn't impact the old P5 and WinChip machine check handlers.
- Who: Andi Kleen <andi@firstfloor.org>
-
- ----------------------------
-
+
+----------------------------
+
+What: lock_policy_rwsem_* and unlock_policy_rwsem_* will not be
+ exported interface anymore.
+When: 2.6.33
+Why: cpu_policy_rwsem has a new cleaner definition making it local to
+ cpufreq core and contained inside cpufreq.c. Other dependent
+ drivers should not use it in order to safely avoid lockdep issues.
+Who: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
+
+----------------------------
+
+What: sound-slot/service-* module aliases and related clutters in
+ sound/sound_core.c
+When: August 2010
+Why: OSS sound_core grabs all legacy minors (0-255) of SOUND_MAJOR
+ (14) and requests modules using custom sound-slot/service-*
+ module aliases. The only benefit of doing this is allowing
+ use of custom module aliases which might as well be considered
+ a bug at this point. This preemptive claiming prevents
+ alternative OSS implementations.
+
+ Till the feature is removed, the kernel will be requesting
+ both sound-slot/service-* and the standard char-major-* module
+ aliases and allow turning off the pre-claiming selectively via
+ CONFIG_SOUND_OSS_CORE_PRECLAIM and soundcore.preclaim_oss
+ kernel parameter.
+
+ After the transition phase is complete, both the custom module
+ aliases and switches to disable it will go away. This removal
+ will also allow making ALSA OSS emulation independent of
+ sound_core. The dependency will be broken then too.
+Who: Tejun Heo <tj@kernel.org>
diff --cc arch/x86/Kconfig
Simple merge
diff --cc arch/x86/include/asm/msr-index.h
Simple merge
diff --cc arch/x86/kernel/apic/nmi.c
Simple merge
diff --cc arch/x86/kernel/cpu/mcheck/mce.c
index fdd51b554355049298ed2474fc7e5f1468c558fc,325559d1aa583939d43640956a3078305d16f988..2f5aab26320e120b3531247e7682b1221721f96e
}
/* Add per CPU specific workarounds here */
- static int mce_cpu_quirks(struct cpuinfo_x86 *c)
-static void __cpuinit mce_cpu_quirks(struct cpuinfo_x86 *c)
++static int __cpuinit mce_cpu_quirks(struct cpuinfo_x86 *c)
{
+ if (c->x86_vendor == X86_VENDOR_UNKNOWN) {
+ pr_info("MCE: unknown CPU type - not enabling MCE support.\n");
+ return -EOPNOTSUPP;
+ }
+
/* This should be disabled by the BIOS, but isn't always */
if (c->x86_vendor == X86_VENDOR_AMD) {
if (c->x86 == 15 && banks > 4) {
return;
setup_timer(t, mcheck_timer, smp_processor_id());
t->expires = round_jiffies(jiffies + *n);
- add_timer(t);
+ add_timer_on(t, smp_processor_id());
}
+ /* Handle unconfigured int18 (should never happen) */
+ static void unexpected_machine_check(struct pt_regs *regs, long error_code)
+ {
+ printk(KERN_ERR "CPU#%d: Unexpected int18 (Machine Check).\n",
+ smp_processor_id());
+ }
+
+ /* Call the installed machine check handler for this CPU setup. */
+ void (*machine_check_vector)(struct pt_regs *, long error_code) =
+ unexpected_machine_check;
+
/*
* Called for each booted CPU to set up machine checks.
* Must be called with preempt off:
diff --cc arch/x86/kernel/cpu/mcheck/therm_throt.c
Simple merge
diff --cc arch/x86/kernel/irqinit.c
index 92b7703d3d58e6ad278e45d733fdcac1505772fa,8a194ad357edb453017c24aa0a1d5a370478eb00..ccf8ab54f31a17198f064d18d99a8f6cc571ce08
#ifdef CONFIG_X86_THERMAL_VECTOR
alloc_intr_gate(THERMAL_APIC_VECTOR, thermal_interrupt);
#endif
-#ifdef CONFIG_X86_THRESHOLD
+#ifdef CONFIG_X86_MCE_THRESHOLD
alloc_intr_gate(THRESHOLD_APIC_VECTOR, threshold_interrupt);
#endif
- #if defined(CONFIG_X86_NEW_MCE) && defined(CONFIG_X86_LOCAL_APIC)
+ #if defined(CONFIG_X86_MCE) && defined(CONFIG_X86_LOCAL_APIC)
alloc_intr_gate(MCE_SELF_VECTOR, mce_self_interrupt);
#endif
diff --cc arch/x86/kernel/signal.c
Simple merge