AM335X: CPSW pinmux configuration. (SOC related)
authorChandan Nath <chandan.nath@ti.com>
Tue, 4 Oct 2011 14:34:56 +0000 (20:04 +0530)
committerVaibhav Hiremath <hvaibhav@ti.com>
Mon, 23 Jan 2012 19:13:57 +0000 (00:43 +0530)
This patch adds cpsw pinmux configuration for different boards

Signed-off-by: Chandan Nath <chandan.nath@ti.com>
Conflicts:

arch/arm/mach-omap2/devices.c
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
arch/arm/mach-omap2/board-am335xevm.c
arch/arm/mach-omap2/devices.c
arch/arm/mach-omap2/include/mach/board-am335xevm.h

index 308f1c0215578c0163b70fb5430491ea38fc2755..c1530948833486aa68d289fcf0e245ea5878ec48 100644 (file)
@@ -226,6 +226,64 @@ static struct pinmux_config lcdc_pin_mux[] = {
        {NULL, 0},
 };
 
+/* Module pin mux for rgmii1 */
+static struct pinmux_config rgmii1_pin_mux[] = {
+       {"mii1_txen.rgmii1_tctl", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
+       {"mii1_rxdv.rgmii1_rctl", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
+       {"mii1_txd3.rgmii1_td3", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
+       {"mii1_txd2.rgmii1_td2", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
+       {"mii1_txd1.rgmii1_td1", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
+       {"mii1_txd0.rgmii1_td0", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
+       {"mii1_txclk.rgmii1_tclk", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
+       {"mii1_rxclk.rgmii1_rclk", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
+       {"mii1_rxd3.rgmii1_rd3", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
+       {"mii1_rxd2.rgmii1_rd2", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
+       {"mii1_rxd1.rgmii1_rd1", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
+       {"mii1_rxd0.rgmii1_rd0", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
+       {"mdio_data.mdio_data", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
+       {"mdio_clk.mdio_clk", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT_PULLUP},
+       {NULL, 0},
+};
+
+/* Module pin mux for rgmii2 */
+static struct pinmux_config rgmii2_pin_mux[] = {
+       {"gpmc_a0.rgmii2_tctl", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
+       {"gpmc_a1.rgmii2_rctl", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
+       {"gpmc_a2.rgmii2_td3", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
+       {"gpmc_a3.rgmii2_td2", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
+       {"gpmc_a4.rgmii2_td1", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
+       {"gpmc_a5.rgmii2_td0", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
+       {"gpmc_a6.rgmii2_tclk", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
+       {"gpmc_a7.rgmii2_rclk", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
+       {"gpmc_a8.rgmii2_rd3", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
+       {"gpmc_a9.rgmii2_rd2", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
+       {"gpmc_a10.rgmii2_rd1", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
+       {"gpmc_a11.rgmii2_rd0", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
+       {"mdio_data.mdio_data", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
+       {"mdio_clk.mdio_clk", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT_PULLUP},
+       {NULL, 0},
+};
+
+/* Module pin mux for mii1 */
+static struct pinmux_config mii1_pin_mux[] = {
+       {"mii1_rxerr.mii1_rxerr", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
+       {"mii1_txen.mii1_txen", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
+       {"mii1_rxdv.mii1_rxdv", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
+       {"mii1_txd3.mii1_txd3", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
+       {"mii1_txd2.mii1_txd2", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
+       {"mii1_txd1.mii1_txd1", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
+       {"mii1_txd0.mii1_txd0", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
+       {"mii1_txclk.mii1_txclk", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
+       {"mii1_rxclk.mii1_rxclk", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
+       {"mii1_rxd3.mii1_rxd3", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
+       {"mii1_rxd2.mii1_rxd2", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
+       {"mii1_rxd1.mii1_rxd1", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
+       {"mii1_rxd0.mii1_rxd0", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
+       {"mdio_data.mdio_data", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
+       {"mdio_clk.mdio_clk", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT_PULLUP},
+       {NULL, 0},
+};
+
 /*
 * @pin_mux - single module pin-mux structure which defines pin-mux
 *                      details for all its pins.
@@ -348,9 +406,27 @@ static void lcdc_init(int evm_id, int profile)
        return;
 }
 
+static void rgmii1_init(int evm_id, int profile)
+{
+       setup_pin_mux(rgmii1_pin_mux);
+       return;
+}
+
+static void rgmii2_init(int evm_id, int profile)
+{
+       setup_pin_mux(rgmii2_pin_mux);
+       return;
+}
+
+static void mii1_init(int evm_id, int profile)
+{
+       setup_pin_mux(mii1_pin_mux);
+       return;
+}
 
 /* Low-Cost EVM */
 static struct evm_dev_cfg low_cost_evm_dev_cfg[] = {
+       {rgmii1_init,   DEV_ON_BASEBOARD, PROFILE_NONE},
        {NULL, 0, 0},
 };
 
@@ -360,11 +436,15 @@ static struct evm_dev_cfg gen_purp_evm_dev_cfg[] = {
                                                PROFILE_2 | PROFILE_7) },
        {lcdc_init,     DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_1 |
                                                PROFILE_2 | PROFILE_7) },
+       {rgmii1_init,   DEV_ON_BASEBOARD, PROFILE_ALL},
+       {rgmii2_init,   DEV_ON_DGHTR_BRD, (PROFILE_1 | PROFILE_2 |
+                                               PROFILE_4 | PROFILE_6) },
        {NULL, 0, 0},
 };
 
 /* Industrial Auto Motor Control EVM */
 static struct evm_dev_cfg ind_auto_mtrl_evm_dev_cfg[] = {
+       {mii1_init,     DEV_ON_DGHTR_BRD, PROFILE_ALL},
        {NULL, 0, 0},
 };
 
@@ -372,6 +452,8 @@ static struct evm_dev_cfg ind_auto_mtrl_evm_dev_cfg[] = {
 static struct evm_dev_cfg ip_phn_evm_dev_cfg[] = {
        {enable_ecap0,  DEV_ON_DGHTR_BRD, PROFILE_NONE},
        {lcdc_init,     DEV_ON_DGHTR_BRD, PROFILE_NONE},
+       {rgmii1_init,   DEV_ON_BASEBOARD, PROFILE_NONE},
+       {rgmii2_init,   DEV_ON_DGHTR_BRD, PROFILE_NONE},
        {NULL, 0, 0},
 };
 
@@ -492,6 +574,12 @@ static void am335x_evm_setup(struct memory_accessor *mem_acc, void *context)
        else
                goto out;
 
+       /* Initialize cpsw after board detection is completed as board
+        * information is required for configuring phy address and hence
+        * should be call only after board detection
+        */
+       am33xx_cpsw_init();
+
        return;
 out:
        /*
@@ -503,6 +591,12 @@ out:
        daughter_brd_detected = true;
        setup_general_purpose_evm();
 
+       /* Initialize cpsw after board detection is completed as board
+        * information is required for configuring phy address and hence
+        * should be call only after board detection
+        */
+       am33xx_cpsw_init();
+
 }
 
 static struct at24_platform_data am335x_daughter_board_eeprom_info = {
index a9bb4c66585101b1c38899842165e88d6454e9bc..00ce6544322867a5e1036a4626631eb4fa796ccf 100644 (file)
@@ -1001,7 +1001,6 @@ static int __init omap2_init_devices(void)
        omap_init_sham();
        omap_init_aes();
        omap_init_vout();
-       am33xx_cpsw_init();
        am33xx_register_edma();
 
        return 0;
index 95a39bcda2694072399d1303c04d537b462131fc..d55b9df5aeeaa5f9e5944ac7b8aa05d3e4aa3b7d 100644 (file)
@@ -39,6 +39,6 @@
 
 void am335x_evmid_fillup(unsigned int evmid);
 void am335x_cpsw_macidfillup(char *eeprommacid0, char *eeprommacid1);
-void am335x_cpsw_init(void);
+void am33xx_cpsw_init(void);
 
 #endif