ARM: OMAP2+: am33xx: update mcasp platform registration
McASP device registration now uses omap_device api. This change needs a
new argument (device id). This patch changes the call to involve device
id along with platform data.
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
McASP device registration now uses omap_device api. This change needs a
new argument (device id). This patch changes the call to involve device
id along with platform data.
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
ARM: OMAP2+: mcasp: use omap_device api for registration
Convert the old-style device registration code for mcasp to use
omap_device. This will allow the driver to be converted to use PM
runtime and to take advantage of the OMAP IP block management
infrastructure (hwmod, PM, etc.).
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
Convert the old-style device registration code for mcasp to use
omap_device. This will allow the driver to be converted to use PM
runtime and to take advantage of the OMAP IP block management
infrastructure (hwmod, PM, etc.).
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
ARM: OMAP2+: mcasp: add missing HWMOD data
HWMOD data regarding edma interrupts, sysconfig for McASP were
missing. This patch adds the same.
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
HWMOD data regarding edma interrupts, sysconfig for McASP were
missing. This patch adds the same.
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
ASoC: McASP: Correct FIFOCTL register usage
Write FIFO register (WFIFOCTL) offset was incorrectly used in place
of Read FIFO register for McASP IP version 3. This patch corrects
the same.
TODO:
1. Differentiating the IP versions at runtime if it's possible
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
Write FIFO register (WFIFOCTL) offset was incorrectly used in place
of Read FIFO register for McASP IP version 3. This patch corrects
the same.
TODO:
1. Differentiating the IP versions at runtime if it's possible
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
ARM: OMAP2+: ALSA : ASoC tlv320aic3x.c suspend/resume cache_sync fix
This patch fixes audio resume failure. AIC3X codec driver is not
generating disable regulator event due to unknown reason.
Need to revisit the patch to find the reason and fix the same.
Signed-off-by: Raj, Deepu <deepu.raj@ti.com>
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
This patch fixes audio resume failure. AIC3X codec driver is not
generating disable regulator event due to unknown reason.
Need to revisit the patch to find the reason and fix the same.
Signed-off-by: Raj, Deepu <deepu.raj@ti.com>
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
ASoC: Davinci: Correct the rotation for different data-types
During audio Rx none of the data-types need rotation in the
Receive Format Unit of the McASP
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
During audio Rx none of the data-types need rotation in the
Receive Format Unit of the McASP
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
ARM: OMAP: AM33XX: NET: cpsw: Add suspend resume support
Need to reset all sub-components of CPGMAC to gate the clock
Moved omap_dm_timer enable and configure to cpsw_ndo_open and disabled the
timer in cpsw_ndo_close so that during suspend/resume timer will be disabled
and enabled respectively
Added timer omap_dm_timer_free in cpsw_ndo_remove to free the dm_timer while
removing the module
Added wait_for_clock_enable to ensure that CPGMAC clock is enabled before
accessing the CPGMAC registers
TODO: Currently driver doesnot support pm runtime, so hack for wait for cpgmac
clock enable is done. Once PM runtime support is done then the hack will be
removed
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Need to reset all sub-components of CPGMAC to gate the clock
Moved omap_dm_timer enable and configure to cpsw_ndo_open and disabled the
timer in cpsw_ndo_close so that during suspend/resume timer will be disabled
and enabled respectively
Added timer omap_dm_timer_free in cpsw_ndo_remove to free the dm_timer while
removing the module
Added wait_for_clock_enable to ensure that CPGMAC clock is enabled before
accessing the CPGMAC registers
TODO: Currently driver doesnot support pm runtime, so hack for wait for cpgmac
clock enable is done. Once PM runtime support is done then the hack will be
removed
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
ARM: OMAP: AM33XX: NET: cpsw: fix memory lead during device open close.
Rx descriptors are not freed during cpdma close in device close.
cpdma_ctlr_stop should be called after netif_carrier_off. so that
cpsw_rx_handler knows that we are shutting down the network device
and free the Rx descriptor memory
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Rx descriptors are not freed during cpdma close in device close.
cpdma_ctlr_stop should be called after netif_carrier_off. so that
cpsw_rx_handler knows that we are shutting down the network device
and free the Rx descriptor memory
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
ARM: OMAP2+: nand: Fix build breakage
...introduced by recent NAND related changes
In file included from arch/arm/mach-omap2/board-omap3beagle.c:54:0:
arch/arm/mach-omap2/board-flash.h:50:1: error: expected identifier or '(' before '{' token
arch/arm/mach-omap2/board-flash.h:48:1: warning: 'omap_nand_init' used but never defined
make[1]: *** [arch/arm/mach-omap2/board-omap3beagle.o] Error 1
make[1]: *** Waiting for unfinished jobs....
In file included from arch/arm/mach-omap2/board-am335xevm.c:61:0:
arch/arm/mach-omap2/board-flash.h:50:1: error: expected identifier or '(' before '{' token
arch/arm/mach-omap2/board-flash.h:48:1: warning: 'omap_nand_init' used but never defined
make[1]: *** [arch/arm/mach-omap2/board-am335xevm.o] Error 1
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
...introduced by recent NAND related changes
In file included from arch/arm/mach-omap2/board-omap3beagle.c:54:0:
arch/arm/mach-omap2/board-flash.h:50:1: error: expected identifier or '(' before '{' token
arch/arm/mach-omap2/board-flash.h:48:1: warning: 'omap_nand_init' used but never defined
make[1]: *** [arch/arm/mach-omap2/board-omap3beagle.o] Error 1
make[1]: *** Waiting for unfinished jobs....
In file included from arch/arm/mach-omap2/board-am335xevm.c:61:0:
arch/arm/mach-omap2/board-flash.h:50:1: error: expected identifier or '(' before '{' token
arch/arm/mach-omap2/board-flash.h:48:1: warning: 'omap_nand_init' used but never defined
make[1]: *** [arch/arm/mach-omap2/board-am335xevm.o] Error 1
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
video: da8xx-fb: correct suspend/resume sequence
1. correct suspend/resume sequence
for LCD.
2. add msleep in suspend/resume, to allow
LCD to finish transmitting all the frames.
3. remove enabling/disabling of clocks in
interrupt handler. This sequence was wrong.
Trying to disable clocks and write to a register
was wrong.
4. correct LCD context save sequence
Signed-off-by: Patil, Rachna <rachna@ti.com>
1. correct suspend/resume sequence
for LCD.
2. add msleep in suspend/resume, to allow
LCD to finish transmitting all the frames.
3. remove enabling/disabling of clocks in
interrupt handler. This sequence was wrong.
Trying to disable clocks and write to a register
was wrong.
4. correct LCD context save sequence
Signed-off-by: Patil, Rachna <rachna@ti.com>
video: da8xx-fb: enable sync and underflow error interrupts
This patch enables LCD sync and underflow error interrupts.
Signed-off-by: Patil, Rachna <rachna@ti.com>
This patch enables LCD sync and underflow error interrupts.
Signed-off-by: Patil, Rachna <rachna@ti.com>
mmc: omap_hsmmc: set dto to 14 for all devices
* With certain SD cards timeouts like the following have been seen
due to an improper calculation of the dto value:
mmcblk0: error -110 transferring data, sector 4126233, nr 8,
card status 0xc00
* By removing the dto calculation and setting the timeout value
to the maximum specified by the SD card specification part A2
section 2.2.15 these timeouts can be avoided.
* This change has been used by beagleboard users as well as the
Texas Instruments SDK without a negative impact.
* There are multiple discussion threads about this but the most
relevant ones are:
* http://talk.maemo.org/showthread.php?p=1000707#post1000707
* http://www.mail-archive.com/linux-omap@vger.kernel.org/msg42213.html
* Original proposal for this fix was done by Sukumar Ghoral of
Texas Instruments
* Tested using a Texas Instruments AM335x EVM
Signed-off-by: Chase Maupin <Chase.Maupin@ti.com>
* With certain SD cards timeouts like the following have been seen
due to an improper calculation of the dto value:
mmcblk0: error -110 transferring data, sector 4126233, nr 8,
card status 0xc00
* By removing the dto calculation and setting the timeout value
to the maximum specified by the SD card specification part A2
section 2.2.15 these timeouts can be avoided.
* This change has been used by beagleboard users as well as the
Texas Instruments SDK without a negative impact.
* There are multiple discussion threads about this but the most
relevant ones are:
* http://talk.maemo.org/showthread.php?p=1000707#post1000707
* http://www.mail-archive.com/linux-omap@vger.kernel.org/msg42213.html
* Original proposal for this fix was done by Sukumar Ghoral of
Texas Instruments
* Tested using a Texas Instruments AM335x EVM
Signed-off-by: Chase Maupin <Chase.Maupin@ti.com>
ARM: OMAP: AM33XX: Fix build breakage when CONFIG_SUSPEND=n
Fix the following build error:
arch/arm/mach-omap2/pm33xx.c: In function 'am33xx_pm_init':
arch/arm/mach-omap2/pm33xx.c:462:2: error: 'cefuse_pwrdm' undeclared (first use in this function)
arch/arm/mach-omap2/pm33xx.c:462:2: note: each undeclared identifier is reported only once for each function it appears in
arch/arm/mach-omap2/pm33xx.c:468:2: error: 'gfx_pwrdm' undeclared (first use in this function)
arch/arm/mach-omap2/pm33xx.c:472:2: error: 'gfx_l3_clkdm' undeclared (first use in this function)
arch/arm/mach-omap2/pm33xx.c:476:2: error: 'gfx_l4ls_clkdm' undeclared (first use in this function)
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Fix the following build error:
arch/arm/mach-omap2/pm33xx.c: In function 'am33xx_pm_init':
arch/arm/mach-omap2/pm33xx.c:462:2: error: 'cefuse_pwrdm' undeclared (first use in this function)
arch/arm/mach-omap2/pm33xx.c:462:2: note: each undeclared identifier is reported only once for each function it appears in
arch/arm/mach-omap2/pm33xx.c:468:2: error: 'gfx_pwrdm' undeclared (first use in this function)
arch/arm/mach-omap2/pm33xx.c:472:2: error: 'gfx_l3_clkdm' undeclared (first use in this function)
arch/arm/mach-omap2/pm33xx.c:476:2: error: 'gfx_l4ls_clkdm' undeclared (first use in this function)
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
ARM: OMAP2+: timer: Switch dmtimer1/clocksource to RTC32k source for am33xx
In case of AM33xx support, currently the system timer is configured
as -
- clockevent - dmtimer2 (peripheral domain)
- clocksource - dmtimer1 (wakeup domain)
Both are getting input from OSC clock, which is 24MHz input clock.
In order to keep dmtimer1/clocksource active during system
suspend/resume, we must use RTC32K clock.
This patch enables the RTC32K clock by writting RTC registers and
switches clocksource/dmtimer1 input clock to RTC32k/clk_32768_ck.
Also, during testing it has been observed that, RTC clock need couple
of seconds delay to stabilize the RTC clock; and such a huge delay is not
acceptable in kernel and will also impact quick/fast boot use-case.
So, RTC32k OSC enable code has been shifted to SPL/first-bootloader,
and in order to support older u-boot, we have adopted fallback mechanism;
where, if timer goes to bad state OR becomes idle, then we again switch
back to main/default sys_ck_in (24MHz).
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
In case of AM33xx support, currently the system timer is configured
as -
- clockevent - dmtimer2 (peripheral domain)
- clocksource - dmtimer1 (wakeup domain)
Both are getting input from OSC clock, which is 24MHz input clock.
In order to keep dmtimer1/clocksource active during system
suspend/resume, we must use RTC32K clock.
This patch enables the RTC32K clock by writting RTC registers and
switches clocksource/dmtimer1 input clock to RTC32k/clk_32768_ck.
Also, during testing it has been observed that, RTC clock need couple
of seconds delay to stabilize the RTC clock; and such a huge delay is not
acceptable in kernel and will also impact quick/fast boot use-case.
So, RTC32k OSC enable code has been shifted to SPL/first-bootloader,
and in order to support older u-boot, we have adopted fallback mechanism;
where, if timer goes to bad state OR becomes idle, then we again switch
back to main/default sys_ck_in (24MHz).
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
ARM: OMAP3+: am33xx_clockdata: Fix wrong rtc parent clock
Fix -
- Corrected RTC32K clock defination
- Wrong parent was configured to RTC
- Wrong clock domain to USB module.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Fix -
- Corrected RTC32K clock defination
- Wrong parent was configured to RTC
- Wrong clock domain to USB module.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
ARM: OMAP: AM33XX: Manipulate GFX domain during suspend
In order to save as much power as possible, attempt to
put the GFX domain to OFF state during suspend.
At the same time, update the A<->M3 interaction to reduce
any chance of race conditions between A8 suspend routine
and the M3 acknowledgement interrupt.
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
In order to save as much power as possible, attempt to
put the GFX domain to OFF state during suspend.
At the same time, update the A<->M3 interaction to reduce
any chance of race conditions between A8 suspend routine
and the M3 acknowledgement interrupt.
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
ARM: OMAP: AM33XX: Don't idle during suspend
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
ARM: OMAP: AM335x evm: Getting rid of memory accessors with barriers
We should be using readl/writel since they have barriers in place
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
We should be using readl/writel since they have barriers in place
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
ARM: OMAP: PM: Skip omap3_init_voltage for AM33XX
Right now this helps to get rid of the following warnings during
bootup
[...]
omap2_set_init_voltage: unable to get clk dpll1_ck
omap2_set_init_voltage: unable to set vdd_mpu_iva
omap2_set_init_voltage: unable to find boot up OPP for vdd_core
omap2_set_init_voltage: unable to set vdd_core
[...]
We need to explore whether an AM33XX specific init_voltage is
required or we can make do with that OMAP3/4 has to offer.
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Right now this helps to get rid of the following warnings during
bootup
[...]
omap2_set_init_voltage: unable to get clk dpll1_ck
omap2_set_init_voltage: unable to set vdd_mpu_iva
omap2_set_init_voltage: unable to find boot up OPP for vdd_core
omap2_set_init_voltage: unable to set vdd_core
[...]
We need to explore whether an AM33XX specific init_voltage is
required or we can make do with that OMAP3/4 has to offer.
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
ARM: OMAP3+: am33xx_clkdomain: Add CLKDM_NO_AUTODEPS flag
...since it's not available in hardware.
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
...since it's not available in hardware.
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
ARM: OMAP: am33xx: Keep the CLKDIV32K running for now
The debounce clk for GPIO is derived from CLKDIV32K.
Without enabling this module the DBCLK activity bit
of GPIO3 alone is not getting cleared even though the
clock has been disabled. For now enable the module.
TODO: Check if the clock tree dependency to have the module
enabled when the debounce feature is correct. If it is,
then GPIO3 usage needs to be looked at. Since the mainline
code of GPIO has undergone significant changes, it would
perhaps make sense to pull in those patches and then look
into this issue.
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
The debounce clk for GPIO is derived from CLKDIV32K.
Without enabling this module the DBCLK activity bit
of GPIO3 alone is not getting cleared even though the
clock has been disabled. For now enable the module.
TODO: Check if the clock tree dependency to have the module
enabled when the debounce feature is correct. If it is,
then GPIO3 usage needs to be looked at. Since the mainline
code of GPIO has undergone significant changes, it would
perhaps make sense to pull in those patches and then look
into this issue.
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
ARM: OMAP2+: sys_timer: Add suspend/resume callback api's to sys_timer
In case of AM335x, we do not 32k_counter available, which
is actually being used as source timer in OMAP family of devices.
AM335x has 8 timer modules, 2 timer modules are in wakeup/always-on
domain, and out of these 2, 1 timer is secure timer; which
leaves SW to use only 1 timer which can run in off/suspend state.
And we need 2 timers, one for clockevent and another for clocksource.
The suspend/resume callbacks are available on sys_timer and
clocksource, but due to unknown reason clocksource callbacks are
not working. TODO: WE MUST DEBUG FURTHER ON THIS.
So as of now, enable sys_timer suspend/resume callback.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
In case of AM335x, we do not 32k_counter available, which
is actually being used as source timer in OMAP family of devices.
AM335x has 8 timer modules, 2 timer modules are in wakeup/always-on
domain, and out of these 2, 1 timer is secure timer; which
leaves SW to use only 1 timer which can run in off/suspend state.
And we need 2 timers, one for clockevent and another for clocksource.
The suspend/resume callbacks are available on sys_timer and
clocksource, but due to unknown reason clocksource callbacks are
not working. TODO: WE MUST DEBUG FURTHER ON THIS.
So as of now, enable sys_timer suspend/resume callback.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
ARM: TIME: Enable sys_timer suspend/resume callback api's
In case of AM335x, we do not 32k_counter available, which
is actually being used as source timer in OMAP family of devices.
AM335x has 8 timer modules, 2 timer modules are in wakeup/always-on
domain, and out of these 2, 1 timer is secure timer; which leaves
SW to use only 1 timer which can run in off/suspend state. And
we need 2 timers, one for clockevent and another for clocksource.
The suspend/resume callbacks are available on sys_timer and
clocksource, but due to unknown reason clocksource callbacks are
not working. TODO: WE MUST DEBUG FURTHER ON THIS.
The sys_timer suspend/resume callback api's are supressed
under config option !defined(CONFIG_GENERIC_CLOCKEVENTS),
enable it, required for AM335x suspend/resume funtionality.
Not sure, why it is not enabled and appliable to ARM arch, will
have to follow up it with community.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
In case of AM335x, we do not 32k_counter available, which
is actually being used as source timer in OMAP family of devices.
AM335x has 8 timer modules, 2 timer modules are in wakeup/always-on
domain, and out of these 2, 1 timer is secure timer; which leaves
SW to use only 1 timer which can run in off/suspend state. And
we need 2 timers, one for clockevent and another for clocksource.
The suspend/resume callbacks are available on sys_timer and
clocksource, but due to unknown reason clocksource callbacks are
not working. TODO: WE MUST DEBUG FURTHER ON THIS.
The sys_timer suspend/resume callback api's are supressed
under config option !defined(CONFIG_GENERIC_CLOCKEVENTS),
enable it, required for AM335x suspend/resume funtionality.
Not sure, why it is not enabled and appliable to ARM arch, will
have to follow up it with community.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
ARM: OMAP3+: am33xx_hwmod: Correct the usb clkdm_name
Correct the usb clock domain name to "l3s_clkdm".
The USB peripheral doesn't have any seperate clock domain of its
own, it falls under "l3s_clkdm".
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Correct the usb clock domain name to "l3s_clkdm".
The USB peripheral doesn't have any seperate clock domain of its
own, it falls under "l3s_clkdm".
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
ARM: OMAP: AM33XX: Cleanup usb hwmod
Updated the hwmod data for usb pm support.
Changes:
- updated the sysc type to type2
- Added the interface and functional clock and removed opt clocks
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Updated the hwmod data for usb pm support.
Changes:
- updated the sysc type to type2
- Added the interface and functional clock and removed opt clocks
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
ARM: OMAP: AM33XX: Update the sleep code for DS0
Add some error handling and update the code to
make use of DeepSleep0 mode.
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Add some error handling and update the code to
make use of DeepSleep0 mode.
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
ARM: OMAP: AM33XX: Update the flags in HWMOD
For the modules which require special handling, update
the flags in the hwmod data. WIth this done, the PM
framework takes care of the special handling for the
modules.
Note: With HWMOD_SWSUP_MSTANDBY set, the module goes
to standby during boot. Unless the driver makes use
of runtime PM APIs the module will stay in standby
which is not desired. For now we disable idling
this modules during the boot. When the drivers start
making use of runtime PM this workaround must be
removed.
All this should eventually make its way into the
appropriate drivers.
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
For the modules which require special handling, update
the flags in the hwmod data. WIth this done, the PM
framework takes care of the special handling for the
modules.
Note: With HWMOD_SWSUP_MSTANDBY set, the module goes
to standby during boot. Unless the driver makes use
of runtime PM APIs the module will stay in standby
which is not desired. For now we disable idling
this modules during the boot. When the drivers start
making use of runtime PM this workaround must be
removed.
All this should eventually make its way into the
appropriate drivers.
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
ARM: OMAP: AM33XX: Make use of DMTIMER0 for now
Need to check how to do this reliably
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Need to check how to do this reliably
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Revert "arm:omap:gpio - Handle Clocks properly in Suspend/Resume"
This reverts commit bbfb01e1cc06c1f041060258ca93b260e0c83c41.
This reverts commit bbfb01e1cc06c1f041060258ca93b260e0c83c41.
video: da8xx-fb: correct read/write API's used.
This patch replaces raw read/write with readl/writel.
Signed-off-by: Patil, Rachna <rachna@ti.com>
This patch replaces raw read/write with readl/writel.
Signed-off-by: Patil, Rachna <rachna@ti.com>
MTD: OMAP2: Add support for low power sleep for NAND
Support for NAND low power done by
1. Waiting for ongoing MTD operation to finish before entering low power
mode.
2. Invokes GPMC callbacks to handle GPMC low power transitions.
3. ELM suspend activity waiting for ongoing MTD transfer to finish and
handle ELM low power transition cycle by configuring.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
Support for NAND low power done by
1. Waiting for ongoing MTD operation to finish before entering low power
mode.
2. Invokes GPMC callbacks to handle GPMC low power transitions.
3. ELM suspend activity waiting for ongoing MTD transfer to finish and
handle ELM low power transition cycle by configuring.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
ARM: OMAP2+: gpmc: Add low power support
This patch adds Callback functions to support low power transitions by
adding
1. pm_runtime API's to handle GPMC power transitions
2. GPMC save/restore context.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
This patch adds Callback functions to support low power transitions by
adding
1. pm_runtime API's to handle GPMC power transitions
2. GPMC save/restore context.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
ARM: OMAP2+: gpmc: Handle clock by pm_runtime API
This patch updates clock API to pm_runtime API for GPMC clock
activity. This will use HWMOD data which is preferred upon regular
clk_[disable/enable].
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
This patch updates clock API to pm_runtime API for GPMC clock
activity. This will use HWMOD data which is preferred upon regular
clk_[disable/enable].
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
ARM: OMAP2+: nand: Changing SPL and U-boot partition permission
SPL and U-boot partition provided with write permission in order to
update SPL and U-boot from kernel.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
SPL and U-boot partition provided with write permission in order to
update SPL and U-boot from kernel.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
MTD: omap2: 14 byte ECC support for BCH8
14 bytes of ECC is provided for every 512 byte even though 13 byte is the
actual requirement. This is to synchronize the ECC layout with U-boot.
Extra byte is cleared to 0.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
14 bytes of ECC is provided for every 512 byte even though 13 byte is the
actual requirement. This is to synchronize the ECC layout with U-boot.
Extra byte is cleared to 0.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
ARM: OMAP2+: am335x: Enables BCH8 support for NAND
Enables BCH8 ECC support on AM335x SOC.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
Enables BCH8 ECC support on AM335x SOC.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
MTD: omap2: Corrects BCH8 support
This patch
1. Adds separate read path to handle BCH ECC scheme.
2. Adds macros to support BCH8 ECC scheme.
3. Adds ECC correction path for BCH8 ECC scheme.
4. Corrects the ECC layout for BCH8.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
This patch
1. Adds separate read path to handle BCH ECC scheme.
2. Adds macros to support BCH8 ECC scheme.
3. Adds ECC correction path for BCH8 ECC scheme.
4. Corrects the ECC layout for BCH8.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
ARM: OMAP2+: gpmc: Corrects BCH8 support
Corrects the GPMC configuration to support BCH8 ECC scheme.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
Corrects the GPMC configuration to support BCH8 ECC scheme.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
ARM: OMAP2+: am335x: Enable ELM feature.
Enable support for ELM on AM335x SOC
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
Enable support for ELM on AM335x SOC
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
MTD: OMAP2+: elm: Initialize ELM module when needed
This patch configures ELM module for BCH8 ECC scheme on platforms where it is
being used.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
This patch configures ELM module for BCH8 ECC scheme on platforms where it is
being used.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
ARM: OMAP2+: elm: Correct ELM device instance
This patch
1. Corrects the device id for ELM device to -1 as only one instance of ELM
is present, previously it was 1.
2. Adds error handling for failure cases.
3. Provides __init macros to free the memory once initialization done.
4. Corrects to make use inline function definition to remove unnecessary
calls.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
This patch
1. Corrects the device id for ELM device to -1 as only one instance of ELM
is present, previously it was 1.
2. Adds error handling for failure cases.
3. Provides __init macros to free the memory once initialization done.
4. Corrects to make use inline function definition to remove unnecessary
calls.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
ARM: OMAP2+: nand: Flag to support ELM feature on platforms.
This patch introduces a platform data flag to selectively enable/disable
ELM feature for NAND. On platforms where ELM support is present, this
flag needs to be set as true.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
This patch introduces a platform data flag to selectively enable/disable
ELM feature for NAND. On platforms where ELM support is present, this
flag needs to be set as true.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
MTD: OMAP2: elm: Add ELM module support
This patch adds
1. ELM feature support for BCH ECC error correction.
2. Configuration API support for BCH8 ECC scheme.
3. Exports symbols to support module build.
TODO:
Updating to pm_ops
Handling multiple SYNDROME Calculation and page mode support.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
This patch adds
1. ELM feature support for BCH ECC error correction.
2. Configuration API support for BCH8 ECC scheme.
3. Exports symbols to support module build.
TODO:
Updating to pm_ops
Handling multiple SYNDROME Calculation and page mode support.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
MTD: Fixes Coding style
Fixes coding style Error in Makefile "\ No newline at end of file"
Signed-off-by: Philip, Evania's <avinashphilip@ti.com>
Fixes coding style Error in Makefile "\ No newline at end of file"
Signed-off-by: Philip, Evania's <avinashphilip@ti.com>
ARM: OMAP2+: nand: BCH8 support definitions
This patch adds
1. Enum variable for BCH type
2. Macro definitions to support BCH8 ECC scheme
3. Function declarations.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
This patch adds
1. Enum variable for BCH type
2. Macro definitions to support BCH8 ECC scheme
3. Function declarations.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
ARM: OMAP2+: nand: Updated JFFS2 clean marker offset.
JFFS2 clean marker offset used by Linux in case of 8-bit NAND device was
0x1 omap2 NAND driver. But 1st 2 bytes is used to indicate bad blocks by
manufacturers. So offset for JFFS2 clean markers is fixed to 0x2 in
omap2 NAND driver irrespective of 8/16 bit device.
Introduced new macro : JFFS2_CLEAN_MARKER_OFFSET to indicate 0x2 offset
for JFFS2 clean marker.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
JFFS2 clean marker offset used by Linux in case of 8-bit NAND device was
0x1 omap2 NAND driver. But 1st 2 bytes is used to indicate bad blocks by
manufacturers. So offset for JFFS2 clean markers is fixed to 0x2 in
omap2 NAND driver irrespective of 8/16 bit device.
Introduced new macro : JFFS2_CLEAN_MARKER_OFFSET to indicate 0x2 offset
for JFFS2 clean marker.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
ARM: OMAP2+: nand: Synching HAMMING ECC layout with that of U-boot.
For OOb_64, offset is fixed to 40 for kernel/fs, by changing
kernel code to calculate hw_ecc layout considering these:
1) 12 bytes in case of 512 byte access and 24 bytes in case of 256 byte
access in OOB_64 can be supported.
2) Ecc bytes lie to the end of OOB area.
Introducing a new macro : MAX_HWECC_BYTES_OOB_64 which is the maximum
number of eccbytes supported for OOB_64n Hamming ECC mode.
Signed-off-by: Hrishikesh Bhandiwad <hrishikesh.b@ti.com>
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
For OOb_64, offset is fixed to 40 for kernel/fs, by changing
kernel code to calculate hw_ecc layout considering these:
1) 12 bytes in case of 512 byte access and 24 bytes in case of 256 byte
access in OOB_64 can be supported.
2) Ecc bytes lie to the end of OOB area.
Introducing a new macro : MAX_HWECC_BYTES_OOB_64 which is the maximum
number of eccbytes supported for OOB_64n Hamming ECC mode.
Signed-off-by: Hrishikesh Bhandiwad <hrishikesh.b@ti.com>
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
ARM: OMAP2+: nand: Support for BCH
Patch is derived from "omap3: nand: bch ecc support added"
available at:
http://arago-project.org/git/projects/?p=linux-omap3.git;a=commit;
f=arch/arm/mach-omap2/gpmc.c;hb=79f5ddc6
This patch has the following modification
1. Removes the BCH4 support as it is not tested.
2. Configures GPMC for BCH ECC support.
3. Adds BCH ECC layout definitions.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
Patch is derived from "omap3: nand: bch ecc support added"
available at:
http://arago-project.org/git/projects/?p=linux-omap3.git;a=commit;
f=arch/arm/mach-omap2/gpmc.c;hb=79f5ddc6
This patch has the following modification
1. Removes the BCH4 support as it is not tested.
2. Configures GPMC for BCH ECC support.
3. Adds BCH ECC layout definitions.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
ARM: OMAP2+: am335x: Selects HAMMING ECC scheme.
Selects ECC scheme to Hamming code for NAND.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
Selects ECC scheme to Hamming code for NAND.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
ARM: OMAP2+: am335x: GPMC device registration
Registers GPMC device using HWMOD API. Also provides the platform data
for the devices connected on GPMC controller, in this case NAND flash
device.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
Registers GPMC device using HWMOD API. Also provides the platform data
for the devices connected on GPMC controller, in this case NAND flash
device.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
ARM: OMAP2+: hwmod: Corrects GPMC HWMOD data
Corrects the GPMC HWMOD data for idle mode usage.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
Corrects the GPMC HWMOD data for idle mode usage.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
ARM: OMAP2+: gpmc: Adapt to HWMOD
Create API for platforms to adapt gpmc to HWMOD
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Create API for platforms to adapt gpmc to HWMOD
Signed-off-by: Afzal Mohammed <afzal@ti.com>
ARM: OMAP2+: gpmc: nand support
gpmc driver probe will check the capability of the
devices passed via platform data. Upon finding nand
device, gpmc nand initialization would be done. The
initialization function will internally create
platform device for nand.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
gpmc driver probe will check the capability of the
devices passed via platform data. Upon finding nand
device, gpmc nand initialization would be done. The
initialization function will internally create
platform device for nand.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
ARM: OMAP2+: gpmc: initial driver support
Migrate gpmc code to driver. Initially driver probe
has to initialize device connected to gpmc using
their respective initialization function (based on
the flag passed by platform data). At this stage
platform devices will be created by respective
device initialization function itself.
Later creating platfrom devices would be separated
from device initialization. Once this is done,
driver would be moved to mfd. Then in mfd probe
only device specific initialization would be done,
and would let mfd infrastruture to create platform
devices for the gpmc connected peripherals.
TODO:
1. Is BUG() required to be called on clk_get failure
2. Try not to limit GPMC use cases
3. Revisit GPMC driver conversion patch sequence
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Migrate gpmc code to driver. Initially driver probe
has to initialize device connected to gpmc using
their respective initialization function (based on
the flag passed by platform data). At this stage
platform devices will be created by respective
device initialization function itself.
Later creating platfrom devices would be separated
from device initialization. Once this is done,
driver would be moved to mfd. Then in mfd probe
only device specific initialization would be done,
and would let mfd infrastruture to create platform
devices for the gpmc connected peripherals.
TODO:
1. Is BUG() required to be called on clk_get failure
2. Try not to limit GPMC use cases
3. Revisit GPMC driver conversion patch sequence
Signed-off-by: Afzal Mohammed <afzal@ti.com>
ARM: OMAP2+: nand: Unify initialization functions
Unify the two existing nand initialization functions
This makes gpmc migration to driver easier
From now on, platforms has to call omap_nand_init
to initialize platform nand structures, it's fields.
They have the liberty of directly updating platform
specific nand data also instead of calling it.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Unify the two existing nand initialization functions
This makes gpmc migration to driver easier
From now on, platforms has to call omap_nand_init
to initialize platform nand structures, it's fields.
They have the liberty of directly updating platform
specific nand data also instead of calling it.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
ARM: OMAP2+: nand: board_nand_init timing arguement
Modify board_nand_init to take additional arguement,
timings for gpmc. Also rename the function to
omap_nand_init & let it return pointer to structure
of omap_nand_platform_data.
A prerequisite for combining different board nand
initialization functions.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
Modify board_nand_init to take additional arguement,
timings for gpmc. Also rename the function to
omap_nand_init & let it return pointer to structure
of omap_nand_platform_data.
A prerequisite for combining different board nand
initialization functions.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
ARM: OMAP2+: nand: Acquire CS in gpmc_nand_init
Prerequisite to merging different board nand functions to one
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Prerequisite to merging different board nand functions to one
Signed-off-by: Afzal Mohammed <afzal@ti.com>
ARM: OMAP2+: am335x: Removes NAND device registration
Removes NAND device registration to make the way for new NAND device
registration API.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
Removes NAND device registration to make the way for new NAND device
registration API.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
Revert "arm:omap:am335x - Selects HAMMING ECC scheme."
This reverts commit 1abf3aa04758ab4b061f7731392f51974c327558.
This reverts commit 1abf3aa04758ab4b061f7731392f51974c327558.
Revert "arm:omap:nand - BCH ecc support added"
This reverts commit 48a09a90588b40f671447d0e8e782fc01ff7d51c.
This reverts commit 48a09a90588b40f671447d0e8e782fc01ff7d51c.
Revert "arm:omap:nand - Synching HAMMING ECC layout with that of U-boot."
This reverts commit b60fadc071d76154972513623cf7e784a3af1d00.
This reverts commit b60fadc071d76154972513623cf7e784a3af1d00.
Revert "arm:omap:nand - Updated JFFS2 clean marker offset."
This reverts commit e536110d5dd555a2f67131a16a111505da8280e6.
This reverts commit e536110d5dd555a2f67131a16a111505da8280e6.
Revert "arm:omap:nand - Fix for NAND module build support"
This reverts commit c2e6066cd2a4b5a584541c2ae16bda779d536e4b.
This reverts commit c2e6066cd2a4b5a584541c2ae16bda779d536e4b.
Revert "arch:arm:nand - ELM Module is added"
This reverts commit 9b5f5456fd3b1c2b858e429e5a10fdf01abfabf3.
This reverts commit 9b5f5456fd3b1c2b858e429e5a10fdf01abfabf3.
Revert "arm:omap:nand - Enable BCH8 support"
This reverts commit f6c154410ab3b0169e92274b9e983091997986ff.
This reverts commit f6c154410ab3b0169e92274b9e983091997986ff.
Revert "arch:arm:nand - 14 byte ECC support for BCH8"
This reverts commit 5a03f252fe0052cc5515ab1ba722c21c6f070ac3.
This reverts commit 5a03f252fe0052cc5515ab1ba722c21c6f070ac3.
Revert "arch:arm:nand - Changing SPL and U-boot partition permission"
This reverts commit c5fa750b5c0de616f38719e5c8f8272768a0bff5.
This reverts commit c5fa750b5c0de616f38719e5c8f8272768a0bff5.
Revert "arm:omap:nand - Add support for suspend/resume"
This reverts commit 38f1ae3d786e532574ec3a21e243a72afb54458a.
This reverts commit 38f1ae3d786e532574ec3a21e243a72afb54458a.
Revert "arm:omap:am33xx - GPMC timings"
This reverts commit 9c1c234986af93c8478bfcbde64ee61250b9c322.
This reverts commit 9c1c234986af93c8478bfcbde64ee61250b9c322.
I2C: OMAP: correct SYSC register offset for OMAP4
Correct OMAP_I2C_SYSC_REG offset in omap4 register map.
Offset 0x20 is reserved and OMAP_I2C_SYSC_REG has 0x10 as offset.
Signed-off-by: Alexander Aring <a.aring@phytec.de>
[khilman@ti.com: minor changelog edits]
Cc: stable@vger.kernel.org
Signed-off-by: Kevin Hilman <khilman@ti.com>
Correct OMAP_I2C_SYSC_REG offset in omap4 register map.
Offset 0x20 is reserved and OMAP_I2C_SYSC_REG has 0x10 as offset.
Signed-off-by: Alexander Aring <a.aring@phytec.de>
[khilman@ti.com: minor changelog edits]
Cc: stable@vger.kernel.org
Signed-off-by: Kevin Hilman <khilman@ti.com>
ARM: OMAP: AM33XX: CAN: d_can: Add suspend resume support
This patch adds suspend resume support to DCAN module. Adds
one flag for knowing the status of DCAN module, whether it
is opened or not.
TODO: Make dcan driver as single file instead of multiple
Signed-off-by: AnilKumar Ch <anilkumar@ti.com>
This patch adds suspend resume support to DCAN module. Adds
one flag for knowing the status of DCAN module, whether it
is opened or not.
TODO: Make dcan driver as single file instead of multiple
Signed-off-by: AnilKumar Ch <anilkumar@ti.com>
ARM: OMAP: AM33XX: CAN: d_can: fix DCAN raminit issue
This patch fixes the DCAN raminit problem
Details:
DCAN RAM initialization is not complete and clock disable
is not working as expected after doing the d_can_open().
Before this patch, implementation is like doing DCAN RAM init
first and then enabling the clocks. This was done this way
because RAM init bits are from the control module register.
Workaround:
DCAN clocks should be enable first and then DCAN ram
initialization
Signed-off-by: AnilKumar Ch <anilkumar@ti.com>
This patch fixes the DCAN raminit problem
Details:
DCAN RAM initialization is not complete and clock disable
is not working as expected after doing the d_can_open().
Before this patch, implementation is like doing DCAN RAM init
first and then enabling the clocks. This was done this way
because RAM init bits are from the control module register.
Workaround:
DCAN clocks should be enable first and then DCAN ram
initialization
Signed-off-by: AnilKumar Ch <anilkumar@ti.com>
ARM: OMAP: AM33XX: CAN: d_can: Add pm runtime support
This patch adds the pm_runtime support to DCAN driver by
replacing clock APIs with pm_runtime APIs.
This patch also cleans up the driver by removing the un-wanted
platform data/parameters
Signed-off-by: AnilKumar Ch <anilkumar@ti.com>
This patch adds the pm_runtime support to DCAN driver by
replacing clock APIs with pm_runtime APIs.
This patch also cleans up the driver by removing the un-wanted
platform data/parameters
Signed-off-by: AnilKumar Ch <anilkumar@ti.com>
ARM: OMAP: AM33XX: CAN: d_can: Platform data clean-up
This patch cleans up the d_can driver platform specific initilization
data after adding the am33xx hwmod data. Modifies the d_can clock table
entries, modified data includes dev_id and con_id
Signed-off-by: AnilKumar Ch <anilkumar@ti.com>
This patch cleans up the d_can driver platform specific initilization
data after adding the am33xx hwmod data. Modifies the d_can clock table
entries, modified data includes dev_id and con_id
Signed-off-by: AnilKumar Ch <anilkumar@ti.com>
ARM: OMAP: AM33XX: CAN: d_can: Add hwmod data for am33xx device
This patch adds the hwmod data needed by the driver. By adding
DCAN base addresses, interrupt numbers for two d_can instances.
Signed-off-by: AnilKumar Ch <anilkumar@ti.com>
This patch adds the hwmod data needed by the driver. By adding
DCAN base addresses, interrupt numbers for two d_can instances.
Signed-off-by: AnilKumar Ch <anilkumar@ti.com>
ARM: OMAP2+: I2C: hwmod: set flag to restore context
Restore of i2c context is not done for am335x due to missing flag. This
patch adds the OMAP_I2C_FLAG_RESET_REGS_POSTIDLE in the am335x
hwmod data which activates the restore.
This also solves the problem shown below of i2c instances not resuming
correctly from suspend. (especially those not in wakeup domain)
[ 42.610146] omap_i2c omap_i2c.2: XRDY IRQ while no data to send
[ 43.611192] omap_i2c omap_i2c.2: controller timed out
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
Restore of i2c context is not done for am335x due to missing flag. This
patch adds the OMAP_I2C_FLAG_RESET_REGS_POSTIDLE in the am335x
hwmod data which activates the restore.
This also solves the problem shown below of i2c instances not resuming
correctly from suspend. (especially those not in wakeup domain)
[ 42.610146] omap_i2c omap_i2c.2: XRDY IRQ while no data to send
[ 43.611192] omap_i2c omap_i2c.2: controller timed out
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
ARM: OMAP2+: HSMMC: fix the platform setup for am335x
AM335x don't have the register CONTROL_PBIAS_LITE, so we set a
noop "set_power" function for it. This was already been done
for MMC0 instance. This patch applies this to instance 1 as well.
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
AM335x don't have the register CONTROL_PBIAS_LITE, so we set a
noop "set_power" function for it. This was already been done
for MMC0 instance. This patch applies this to instance 1 as well.
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
usb: musb: pm: turn on/off timers during suspend/resume
There are two timers per usb port and they need to be disabled (if active)
before suspend and reenabled after resume.
There are two timers per usb port and they need to be disabled (if active)
before suspend and reenabled after resume.
usb: musb: cppi41dma: use transparent mode for g_mass_stoarge
USB MSC as a device need to use transparent mode of CPPI4.1 DMA
and the same was getting done for g_file_storage. Updated it
for g_mass_storage also.
Merge to:
commit e141f0a5ab310a5d5ec9a937070577c7e5b0f4a7
musb:cppi41: use GRNDIS mode for rx-dma except file-storage gadget
USB MSC as a device need to use transparent mode of CPPI4.1 DMA
and the same was getting done for g_file_storage. Updated it
for g_mass_storage also.
Merge to:
commit e141f0a5ab310a5d5ec9a937070577c7e5b0f4a7
musb:cppi41: use GRNDIS mode for rx-dma except file-storage gadget
ARM: OMAP3+: am33xx_clkdomain: Remove usb clkdomain entry
The USB peripheral doesn't have any seperate clock domain of its
own, so remove it.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
The USB peripheral doesn't have any seperate clock domain of its
own, so remove it.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
ARM: OMAP3+: am33xx_hwmod: Correct the usb clkdm_name
Correct the usb clock domain name to "l3s_clkdm".
The USB peripheral doesn't have any seperate clock domain of its
own, it falls under "l3s_clkdm".
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Correct the usb clock domain name to "l3s_clkdm".
The USB peripheral doesn't have any seperate clock domain of its
own, it falls under "l3s_clkdm".
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
usb: musb: ti81xx: save and restore DMA registers
CPPI4.1 DMA register save and restore is added in common core file
cppi41.c so that same can be used by other platforms.
Restore functions writes to scheduler control register at end after
initializing the scheduler table.
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
CPPI4.1 DMA register save and restore is added in common core file
cppi41.c so that same can be used by other platforms.
Restore functions writes to scheduler control register at end after
initializing the scheduler table.
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
usb: musb: ti81xx: add support for save and restore
Added register context save and restore to support usb pm.
TODO:
- Add save and restore for cppi dma registers
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Added register context save and restore to support usb pm.
TODO:
- Add save and restore for cppi dma registers
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
usb: musb: replace __raw_read/writel by readl/write
Using readl and writel so that data is written to memory even on
a weakly ordered memory model of arm-v7 based platforms.
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Using readl and writel so that data is written to memory even on
a weakly ordered memory model of arm-v7 based platforms.
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
usb: musb: host: release dma channels if no active io
Currently DMA channels are allocated and they remain allocated
even if there is no active data transfer. Added channel_release()
whenever there is no pending request.
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Currently DMA channels are allocated and they remain allocated
even if there is no active data transfer. Added channel_release()
whenever there is no pending request.
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
usb: musb: ti81xx: use runtime pm API for clock
Also has cleanup for pm support
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Also has cleanup for pm support
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
ARM: OMAP: AM33XX: Cleanup usb hwmod
Updated the hwmod data for usb pm support.
Changes:
- updated the sysc type to type2
- Added the interface and functional clock and removed opt clocks
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Updated the hwmod data for usb pm support.
Changes:
- updated the sysc type to type2
- Added the interface and functional clock and removed opt clocks
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
ARM: OMAP: AM335X evm: remove default initialization
* Remove the code that assumes a default board during the
seutp call. Instead give a more descriptive error message and
then call machine_halt to halt the boot.
* This is to prevent trying to configure and boot unknown
hardware configurations, and instead guide users to the area
of the kernel they will need to modify.
Signed-off-by: Chase Maupin <Chase.Maupin@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
* Remove the code that assumes a default board during the
seutp call. Instead give a more descriptive error message and
then call machine_halt to halt the boot.
* This is to prevent trying to configure and boot unknown
hardware configurations, and instead guide users to the area
of the kernel they will need to modify.
Signed-off-by: Chase Maupin <Chase.Maupin@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
ARM: OMAP2+: edma: use runtime PM
Convert the OMAP edma driver to use runtime PM. This will use HWMOD data
which is preferred upon regular clk_[disable/enable]
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
Convert the OMAP edma driver to use runtime PM. This will use HWMOD data
which is preferred upon regular clk_[disable/enable]
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
ARM: OMAP2+: edma: use omap_device api for registration
Convert the old-style device registration code for edma to use
omap_device. This will allow the driver to be converted to use PM
runtime and to take advantage of the OMAP IP block management
infrastructure (hwmod, PM, etc.).
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
Convert the old-style device registration code for edma to use
omap_device. This will allow the driver to be converted to use PM
runtime and to take advantage of the OMAP IP block management
infrastructure (hwmod, PM, etc.).
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
ARM: OMAP2+: edma: add support for suspend/resume
This patch adds suspend/resume support along with context save and
restore to edma module. All registers updated during probe, channel,
event allocation, param-set, interrupts are saved and restored.
This patch is tested on AM335x Beagle bone HS-MMC module.
TODO:
Currently all register are backed up and restored irrespective whether
there was any change from the values that was programmed or not.
This is likely to negatively impact the overall suspend/resume time.
Param-set saving can be optimized by looking at the actual usage. A
caching mechanism can be implemented and values can be cached when they
are changed. This way noting needs to be saved & restore is just a copy
from the cache.
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
This patch adds suspend/resume support along with context save and
restore to edma module. All registers updated during probe, channel,
event allocation, param-set, interrupts are saved and restored.
This patch is tested on AM335x Beagle bone HS-MMC module.
TODO:
Currently all register are backed up and restored irrespective whether
there was any change from the values that was programmed or not.
This is likely to negatively impact the overall suspend/resume time.
Param-set saving can be optimized by looking at the actual usage. A
caching mechanism can be implemented and values can be cached when they
are changed. This way noting needs to be saved & restore is just a copy
from the cache.
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
ARM: OMAP2+: edma: move edma clock setup to edma driver
Let edma driver handle clock setup. Earlier this was handled during
edma device registration
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
Let edma driver handle clock setup. Earlier this was handled during
edma device registration
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
ARM: OMAP2+: edma: correct edma HWMOD data
This patch
1. adds edma base address defines to hwmod file. Tomorrow when DT is
introduced, this file can be removed completely
2. groups edma related declarations together. Also, updates hwmod data
for tpcc/tptc instances.
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
This patch
1. adds edma base address defines to hwmod file. Tomorrow when DT is
introduced, this file can be removed completely
2. groups edma related declarations together. Also, updates hwmod data
for tpcc/tptc instances.
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
video: da8xx-fb: save and restore LCDC context on power management
Save and restore register context of LCDC before suspend and after resume.
Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com>
Save and restore register context of LCDC before suspend and after resume.
Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com>
video: da8xx-fb: rely on pm_runtime API for clock operations
Replace clk_enable/clk_disable by pm_runtime_get_sync/pm_runtime_put_sync
to enable and disable interface and functional clocks.
Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com>
Replace clk_enable/clk_disable by pm_runtime_get_sync/pm_runtime_put_sync
to enable and disable interface and functional clocks.
Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com>
ARM: OMAP2+: am33xx: Register LCD device via HWMOD data
Make necessary changes to register LCDC device via HWMOD data.
Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com>
Make necessary changes to register LCDC device via HWMOD data.
Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com>
ARM: OMAP3: am33xx_hwmod: Do not idle/reset debugss module
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
ARM: OMAP2+: control: Add missing defination for AM33XX_CTRL_REGADDR
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
ARM: OMAP3: am33xx_hwmod: Merge upstream changes
Based on community feedback/developement,
- Hardcode baseaddr and irq nos.
- Some cleanup, arrangement of code, etc...
Based on community feedback/developement,
- Hardcode baseaddr and irq nos.
- Some cleanup, arrangement of code, etc...
ARM: OMAP2+: Makefile: Remove build rule for deleted files
Remove the references (or build rule) for the deleted source
files, prminst, cminst, etc...
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Remove the references (or build rule) for the deleted source
files, prminst, cminst, etc...
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>