sitara-epos/sitara-epos-kernel.git
10 years agoarm: omap: am335x: corrected mmc1 pin mux naming
Patil, Rachna [Wed, 25 Jan 2012 06:44:32 +0000 (12:14 +0530)]
arm: omap: am335x: corrected mmc1 pin mux naming

Signed-off-by: Patil, Rachna <rachna@ti.com>
10 years agoarm:omap:am335x:remove duplicated code in mux file
Patil, Rachna [Wed, 25 Jan 2012 06:20:01 +0000 (11:50 +0530)]
arm:omap:am335x:remove duplicated code in mux file

GPMC_CLK was declared twice, corrected the same

Signed-off-by: Patil, Rachna <rachna@ti.com>
10 years agoarm: omap: am335x: Add gpio entries in mux file
Patil, Rachna [Wed, 25 Jan 2012 06:00:38 +0000 (11:30 +0530)]
arm: omap: am335x: Add gpio entries in mux file

This pacth adds gpio in mode7 for all
the mux entries of am335x

Signed-off-by: Patil, Rachna <rachna@ti.com>
10 years agoarm:omap:am33xx - drive Haptics motor using eHRPWM's sysfs interface.
Philip, Avinash [Tue, 24 Jan 2012 13:33:04 +0000 (19:03 +0530)]
arm:omap:am33xx - drive Haptics motor using eHRPWM's sysfs interface.

Since Haptics doesn't have its own driver(yet), currently Haptics can
be tested using eHRPWM's sysfs interface.

This patch adds support for driving Haptics motor connected to
eHRPWM Instance 2 channel 2.

According to datasheet, the Haptic Motors Max RPM is 15000 RPM. Driving
the Motor above MAX RPM may spoil the Motor.
This patch limits the eHRPWM max freq to 250Hz. This can be changed
from platform data.

Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
10 years agoam335x: regulator: tps65217 fix for BeagleBone A3 and greater
AnilKumar Ch [Mon, 2 Jan 2012 09:14:20 +0000 (14:59 +0545)]
am335x: regulator: tps65217 fix for BeagleBone A3 and greater

This patch fixes the problem that tps65217B regulator support
is applicable only for BeagleBone A3 and greater. And tps65217B
regulator is not applicable for the BeagleBone's whose revision
verion is < A3

Signed-off-by: AnilKumar Ch <anilkumar@ti.com>
10 years agoARM: OMAP: AM33XX: Disable self-refresh upon resume
Vaibhav Bedia [Tue, 24 Jan 2012 11:45:38 +0000 (17:15 +0530)]
ARM: OMAP: AM33XX: Disable self-refresh upon resume

During suspend, we put the SDRAM in self-refresh mode.
If we don't clear this mode in the resume path SDRAM
can automatically enter self-refresh when the CPU is idle.

While this looks to be right behavior, this causes flickers
on the LCD specifically on ICS. So, when coming out of
suspend disable self-refresh mode.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
10 years agovideo:da8xx: Reverting patch to use dma_alloc_coherent instead
Manjunathappa, Prakash [Tue, 24 Jan 2012 07:25:18 +0000 (12:55 +0530)]
video:da8xx: Reverting patch to use dma_alloc_coherent instead
get_free_pages

Reverting "video:da8xx: Replace dma_alloc_coherent tp get_free_pages
(f482ac5b63e0fc84c546cb463e4dea5e02682516)" as SGX model fails do alloc
of DMA memory using get_free_pages. This patch is dependent on "AM335x:
Add option to configure CONSISTENT_DMA_SIZE" patch to increase
CONSISTENT_DMA_SIZE for successful allocation of memory >2MB.

Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com>
10 years agoAM335x: Add option to configure CONSISTENT_DMA_SIZE
Manjunathappa, Prakash [Tue, 24 Jan 2012 07:03:02 +0000 (12:33 +0530)]
AM335x: Add option to configure CONSISTENT_DMA_SIZE

This is temporary workaround patch required for SGX model as it fails to
get DMA memory using get_free_pages. So patch configures CONSISTENT_DMA_SIZE
via configurable option FB_DA8XX_CONSISTENT_DMA_SIZE.

Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com>
10 years agoARM: OMAP: am335xevm: Fix pruss clock alias error
Vaibhav Hiremath [Tue, 24 Jan 2012 05:54:18 +0000 (11:24 +0530)]
ARM: OMAP: am335xevm: Fix pruss clock alias error

Due to changes in clock tree the name of the clock has
changed, so TEMP create new alias entry for pruss.

NOTE: Revisit this commit/patch, based on final clock tree.

10 years agoARM: OMAP: io: Add check_revision/feature calls for am33xx_init
Vaibhav Hiremath [Mon, 23 Jan 2012 06:07:51 +0000 (11:37 +0530)]
ARM: OMAP: io: Add check_revision/feature calls for am33xx_init

10 years agoARM: OMAP: id: Add missing break statement in omap3xxx_check_revision
Vaibhav Hiremath [Mon, 23 Jan 2012 05:47:51 +0000 (11:17 +0530)]
ARM: OMAP: id: Add missing break statement in omap3xxx_check_revision

Add missing break statement, which somehow got removed from
omap3xxx_check_revision function inside AM335x switch case,
resulting into wrong omap/cpu_rev configuration.

10 years agoinput: touchscreen: fix TSC related build warning
Patil, Rachna [Tue, 24 Jan 2012 04:43:18 +0000 (10:13 +0530)]
input: touchscreen: fix TSC related build warning

Signed-off-by: Patil, Rachna <rachna@ti.com>
10 years agoarm:omap:am33xx - LCD flicker removed.
Philip, Avinash [Mon, 23 Jan 2012 07:31:52 +0000 (13:01 +0530)]
arm:omap:am33xx - LCD flicker removed.

Backlight frequency is reduced to remove LCD flicker issue.

Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
10 years agoarm:omap:am33xx - update GPMC hwmod data
Philip, Avinash [Mon, 23 Jan 2012 07:31:30 +0000 (13:01 +0530)]
arm:omap:am33xx - update GPMC hwmod data

SOFT_RESET flag is added in GPMC_SYSCONFIG flags in hwmod data.
Resetting the module causes kernel crash on gpmc_init().  To fix the
crash base address and size has been updated for AM33xx SOC.

Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
10 years agoarm:omap:am33xx - GPMC timings
Philip, Avinash [Tue, 17 Jan 2012 06:53:33 +0000 (12:23 +0530)]
arm:omap:am33xx - GPMC timings

Default timing causes issues with OOB data corruption on reading and
causes UBIFS torture test. To resolve the above issue, NAND was tested
with different timings and optimal timings were adapted after repeated
tests and trials.

Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
10 years agoNAND : Add data memory barrier to enforce ordering
Sriramakrishnan [Wed, 3 Mar 2010 09:28:03 +0000 (14:58 +0530)]
NAND : Add data memory barrier to enforce ordering

When using delay loop for wait states, need to ascertain that
the write to OMAP HW register is reflected befor the delay
loop starts. This patch adds a dmb() instruction to this effect.
Without this fix, NAND read failures reported with mtd_oobtests.

Signed-off-by: Sriramakrishnan <srk@ti.com>
Signed-off-by: Sriramakrishnan A G <srk@ti.com>
10 years agocan: d_can: Suspend resume additions
AnilKumar Ch [Fri, 6 Jan 2012 08:08:01 +0000 (13:53 +0545)]
can: d_can: Suspend resume additions

Signed-off-by: AnilKumar Ch <anilkumar@ti.com>
10 years agoam335x: mpu voltage domain tolerance modification
AnilKumar Ch [Fri, 20 Jan 2012 08:46:24 +0000 (14:31 +0545)]
am335x: mpu voltage domain tolerance modification

This patch modifies the mpu tolerance to 4% to provide the maximum
voltage limit while requesting for a new voltage. 4% value is taken
from am33xx datasheet

Signed-off-by: AnilKumar Ch <anilkumar@ti.com>
10 years agoam335x: Add tps65217 config to am335x def config
AnilKumar Ch [Fri, 20 Jan 2012 11:02:26 +0000 (16:47 +0545)]
am335x: Add tps65217 config to am335x def config

This patch adds the tps65217 configuration to am335x_evm_defconfig

Signed-off-by: AnilKumar Ch <anilkumar@ti.com>
10 years agoam335x: regulator: Add tps65217 regulator platform data
AnilKumar Ch [Fri, 20 Jan 2012 08:26:17 +0000 (14:11 +0545)]
am335x: regulator: Add tps65217 regulator platform data

This patch adds the tps65217 regulator for AM355X, which
is used by the beaglebone. Mainly adds all the consumers
like mpu, core, ddr, usb, rtc and io's.

Signed-off-by: AnilKumar Ch <anilkumar@ti.com>
10 years agoregulator: tps65217: Add tps65217 regulator driver
AnilKumar Ch [Tue, 27 Dec 2011 07:43:49 +0000 (13:28 +0545)]
regulator: tps65217: Add tps65217 regulator driver

This patch adds tps65217 PMIC as a regulator

The regulator module consists of 3 DCDCs and 4 LDOs. The output
voltages are configurable and are meant to supply power to the
main processor and other components

Signed-off-by: AnilKumar Ch <anilkumar@ti.com>
10 years agoMFD: TPS65217: Add new mfd device for TPS65217
AnilKumar Ch [Tue, 20 Dec 2011 07:15:18 +0000 (12:45 +0530)]
MFD: TPS65217: Add new mfd device for TPS65217

The TPS65217 chip is a power management IC for Portable Navigation Systems
and Tablet Computing devices. It contains the following components:

- Regulators
- White LED
- USB battery charger

This patch adds support for tps65217 mfd device. At this time only
the regulator functionality is made available.

Signed-off-by: AnilKumar Ch <anilkumar@ti.com>
10 years agoARM: OMAP: AM33XX: Don't enable suspend by default
Vaibhav Bedia [Fri, 20 Jan 2012 07:03:06 +0000 (12:33 +0530)]
ARM: OMAP: AM33XX: Don't enable suspend by default

Leaving the suspend option enabled in the defconfig
leads to a 60 second timeout if the CM3 binary is not
provided. To avoid this, disable suspend for now.

A better solution for this might be exploring the
usage of nowait version of the request_firmware
interface.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
10 years agoARM: OMAP: AM33XX: Update the suspend code for DS1
Vaibhav Bedia [Tue, 17 Jan 2012 07:02:11 +0000 (12:32 +0530)]
ARM: OMAP: AM33XX: Update the suspend code for DS1

Put SDRAM in self refresh mode when suspending. For now
the reconfiguration of SDRAM is done using fixed values.
The values used are valid for AM335x EVM with DDR2
running @266MHz.

Note: Optimization of the aseembly code will be done
in subsequent patches.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
10 years agoARM: OMAP: AM33XX: Add EMIF and DDR PHY register offsets and values
Vaibhav Bedia [Tue, 17 Jan 2012 06:54:54 +0000 (12:24 +0530)]
ARM: OMAP: AM33XX: Add EMIF and DDR PHY register offsets and values

When coming out of low power state, the EMIF and DDR
PHY registers need to be restored to the old value.

A naive approach of storing the DDR PHY register values during
suspend and restoring it back during resume will not work
due to a silicon errata related to readback of the DDR PHY
registers.

EMIF registers values can be readback and stored but for
now we assume that the code is running on AM335x EVM with DDR2
which is configured to run @266MHz.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
10 years agoARM: OMAP: AM33XX: Add an API for obtaining the virt EMIF addr
Vaibhav Bedia [Tue, 17 Jan 2012 06:44:34 +0000 (12:14 +0530)]
ARM: OMAP: AM33XX: Add an API for obtaining the virt EMIF addr

The low level code for suspend needs the virtual address
of EMIF so that the SDRAM can be put in self-refresh.
Since the emif is ioremapped very early on, add an API
which returns the virtual address of the EMIF address space

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
10 years agoARM: OMAP: AM33XX: Remove autoidle regs
Vaibhav Bedia [Thu, 19 Jan 2012 11:18:49 +0000 (16:48 +0530)]
ARM: OMAP: AM33XX: Remove autoidle regs

... since this feature is not supported in the hardware.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
10 years agoARM: OMAP3+: dpll: Configure autoidle mode only if its supported
Vaibhav Bedia [Thu, 19 Jan 2012 11:06:26 +0000 (16:36 +0530)]
ARM: OMAP3+: dpll: Configure autoidle mode only if its supported

The current DPLL code enables and disables autoidle features
without checking whether the autoidle register is available.
Fix this by putting a check for the existence of the autoidle
register in the DPLL data.

With such a check in place, for DPLLs which do not support this
feature, simply skipping the autoidle_reg entry in the DPLL data
is sufficient.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
10 years agoARM: OMAP2: AM33XX: misc hwmod fixes
Vaibhav Bedia [Tue, 17 Jan 2012 06:51:19 +0000 (12:21 +0530)]
ARM: OMAP2: AM33XX: misc hwmod fixes

Some of the hwmods that were initially added to the list
are not complete. Due to missing information like base
address, sysc offset and bitfields definitions, the
registration of these hwmods silently fails.

For now, fix up the hwmods which are needed for proceeding
with system suspend. Note that this file is not complete
at the moment and will most likely require a couple of more
rounds to bring it in line with that has been done for
OMAP3/4.

TODO:
1. Check why RTC requires NO_RESET and NO_IDLE to be set
2. Check why GPMC does not work when SOFTRESET is done

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
10 years agoARM: OMAP2+: hwmod: Add two new sysc_field types
Vaibhav Bedia [Tue, 17 Jan 2012 06:38:43 +0000 (12:08 +0530)]
ARM: OMAP2+: hwmod: Add two new sysc_field types

In AM33XX, two new types of SYSCONFIG bitfields are present.
This patch introduces two new sysc_field types to take care
of these new schemes.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
10 years agoARM: OMAP2+: hwmod: Add an API to handle master standby mode
Vaibhav Bedia [Tue, 17 Jan 2012 06:33:29 +0000 (12:03 +0530)]
ARM: OMAP2+: hwmod: Add an API to handle master standby mode

This API is intended to be used by drivers/code that requires
direct manipulation of the MSTANDBY bits in SYSCONFIG registers.
AM33XX low power state transition happens only if some of the
bus masters like EDMA, CPSW and USB have been forced to standby.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
10 years agoARM: OMAP2+: UART: Don't register errata i291 for AM33XX
Vaibhav Bedia [Tue, 17 Jan 2012 05:58:44 +0000 (11:28 +0530)]
ARM: OMAP2+: UART: Don't register errata i291 for AM33XX

UART_ERRATA_i291_DMA_FORCEIDLE is not applicable to the
AM33XX family

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
10 years agoARM: OMAP: AM33XX: Fix up header inclusion for baseport patches
Vaibhav Bedia [Tue, 17 Jan 2012 05:33:31 +0000 (11:03 +0530)]
ARM: OMAP: AM33XX: Fix up header inclusion for baseport patches

cm33xx.h does not need to include any of the kernel headers
and hence remove them.

cminst33xx.c needs to explicitly include common.h to avoid
build breakage

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
10 years agoARM: OMAP: AM33XX: Mark the essential clocks as ENABLE_ON_INIT
Vaibhav Bedia [Tue, 17 Jan 2012 05:25:55 +0000 (10:55 +0530)]
ARM: OMAP: AM33XX: Mark the essential clocks as ENABLE_ON_INIT

Some of the clocks will never be disabled from the kernel.
To get an accurate use count for such clocks, mark them
with the ENABLE_ON_INIT flag.

Note: Need to check if there's a better way of doing this.
Maybe there should be a clock_get for such clocks.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
10 years agoBacklight - Brightness scale is changed.
Philip, Avinash [Wed, 18 Jan 2012 11:56:24 +0000 (17:26 +0530)]
Backlight - Brightness scale is changed.

Brightness scale is changed to 0-100, from 0-250.

Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
10 years agoBacklight - Removed backlight data related to GPIO
Philip, Avinash [Wed, 18 Jan 2012 05:42:46 +0000 (11:12 +0530)]
Backlight - Removed backlight data related to GPIO

As backlight is enabled through PWM, cleaning up the GPIO based
backlight data.

Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
10 years agousb: musb_gadget: cppi41: Use pio for interrupt transfer
Ajay Kumar Gupta [Thu, 12 Jan 2012 11:21:23 +0000 (16:51 +0530)]
usb: musb_gadget: cppi41: Use pio for interrupt transfer

Use pio mode for interrupt transfer of size <= 64 byte. We have seen
TxFiFoEmpty workqueue going into infinite loop when a CDC device is
connected to another EVM

10 years agoarm:omap:pwmss - hwmod data corrected.
Philip, Avinash [Wed, 28 Dec 2011 05:23:36 +0000 (10:53 +0530)]
arm:omap:pwmss - hwmod data corrected.

HW_MOD data updated for PWMSS

Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
10 years agoarm:omap:elm - hwmod data is corrected
Philip, Avinash [Mon, 16 Jan 2012 07:37:03 +0000 (13:07 +0530)]
arm:omap:elm - hwmod data is corrected

sysconf register details are corrected.

Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
10 years agopwm-backlight - Enabled in am335x config file
Philip, Avinash [Thu, 12 Jan 2012 11:34:58 +0000 (17:04 +0530)]
pwm-backlight - Enabled in am335x config file

PWM backlight is enabled in am335x defconfig

Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
10 years agoarm:omap:pwm - LCD backlight enabled through PWM.
Philip, Avinash [Mon, 29 Aug 2011 09:03:17 +0000 (14:33 +0530)]
arm:omap:pwm - LCD backlight enabled through PWM.

LCD backlight is provided by PWM signal generated by eCAP. So backlight
brightness can control by changing duty cycle of PWM signal.

Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
10 years agoBacklight: Modify the backlight interface
Natarajan Sugumar [Thu, 3 Feb 2011 08:59:13 +0000 (14:29 +0530)]
Backlight: Modify the backlight interface

With the introduction of new PWM Framework, access to any PWM driver
should be done through the Framework. So, Modify the Backlight Interface
to use the PWM Framework APIs.

Signed-off-by: Natarajan Sugumar <sugumar@ti.com>
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
10 years agoarm:omap:pwm - Platform support for PWMSS
Philip, Avinash [Wed, 28 Dec 2011 11:10:14 +0000 (16:40 +0530)]
arm:omap:pwm - Platform support for PWMSS

AM335x SOC is having 3 instances of PWMSS, each will be having single
module instances of ePWM, eCAP & eQEP. This patch adds platform support
for ePWM & eCAP modules. Initializes the semaphore for common
configuration space access protection.
Time base module clock enabled for EHRPWM.

Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
10 years agoarm:omap:am33xx - enabled PWM in defconfig
Philip, Avinash [Fri, 6 Jan 2012 09:01:03 +0000 (14:31 +0530)]
arm:omap:am33xx - enabled PWM in defconfig

eHRPWM and eCAP enabled in am335x config file.

Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
10 years agoarm:omap:pwm - eCAP & ePWM driver in AM335X
Philip, Avinash [Mon, 20 Jun 2011 12:21:49 +0000 (17:51 +0530)]
arm:omap:pwm - eCAP & ePWM driver in AM335X

Unline with DA850, where each PWM module has individual clock,
AM335x SOC will be having common clock for ePWM, eCAP & eQEP which comes
under PWMSS instances. Clock gating is happening at configuration space
in PWMSS.
This patch modified eCAP & ePWM driver to support AM335X SOC as follows
1. Updated the clk_get() arguments to access common functional clock in
accordance with platform device id.
2. In AM335X SOC, PWMSS has a common config space for eCAP, ePWM & eQEP.
The clock gating to individual module has done from common config
space.So each module drivers should be able to access the common
configuration space independently. This patch provides a method to
access this common configuration space across each modules
independently. This method involves remapping the common config space
only on the first module in PWMSS. All the other modules in PWMSS uses
this remapped address to access the common configuration space. Clock
gating can be controlled on this common configuration space from
respective module. Protection mechanism is provided by
semaphore. Configuratin space unmapping is happening when the last
module is removed.
3. Config file support added for AM33XX_SOC

Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
10 years agopwm: - Platform data is placed in common position
Philip, Avinash [Mon, 9 Jan 2012 05:37:12 +0000 (11:07 +0530)]
pwm: - Platform data is placed in common position

Platform_driver_data  for eHRPWM module is put to common place to access
the structure irrespective of architecture.

Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
10 years agoeCAP:PWM: Add device driver support for eCAP module
Natarajan Sugumar [Wed, 9 Feb 2011 11:20:23 +0000 (16:50 +0530)]
eCAP:PWM: Add device driver support for eCAP module

OMAPL138/DA850 contains three instances of eCAP module.
Each eCAP module has one dedicated pin that can be used either
in capture mode(input) or in PWM mode.
This patch adds eCAP driver support for PWM signal generation.

Signed-off-by: Natarajan Sugumar <sugumar@ti.com>
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
10 years agoeHRPWM: Add device driver support for ehrpwm module
Natarajan Sugumar [Fri, 21 Jan 2011 04:57:04 +0000 (10:27 +0530)]
eHRPWM: Add device driver support for ehrpwm module

eHRPWM module can be used to generate wide range of complex
PWM waveforms. Apart from conventional PWM generation, eHRPWM
module supports advanced features such as Trip Zone and Dead Band.
This patch adds device driver support for eHRPWM module.

Signed-off-by: Natarajan Sugumar <sugumar@ti.com>
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
10 years agoPWM: Add cpu frequency transition support for PWM devices
Philip, Avinash [Mon, 16 Jan 2012 06:11:40 +0000 (11:41 +0530)]
PWM: Add cpu frequency transition support for PWM devices

Implement a generic frequency transition callback for PWM
devices. Generic PWM framework notifies all the PWM devices
currently being used about the frequency transition.

Signed-off-by: Natarajan Sugumar <sugumar@ti.com>
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
10 years agoPWM: Add helper APIs and sysfs entries to the PWM Frame Work
Natarajan Sugumar [Wed, 2 Mar 2011 08:24:50 +0000 (13:54 +0530)]
PWM: Add helper APIs and sysfs entries to the PWM Frame Work

1. Add pwm_duty_percent and pwm_frequency attributes to the SYSFS interface
of the PWM Framework. Since, PWM waveform is characterized mainly by
percent duty and the frequency, it is pretty much useful to have these
attributes.
2. Also, period_ns and duty_ns variables have been added to
the pwm_device structure as it might be needed by the PWM driver
functions.

Signed-off-by: Natarajan Sugumar <sugumar@ti.com>
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
10 years agoPWM: Implement a generic PWM framework
Bill Gatliff [Tue, 8 Feb 2011 06:44:09 +0000 (12:14 +0530)]
PWM: Implement a generic PWM framework

Updates the existing PWM-related functions to support multiple and/or
hotplugged PWM devices, and adds a sysfs interface.
spin_lock protection added.

Signed-off-by: Bill Gatliff <bgat@billgatliff.com>
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
10 years agoarm:omap:am335x : update MCASP hwmod data
Hebbar, Gururaja [Fri, 13 Jan 2012 14:10:41 +0000 (19:40 +0530)]
arm:omap:am335x : update MCASP hwmod data

This adds update existing mcasp0 data & adds missing mcasp1 hwmod data

Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
10 years agoarm:omap:am335x: correct TPCC hwmod data
Hebbar, Gururaja [Fri, 13 Jan 2012 13:09:05 +0000 (18:39 +0530)]
arm:omap:am335x: correct TPCC hwmod data

This patch adds missing TPTC hwmod data like addr space, 1 mpu irq, etc

Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
10 years agoupdate lpj only if frequency has changed
Afzal Mohammed [Wed, 4 Jan 2012 05:22:46 +0000 (10:52 +0530)]
update lpj only if frequency has changed

During scaling up of cpu frequency, loops_per_jiffy
is updated upon invoking PRECHANGE notifier.
If setting to new frequency fails in cpufreq driver,
lpj is left at incorrect value.

Hence update lpj only if cpu frequency is changed,
i.e. upon invoking POSTCHANGE notifier.

Penalty would be that during time period between
changing cpu frequency & invocation of POSTCHANGE
notifier, udelay(x) may not gurantee minimal delay
of 'x' us for frequency scaling up operation.

Perhaps a better solution would be to define
CPUFREQ_ABORTCHANGE & handle accordingly, but then
it would be more intrusive (using ABORTCHANGE may
help drivers also; if any has registered notifier
and expect POST for a PRECHANGE, their needs can
be taken care using ABORT)

Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Dave Jones <davej@redhat.com>
10 years agocpufreq:userspace: fix cpu_cur_freq updation
Afzal Mohammed [Wed, 4 Jan 2012 05:22:31 +0000 (10:52 +0530)]
cpufreq:userspace: fix cpu_cur_freq updation

CPU frequency is guranteed to be changed on notifier callback with
CPUFREQ_POSTCHANGE. Notifier callback with CPUFREQ_PRECHANGE does
not gurantee a change in frequency; after it, if cpufreq driver is
unable to change CPU to new frequency. This results in wrong
information being fed to user (if setting CPU frequency fails)
upon doing like,

cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_setspeed

Hence in userspace governer update cpu_cur_freq only if notifier
has been called with POSTCHANGE.

Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Dave Jones <davej@redhat.com>
10 years agoregulator: TPS65910: VDD1 error handling
Afzal Mohammed [Thu, 12 Jan 2012 05:17:36 +0000 (10:47 +0530)]
regulator: TPS65910: VDD1 error handling

Proper error handling w.r.t I2C transactions
for setting & getting voltage for VDD1

Signed-off-by: Afzal Mohammed <afzal@ti.com>
10 years agoarm:omap:am33xx: Enable TPS65910 regulator
Afzal Mohammed [Tue, 3 Jan 2012 09:57:21 +0000 (15:27 +0530)]
arm:omap:am33xx: Enable TPS65910 regulator

Enable TPS65910 regulator

Signed-off-by: Afzal Mohammed <afzal@ti.com>
10 years agoarm:omap:am33xx: enable cpufreq
Afzal Mohammed [Mon, 2 Jan 2012 13:33:46 +0000 (19:03 +0530)]
arm:omap:am33xx: enable cpufreq

Enable cpufreq by default, also select ondemand and
user space governer, with userspace as default

Signed-off-by: Afzal Mohammed <afzal@ti.com>
10 years agoarm:omap:am33xx: dpll mpu clock config helpers
Afzal Mohammed [Thu, 29 Dec 2011 09:48:23 +0000 (15:18 +0530)]
arm:omap:am33xx: dpll mpu clock config helpers

Add set_rate & round_rate for MPU PLL, this is
required to configure MPU PLL for CPUFREQ

Signed-off-by: Afzal Mohammed <afzal@ti.com>
10 years agoarm:omap:am33xx: MPU regulator
Afzal Mohammed [Tue, 29 Nov 2011 04:56:21 +0000 (10:26 +0530)]
arm:omap:am33xx: MPU regulator

TPS65910 VDD1 SMPS is connected to MPU.
Add dummy entries for other regulators.

TODO: Replace dummy regulator entries
 with proper ones as required.

Signed-off-by: Afzal Mohammed <afzal@ti.com>
10 years agoarm:omap:am33xx: OPP table
Afzal Mohammed [Tue, 29 Nov 2011 10:41:10 +0000 (16:11 +0530)]
arm:omap:am33xx: OPP table

OPP table for MPU voltage domain

Signed-off-by: Afzal Mohammed <afzal@ti.com>
10 years agocpufreq: OMAP: am33xx support
Afzal Mohammed [Mon, 2 Jan 2012 12:17:31 +0000 (17:47 +0530)]
cpufreq: OMAP: am33xx support

am33xx mpu pll clock name is "dpll_mpu_ck",
same as that of omap44xx()

Signed-off-by: Afzal Mohammed <afzal@ti.com>
10 years agocpufreq: OMAP: voltage scaling
Afzal Mohammed [Thu, 29 Dec 2011 07:58:23 +0000 (13:28 +0530)]
cpufreq: OMAP: voltage scaling

DVFS capability added, voltage scaled as per the
OPP for new frequency. Increase voltage first for
going to higher OPP, and decrease frequency first
for transition to lower OPP.

If regulator is not found, fail cpufreq init.

Signed-off-by: Afzal Mohammed <afzal@ti.com>
10 years agoarm:omap:am33xx : update TSC hwmod data
Patil, Rachna [Fri, 13 Jan 2012 07:03:07 +0000 (12:33 +0530)]
arm:omap:am33xx : update TSC hwmod data

This patch adds missing fields of hwmod data for TSC

Signed-off-by: Patil, Rachna <rachna@ti.com>
10 years agoarm:omap:gpio - Handle Clocks properly in Suspend/Resume
Hebbar, Gururaja [Thu, 12 Jan 2012 16:20:58 +0000 (21:50 +0530)]
arm:omap:gpio - Handle Clocks properly in Suspend/Resume

Clocks were not enabled/disabled during suspend-resume. This patch
corrects the same.

Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
10 years agoarm:omap:gpio - add proper #if check for am335x
Hebbar, Gururaja [Thu, 12 Jan 2012 16:18:25 +0000 (21:48 +0530)]
arm:omap:gpio - add proper #if check for am335x

few #if check for am335x were missing. This patch adds the same.

Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
10 years agoarm:omap:am33xx : correct gpio hwmod data
Hebbar, Gururaja [Tue, 10 Jan 2012 13:44:05 +0000 (19:14 +0530)]
arm:omap:am33xx : correct gpio hwmod data

GPIO IP in am335x doesnt support Wakeup. Also, fix incorrect prcm
clock entries for GPIO 2 & 3.

Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
10 years agoarm:omap:hsmmc - remove invalid bus power setting
Hebbar, Gururaja [Tue, 10 Jan 2012 12:54:46 +0000 (18:24 +0530)]
arm:omap:hsmmc - remove invalid bus power setting

SD bus Power was setup at a wrong sequence inside irq code. This Commit
removes the same.

Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
10 years agoarm:omap:edma - replace edm_info with more relevant edma_cc
Hebbar, Gururaja [Mon, 9 Jan 2012 09:23:52 +0000 (14:53 +0530)]
arm:omap:edma - replace edm_info with more relevant edma_cc

Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
10 years agoARM: edma: use kzalloc()
Thomas Meyer [Sat, 6 Aug 2011 11:26:13 +0000 (13:26 +0200)]
ARM: edma: use kzalloc()

 Use kzalloc rather than kmalloc followed by memset with 0

 This considers some simple cases that are common and easy to validate
 Note in particular that there are no ...s in the rule, so all of the
 matched code has to be contiguous

 The semantic patch that makes this output is available
 in scripts/coccinelle/api/alloc/kzalloc-simple.cocci.

 More information about semantic patching is available at
 http://coccinelle.lip6.fr/

Signed-off-by: Thomas Meyer <thomas@m3y3r.de>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
10 years agoarm: edma: check irq2ctlr() result
Kulikov Vasiliy [Sat, 17 Jul 2010 15:19:07 +0000 (19:19 +0400)]
arm: edma: check irq2ctlr() result

If irq2ctlr() fails return IRQ_NONE.
Also as it can fail make 'ctlr' signed.

The semantic patch that finds this problem (many false-positive results):
(http://coccinelle.lip6.fr/)

// <smpl>
@ r1 @
identifier f;
@@
int f(...) { ... }

@@
identifier r1.f;
type T;
unsigned T x;
@@

*x = f(...)
 ...
*x > 0

Signed-off-by: Kulikov Vasiliy <segooon@gmail.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
10 years agoarm: edma: use BIT() wherever possible
Sekhar Nori [Mon, 10 May 2010 07:11:18 +0000 (12:41 +0530)]
arm: edma: use BIT() wherever possible

This patch replaces occurences of (1 << x) with
BIT(x) as it makes for much better reading.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
10 years agoarm: edma: fix coding style issue related to usage of braces
Sekhar Nori [Tue, 4 May 2010 08:41:36 +0000 (14:11 +0530)]
arm: edma: fix coding style issue related to usage of braces

In the edma driver, there are couple of instances where braces
are used for a single statement 'if' construct.

There are other instances where 'else' part of the if-else construct
does not use braces even if the 'if' part is a multi-line statement.

This patch fixes both.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
10 years agoarm: edma: use a more intuitive name for edma_info
Sekhar Nori [Tue, 4 May 2010 08:41:35 +0000 (14:11 +0530)]
arm: edma: use a more intuitive name for edma_info

'edma_info' structure inside the edma driver represents
a single instance of edma channel controller. Call it
'edma_cc' instead. This also avoids readers confusing
it with an instance of edma_soc_info structre which
carries the platform data for a single channel controller
instance.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
10 years agoarm: am33xx: Add CPSW MII mac select support
Chandan Nath [Wed, 11 Jan 2012 12:05:47 +0000 (17:35 +0530)]
arm: am33xx: Add CPSW MII mac select support

This patch fixes missing configuration for MII interface
configuration in device control register. MII mode selection
should be done depending up on the board/phy type.
This was missing in linux, however without this also it was
working as it was configured in uboot. This is required in
linux also in order to remove any dependency on uboot.

Signed-off-by: Chandan Nath <chandan.nath@ti.com>
10 years agoarm:omap:nand - Add support for suspend/resume
Philip, Avinash [Tue, 10 Jan 2012 11:42:50 +0000 (17:12 +0530)]
arm:omap:nand - Add support for suspend/resume

suspend/resume entry  points added in NAND driver by disabling/enabling
the clocks for NAND controller and ELM module.
controller clock  member is added to omap_nand_info and
omap_nand_platform_data structure.
On suspend waiting for ongoing mtd operation to finish on
mtd->suspend().

Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
10 years agousb: musb: ti81xx: auto vbus control across host and device mode
Ajay Kumar Gupta [Thu, 22 Dec 2011 10:32:59 +0000 (16:02 +0530)]
usb: musb: ti81xx: auto vbus control across host and device mode

Automatically control vbus using timer. Set the session bit periodically in a timer
context when nothing is connected to usb port. If mini-A is connected then Vbus will
get switched on and if mini-B is connected then Vbus will nto be driven.

Kill the timer when a device is attached in host mode or port is connected to external
host and revive the timer as soon as disconnect happens.

Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
10 years agousb: musb: ti81xx: allow board file to set usb mode for each port
Ajay Kumar Gupta [Thu, 22 Dec 2011 06:41:47 +0000 (12:11 +0530)]
usb: musb: ti81xx: allow board file to set usb mode for each port

Used existing .mode field of board_data for setting usb mode for both
usb ports. usb0 mode is taken from board_mode[0:3] and usb1 mode is
from board_mode[4:7] bits. As mode can take values only from 0 to 3
so this is safe.

This board mode is later used and corretly set in each port's musb
platform_data's mode.

Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
10 years agousb: musb: bring back if_h/p/o_enabled()
Ajay Kumar Gupta [Tue, 13 Dec 2011 05:08:28 +0000 (10:38 +0530)]
usb: musb: bring back if_h/p/o_enabled()

musb driver now has only OTG mode to build for and all #ifdefferies for HOST
,PERIPHERAL and OTG have been cleaned up.

Bringing back the if_host/peripheral/otg_enabled() at all #ifdef places to make
the driver work for host or peripheral only based on board_mode.

Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
10 years agousb: musb: cleanup the phy programming
Ajay Kumar Gupta [Tue, 3 Jan 2012 05:35:04 +0000 (11:05 +0530)]
usb: musb: cleanup the phy programming

Currently the phy_power is only done for one port and so add id field so that the
same function can be used for both ports.

Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
10 years agovideo: da8xx-fb: Follow reset sequence specified in specification
Manjunathappa, Prakash [Tue, 10 Jan 2012 11:41:29 +0000 (17:11 +0530)]
video: da8xx-fb: Follow reset sequence specified in specification

Follow below specified disable and reset sequence specified in
functional specification:
Steps for disabling the raster:
1)clear raster enable bit of raster control register.
2)Wait for interrupt done.
3)Set the software reset bit high.

Steps for enabling the raster:
1)Set the software reset back to low.
2)Set raster enable bit back to high.

Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com>
10 years agoarm: am33xx: add GPIO backlight control hookup to LCD FB driver
Manjunathappa, Prakash [Tue, 10 Jan 2012 11:08:10 +0000 (16:38 +0530)]
arm: am33xx: add GPIO backlight control hookup to LCD FB driver

Patch adds hookup to toggle GPIO backlight from da8xx-fb LCD frame
buffer driver.

Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com>
10 years agovideo: da8xx-fb: Interface clock cleanup
Manjunathappa, Prakash [Tue, 10 Jan 2012 11:03:56 +0000 (16:33 +0530)]
video: da8xx-fb: Interface clock cleanup

Patch does interface clock cleanup in driver suspend and remove
callbacks.

Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com>
10 years agoinput: TSC: Add support for suspend/resume
Patil, Rachna [Tue, 10 Jan 2012 11:08:52 +0000 (16:38 +0530)]
input: TSC: Add support for suspend/resume

This patch adds support for suspend and resume
in touchscreen ti_tscadc

Signed-off-by: Patil, Rachna <rachna@ti.com>
10 years agoARM: OMAP: PRCM: Don't register PRCM chain handler for AM33XX
Vaibhav Bedia [Mon, 9 Jan 2012 04:46:20 +0000 (10:16 +0530)]
ARM: OMAP: PRCM: Don't register PRCM chain handler for AM33XX

AM33XX does not support PRCM interrupts for IO/WKUP events.
Since the current PRCM chain handler expects only these two
events, don't register it for AM33XX.

We might revisit this once the PRCM chain handler code is
enhanced to take care of other events like DPLL needing to be
recalibrated.

Note: This fixes the following crash in USB during kernel boot

[    2.131963] Unhandled fault: external abort on non-linefetch
(0x1008) at 0xc880a460
[    2.139960] Internal error: : 1008 [#1]
[    2.143954] Modules linked in:
[    2.147143] CPU: 0    Not tainted  (3.2.0-rc6-12008-g363a774)
[    2.154057] PC is at __musb_readb+0xc/0x14
[    2.158329] LR is at otg_timer+0x2c/0x13c
...

This was due to the PRCM_IRQENABLE register for OMAP3 being at
the same offset as USB_CLKCTRL on AM33XX.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
10 years agoarm:omap:am33xx: fix for CPSW module build
Hebbar, Gururaja [Tue, 3 Jan 2012 09:32:01 +0000 (15:02 +0530)]
arm:omap:am33xx: fix for CPSW module build

module build adds _module for related config_xxx and hence checking
only for config_xxx is not sufficent. this patch adds check for
CONFIG_TLK110_WORKAROUND_MODULE also.

Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
10 years agoARM: OMAP: AM33XX: Basic suspend resume support
Vaibhav Bedia [Wed, 4 Jan 2012 09:19:03 +0000 (14:49 +0530)]
ARM: OMAP: AM33XX: Basic suspend resume support

Add support for basic suspend-resume.
Currently DeepSlee1 mode of the processor is used
as the suspend state.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
10 years agoARM: OMAP: Don't do anything in sram_init for now
Vaibhav Bedia [Tue, 3 Jan 2012 12:51:46 +0000 (18:21 +0530)]
ARM: OMAP: Don't do anything in sram_init for now

Needs to be merged with 45cd51a8e934bd996963a6de582ae43947c7ff28
(arm:omap: Add SRAM support for AM33xx)

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
10 years agoARM: OMAP: Covert to device_initcall
Vaibhav Bedia [Tue, 3 Jan 2012 12:49:01 +0000 (18:19 +0530)]
ARM: OMAP: Covert to device_initcall

The power management code for AM33XX is a late_initcall.
The PM features depend on mailbox for IPC being available.
In preparation for this, convert the mailbox init to a
device_initcall.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
10 years agocpsw: Merge cpsw modules to build as single driver
Hebbar, Gururaja [Mon, 2 Jan 2012 11:23:08 +0000 (16:53 +0530)]
cpsw: Merge cpsw modules to build as single driver

Merge 2 cpsw drivers (cpsw_ale & cpsw) as one so as to avoid module
build issues.

Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
10 years agocpsw: fix for change MAC address using ifconfig
Hebbar, Gururaja [Mon, 2 Jan 2012 10:55:32 +0000 (16:25 +0530)]
cpsw: fix for change MAC address using ifconfig

When MAC address is changed using ifconfig, driver MAC address is
not changes as pointer holding the new MAC address is not utilised.
Changed the driver code to utilize the new MAC address and change
the MAC address in driver if it is a valid MAC address.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
10 years agoarm:omap:am33xx: Don't register McBSP
Vaibhav Bedia [Mon, 2 Jan 2012 11:47:01 +0000 (17:17 +0530)]
arm:omap:am33xx: Don't register McBSP

...since AM33XX doesn't have any instance of McBSP

Note: This needs to be merged with the commit
08037c12036110c79b8fa2adf486aefaee
(arm:omap:am33xx: Don't register non-existent...)

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
10 years agoarm:omap:am33xx: Enable cpuidle in the defconfig
Vaibhav Bedia [Mon, 2 Jan 2012 11:05:16 +0000 (16:35 +0530)]
arm:omap:am33xx: Enable cpuidle in the defconfig

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
10 years agoarm:omap:am33xx: Basic cpuidle support
Vaibhav Bedia [Wed, 30 Nov 2011 16:01:47 +0000 (21:31 +0530)]
arm:omap:am33xx: Basic cpuidle support

Add basic cpuidle support for AM33XX family of SoC.
Right now only two idle states (WFI and WFI+SR) are
supported. The latency/residency numbers chosen will
be fine-tuned based on power measurements on actual
hardware.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
10 years agoarm:omap:am335x: Add cpuidle related board data
Vaibhav Bedia [Wed, 30 Nov 2011 16:05:40 +0000 (21:35 +0530)]
arm:omap:am335x: Add cpuidle related board data

Add board specific cpuidle hookup for AM335x EVM

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
10 years agoarm:omap:am33xx: Drop support for SERIAL_8250
Vaibhav Bedia [Mon, 2 Jan 2012 06:58:52 +0000 (12:28 +0530)]
arm:omap:am33xx: Drop support for SERIAL_8250

After commit 8a60585159067f110075ef8ffda13abd94826daf
(ARM: OMAP2+: UART: cleanup 8250 console driver support)
the omap-serial driver no longer depends on 8250 support.

The omap-serial driver has been the default of AM33XX
for some time now. We can now drop the support for
SERIAL_8250 from the defconfig.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
10 years agoarm:omap: Add SRAM support for AM33xx
Vaibhav Bedia [Wed, 28 Dec 2011 13:38:10 +0000 (19:08 +0530)]
arm:omap: Add SRAM support for AM33xx

Just creates a gen_pool of 64KB which points to
OCMC RAM in AM33xx. A subsequent patch will add
code for copying the suspend code to SRAM

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
10 years agoarm:omap:am33xx: Enable MBOX in defconfig
Vaibhav Bedia [Tue, 27 Dec 2011 09:25:31 +0000 (14:55 +0530)]
arm:omap:am33xx: Enable MBOX in defconfig

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
10 years agoarm:omap: Fix a bug in SRAM init code
Vaibhav Bedia [Tue, 20 Dec 2011 11:51:46 +0000 (17:21 +0530)]
arm:omap: Fix a bug in SRAM init code

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
10 years agoarm:omap:am33xx: HWMOD updates
Vaibhav Bedia [Tue, 20 Dec 2011 11:47:04 +0000 (17:17 +0530)]
arm:omap:am33xx: HWMOD updates

1. Set the no idle flags for the OCMC to avoid issues in
sram init code which does not explicitly enable the clocks
2. Add reset line info for wkup_m3 and keep the reset asserted

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>