]> Gitweb @ Texas Instruments - Open Source Git Repositories - git.TI.com/gitweb - sitara-epos/sitara-epos-kernel.git/log
sitara-epos/sitara-epos-kernel.git
11 years agoARM: OMAP2+: nand: Flag to support ELM feature on platforms.
Philip, Avinash [Wed, 22 Feb 2012 07:53:03 +0000 (13:23 +0530)]
ARM: OMAP2+: nand: Flag to support ELM feature on platforms.

This patch introduces a platform data flag to selectively enable/disable
ELM feature for NAND. On platforms where ELM support is present, this
flag needs to be set as true.

Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
11 years agoMTD: OMAP2: elm: Add ELM module support
Philip, Avinash [Mon, 20 Feb 2012 08:19:43 +0000 (13:49 +0530)]
MTD: OMAP2: elm: Add ELM module support

This patch adds
1. ELM feature support for BCH ECC error correction.
2. Configuration API support for BCH8 ECC scheme.
3. Exports symbols to support module build.

TODO:
Updating to pm_ops
Handling multiple SYNDROME Calculation and page mode support.

Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
11 years agoMTD: Fixes Coding style
Philip, Avinash [Wed, 29 Feb 2012 12:50:42 +0000 (18:20 +0530)]
MTD: Fixes Coding style

Fixes coding style Error in Makefile "\ No newline at end of file"

Signed-off-by: Philip, Evania's <avinashphilip@ti.com>
11 years agoARM: OMAP2+: nand: BCH8 support definitions
Philip, Avinash [Tue, 6 Mar 2012 05:28:30 +0000 (10:58 +0530)]
ARM: OMAP2+: nand: BCH8 support definitions

This patch adds
1. Enum variable for BCH type
2. Macro definitions to support BCH8 ECC scheme
3. Function declarations.

Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
11 years agoARM: OMAP2+: nand: Updated JFFS2 clean marker offset.
Philip, Avinash [Mon, 17 Oct 2011 06:21:25 +0000 (11:51 +0530)]
ARM: OMAP2+: nand: Updated JFFS2 clean marker offset.

JFFS2 clean marker offset used by Linux in case of 8-bit NAND device was
0x1 omap2 NAND driver. But 1st 2 bytes is used to indicate bad blocks by
manufacturers. So offset for JFFS2 clean markers is fixed to 0x2 in
omap2 NAND driver irrespective of 8/16 bit device.

Introduced new macro : JFFS2_CLEAN_MARKER_OFFSET to indicate 0x2 offset
for JFFS2 clean marker.

Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
11 years agoARM: OMAP2+: nand: Synching HAMMING ECC layout with that of U-boot.
Vaibhav Hiremath [Sat, 26 Nov 2011 20:22:47 +0000 (01:52 +0530)]
ARM: OMAP2+: nand: Synching HAMMING ECC layout with that of U-boot.

For OOb_64, offset is fixed to 40 for kernel/fs, by changing
kernel code to calculate hw_ecc layout considering these:
1) 12 bytes in case of 512 byte access and 24 bytes in case of 256 byte
access in OOB_64 can be supported.
2) Ecc bytes lie to the end of OOB area.
Introducing a new macro : MAX_HWECC_BYTES_OOB_64 which is the maximum
number of eccbytes supported for OOB_64n Hamming ECC mode.

Signed-off-by: Hrishikesh Bhandiwad <hrishikesh.b@ti.com>
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
11 years agoARM: OMAP2+: nand: Support for BCH
Philip, Avinash [Tue, 6 Mar 2012 04:57:03 +0000 (10:27 +0530)]
ARM: OMAP2+: nand: Support for BCH

Patch is derived from "omap3: nand: bch ecc support added"
available at:
http://arago-project.org/git/projects/?p=linux-omap3.git;a=commit;
f=arch/arm/mach-omap2/gpmc.c;hb=79f5ddc6

This patch has the following modification
1. Removes the BCH4 support as it is not tested.
2. Configures GPMC for BCH ECC support.
3. Adds BCH ECC layout definitions.

Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
11 years agoARM: OMAP2+: am335x: Selects HAMMING ECC scheme.
Philip, Avinash [Tue, 6 Mar 2012 04:36:26 +0000 (10:06 +0530)]
ARM: OMAP2+: am335x: Selects HAMMING ECC scheme.

Selects ECC scheme to Hamming code for NAND.

Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
11 years agoARM: OMAP2+: am335x: GPMC device registration
Philip, Avinash [Tue, 6 Mar 2012 04:06:27 +0000 (09:36 +0530)]
ARM: OMAP2+: am335x: GPMC device registration

Registers GPMC device using HWMOD API. Also provides the platform data
for the devices connected on GPMC controller, in this case NAND flash
device.

Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
11 years agoARM: OMAP2+: hwmod: Corrects GPMC HWMOD data
Philip, Avinash [Thu, 23 Feb 2012 11:06:56 +0000 (16:36 +0530)]
ARM: OMAP2+: hwmod: Corrects GPMC HWMOD data

Corrects the GPMC HWMOD data for idle mode usage.

Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
11 years agoARM: OMAP2+: gpmc: Adapt to HWMOD
Afzal Mohammed [Fri, 2 Mar 2012 06:07:33 +0000 (11:37 +0530)]
ARM: OMAP2+: gpmc: Adapt to HWMOD

Create API for platforms to adapt gpmc to HWMOD

Signed-off-by: Afzal Mohammed <afzal@ti.com>
11 years agoARM: OMAP2+: gpmc: nand support
Afzal Mohammed [Mon, 27 Feb 2012 13:52:54 +0000 (19:22 +0530)]
ARM: OMAP2+: gpmc: nand support

gpmc driver probe will check the capability of the
devices passed via platform data. Upon finding nand
device, gpmc nand initialization would be done. The
initialization function will internally create
platform device for nand.

Signed-off-by: Afzal Mohammed <afzal@ti.com>
11 years agoARM: OMAP2+: gpmc: initial driver support
Afzal Mohammed [Mon, 27 Feb 2012 13:52:54 +0000 (19:22 +0530)]
ARM: OMAP2+: gpmc: initial driver support

Migrate gpmc code to driver. Initially driver probe
has to initialize device connected to gpmc using
their respective initialization function (based on
the flag passed by platform data). At this stage
platform devices will be created by respective
device initialization function itself.

Later creating platfrom devices would be separated
from device initialization. Once this is done,
driver would be moved to mfd. Then in mfd probe
only device specific initialization would be done,
and would let mfd infrastruture to create platform
devices for the gpmc connected peripherals.

TODO:
1. Is BUG() required to be called on clk_get failure
2. Try not to limit GPMC use cases
3. Revisit GPMC driver conversion patch sequence

Signed-off-by: Afzal Mohammed <afzal@ti.com>
11 years agoARM: OMAP2+: nand: Unify initialization functions
Afzal Mohammed [Wed, 29 Feb 2012 12:41:56 +0000 (18:11 +0530)]
ARM: OMAP2+: nand: Unify initialization functions

Unify the two existing nand initialization functions

This makes gpmc migration to driver easier

From now on, platforms has to call omap_nand_init
to initialize platform nand structures, it's fields.
They have the liberty of directly updating platform
specific nand data also instead of calling it.

Signed-off-by: Afzal Mohammed <afzal@ti.com>
11 years agoARM: OMAP2+: nand: board_nand_init timing arguement
Afzal Mohammed [Wed, 29 Feb 2012 12:41:56 +0000 (18:11 +0530)]
ARM: OMAP2+: nand: board_nand_init timing arguement

Modify board_nand_init to take additional arguement,
timings for gpmc. Also rename the function to
omap_nand_init & let it return pointer to structure
of omap_nand_platform_data.

A prerequisite for combining different board nand
initialization functions.

Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
11 years agoARM: OMAP2+: nand: Acquire CS in gpmc_nand_init
Afzal Mohammed [Wed, 29 Feb 2012 12:41:56 +0000 (18:11 +0530)]
ARM: OMAP2+: nand: Acquire CS in gpmc_nand_init

Prerequisite to merging different board nand functions to one

Signed-off-by: Afzal Mohammed <afzal@ti.com>
11 years agoARM: OMAP2+: am335x: Removes NAND device registration
Philip, Avinash [Tue, 6 Mar 2012 03:59:05 +0000 (09:29 +0530)]
ARM: OMAP2+: am335x: Removes NAND device registration

Removes NAND device registration to make the way for new NAND device
registration API.

Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
11 years agoRevert "arm:omap:am335x - Selects HAMMING ECC scheme."
Philip, Avinash [Tue, 6 Mar 2012 03:57:26 +0000 (09:27 +0530)]
Revert "arm:omap:am335x - Selects HAMMING ECC scheme."

This reverts commit 1abf3aa04758ab4b061f7731392f51974c327558.

11 years agoRevert "arm:omap:nand - BCH ecc support added"
Philip, Avinash [Tue, 6 Mar 2012 03:57:09 +0000 (09:27 +0530)]
Revert "arm:omap:nand - BCH ecc support added"

This reverts commit 48a09a90588b40f671447d0e8e782fc01ff7d51c.

11 years agoRevert "arm:omap:nand - Synching HAMMING ECC layout with that of U-boot."
Philip, Avinash [Tue, 6 Mar 2012 03:56:51 +0000 (09:26 +0530)]
Revert "arm:omap:nand - Synching HAMMING ECC layout with that of U-boot."

This reverts commit b60fadc071d76154972513623cf7e784a3af1d00.

11 years agoRevert "arm:omap:nand - Updated JFFS2 clean marker offset."
Philip, Avinash [Tue, 6 Mar 2012 03:56:36 +0000 (09:26 +0530)]
Revert "arm:omap:nand - Updated JFFS2 clean marker offset."

This reverts commit e536110d5dd555a2f67131a16a111505da8280e6.

11 years agoRevert "arm:omap:nand - Fix for NAND module build support"
Philip, Avinash [Tue, 6 Mar 2012 03:56:23 +0000 (09:26 +0530)]
Revert "arm:omap:nand - Fix for NAND module build support"

This reverts commit c2e6066cd2a4b5a584541c2ae16bda779d536e4b.

11 years agoRevert "arch:arm:nand - ELM Module is added"
Philip, Avinash [Tue, 6 Mar 2012 03:55:15 +0000 (09:25 +0530)]
Revert "arch:arm:nand - ELM Module is added"

This reverts commit 9b5f5456fd3b1c2b858e429e5a10fdf01abfabf3.

11 years agoRevert "arm:omap:nand - Enable BCH8 support"
Philip, Avinash [Tue, 6 Mar 2012 03:54:56 +0000 (09:24 +0530)]
Revert "arm:omap:nand - Enable BCH8 support"

This reverts commit f6c154410ab3b0169e92274b9e983091997986ff.

11 years agoRevert "arch:arm:nand - 14 byte ECC support for BCH8"
Philip, Avinash [Tue, 6 Mar 2012 03:54:39 +0000 (09:24 +0530)]
Revert "arch:arm:nand - 14 byte ECC support for BCH8"

This reverts commit 5a03f252fe0052cc5515ab1ba722c21c6f070ac3.

11 years agoRevert "arch:arm:nand - Changing SPL and U-boot partition permission"
Philip, Avinash [Tue, 6 Mar 2012 03:54:24 +0000 (09:24 +0530)]
Revert "arch:arm:nand - Changing SPL and U-boot partition permission"

This reverts commit c5fa750b5c0de616f38719e5c8f8272768a0bff5.

11 years agoRevert "arm:omap:nand - Add support for suspend/resume"
Philip, Avinash [Tue, 6 Mar 2012 03:54:12 +0000 (09:24 +0530)]
Revert "arm:omap:nand - Add support for suspend/resume"

This reverts commit 38f1ae3d786e532574ec3a21e243a72afb54458a.

11 years agoRevert "arm:omap:am33xx - GPMC timings"
Philip, Avinash [Tue, 6 Mar 2012 03:53:57 +0000 (09:23 +0530)]
Revert "arm:omap:am33xx - GPMC timings"

This reverts commit 9c1c234986af93c8478bfcbde64ee61250b9c322.

11 years agoI2C: OMAP: correct SYSC register offset for OMAP4
Alexander Aring [Thu, 8 Dec 2011 14:43:53 +0000 (15:43 +0100)]
I2C: OMAP: correct SYSC register offset for OMAP4

Correct OMAP_I2C_SYSC_REG offset in omap4 register map.
Offset 0x20 is reserved and OMAP_I2C_SYSC_REG has 0x10 as offset.

Signed-off-by: Alexander Aring <a.aring@phytec.de>
[khilman@ti.com: minor changelog edits]
Cc: stable@vger.kernel.org
Signed-off-by: Kevin Hilman <khilman@ti.com>
11 years agoARM: OMAP: AM33XX: CAN: d_can: Add suspend resume support
AnilKumar Ch [Tue, 6 Mar 2012 15:08:00 +0000 (20:38 +0530)]
ARM: OMAP: AM33XX: CAN: d_can: Add suspend resume support

This patch adds suspend resume support to DCAN module. Adds
one flag for knowing the status of DCAN module, whether it
is opened or not.

TODO: Make dcan driver as single file instead of multiple

Signed-off-by: AnilKumar Ch <anilkumar@ti.com>
11 years agoARM: OMAP: AM33XX: CAN: d_can: fix DCAN raminit issue
AnilKumar Ch [Tue, 6 Mar 2012 13:54:35 +0000 (19:24 +0530)]
ARM: OMAP: AM33XX: CAN: d_can: fix DCAN raminit issue

This patch fixes the DCAN raminit problem

Details:
DCAN RAM initialization is not complete and clock disable
is not working as expected after doing the d_can_open().

Before this patch, implementation is like doing DCAN RAM init
first and then enabling the clocks. This was done this way
because RAM init bits are from the control module register.

Workaround:
DCAN clocks should be enable first and then DCAN ram
initialization

Signed-off-by: AnilKumar Ch <anilkumar@ti.com>
11 years agoARM: OMAP: AM33XX: CAN: d_can: Add pm runtime support
AnilKumar Ch [Tue, 6 Mar 2012 13:51:08 +0000 (19:21 +0530)]
ARM: OMAP: AM33XX: CAN: d_can: Add pm runtime support

This patch adds the pm_runtime support to DCAN driver by
replacing clock APIs with pm_runtime APIs.

This patch also cleans up the driver by removing the un-wanted
platform data/parameters

Signed-off-by: AnilKumar Ch <anilkumar@ti.com>
11 years agoARM: OMAP: AM33XX: CAN: d_can: Platform data clean-up
AnilKumar Ch [Tue, 6 Mar 2012 07:36:59 +0000 (13:06 +0530)]
ARM: OMAP: AM33XX: CAN: d_can: Platform data clean-up

This patch cleans up the d_can driver platform specific initilization
data after adding the am33xx hwmod data. Modifies the d_can clock table
entries, modified data includes dev_id and con_id

Signed-off-by: AnilKumar Ch <anilkumar@ti.com>
11 years agoARM: OMAP: AM33XX: CAN: d_can: Add hwmod data for am33xx device
AnilKumar Ch [Tue, 6 Mar 2012 07:32:19 +0000 (13:02 +0530)]
ARM: OMAP: AM33XX: CAN: d_can: Add hwmod data for am33xx device

This patch adds the hwmod data needed by the driver. By adding
DCAN base addresses, interrupt numbers for two d_can instances.

Signed-off-by: AnilKumar Ch <anilkumar@ti.com>
11 years agoARM: OMAP2+: I2C: hwmod: set flag to restore context
Hebbar, Gururaja [Tue, 6 Mar 2012 18:11:17 +0000 (23:41 +0530)]
ARM: OMAP2+: I2C: hwmod: set flag to restore context

Restore of i2c context is not done for am335x due to missing flag. This
patch adds the OMAP_I2C_FLAG_RESET_REGS_POSTIDLE in the am335x
hwmod data which activates the restore.
This also solves the problem shown below of i2c instances not resuming
correctly from suspend. (especially those not in wakeup domain)

[   42.610146] omap_i2c omap_i2c.2: XRDY IRQ while no data to send
[   43.611192] omap_i2c omap_i2c.2: controller timed out

Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
11 years agoARM: OMAP2+: HSMMC: fix the platform setup for am335x
Hebbar, Gururaja [Fri, 2 Mar 2012 08:25:47 +0000 (13:55 +0530)]
ARM: OMAP2+: HSMMC: fix the platform setup for am335x

AM335x don't have the register CONTROL_PBIAS_LITE, so we set a
noop "set_power" function for it. This was already been done
for MMC0 instance. This patch applies this to instance 1 as well.

Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
11 years agousb: musb: pm: turn on/off timers during suspend/resume
Ajay Kumar Gupta [Tue, 6 Mar 2012 13:59:52 +0000 (19:29 +0530)]
usb: musb: pm: turn on/off timers during suspend/resume

There are two timers per usb port and they need to be disabled (if active)
before suspend and reenabled after resume.

11 years agousb: musb: cppi41dma: use transparent mode for g_mass_stoarge
Ajay Kumar Gupta [Tue, 6 Mar 2012 07:51:48 +0000 (13:21 +0530)]
usb: musb: cppi41dma: use transparent mode for g_mass_stoarge

USB MSC as a device need to use transparent mode of CPPI4.1 DMA
and the same was getting done for g_file_storage. Updated it
for g_mass_storage also.

Merge to:
commit e141f0a5ab310a5d5ec9a937070577c7e5b0f4a7
musb:cppi41: use GRNDIS mode for rx-dma except file-storage gadget

11 years agoARM: OMAP3+: am33xx_clkdomain: Remove usb clkdomain entry
Vaibhav Hiremath [Mon, 5 Mar 2012 14:52:47 +0000 (20:22 +0530)]
ARM: OMAP3+: am33xx_clkdomain: Remove usb clkdomain entry

The USB peripheral doesn't have any seperate clock domain of its
own, so remove it.

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
11 years agoARM: OMAP3+: am33xx_hwmod: Correct the usb clkdm_name
Vaibhav Hiremath [Mon, 5 Mar 2012 14:27:26 +0000 (19:57 +0530)]
ARM: OMAP3+: am33xx_hwmod: Correct the usb clkdm_name

Correct the usb clock domain name to "l3s_clkdm".

The USB peripheral doesn't have any seperate clock domain of its
own, it falls under "l3s_clkdm".

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
11 years agousb: musb: ti81xx: save and restore DMA registers
Ajay Kumar Gupta [Mon, 27 Feb 2012 11:26:24 +0000 (16:56 +0530)]
usb: musb: ti81xx: save and restore DMA registers

CPPI4.1 DMA register save and restore is added in common core file
cppi41.c so that same can be used by other platforms.

Restore functions writes to scheduler control register at end after
initializing the scheduler table.

Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
11 years agousb: musb: ti81xx: add support for save and restore
Ajay Kumar Gupta [Thu, 23 Feb 2012 08:00:30 +0000 (13:30 +0530)]
usb: musb: ti81xx: add support for save and restore

Added register context save and restore to support usb pm.
TODO:
- Add save and restore for cppi dma registers

Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
11 years agousb: musb: replace __raw_read/writel by readl/write
Ajay Kumar Gupta [Fri, 2 Mar 2012 08:58:51 +0000 (14:28 +0530)]
usb: musb: replace __raw_read/writel by readl/write

Using readl and writel so that data is written to memory even on
a weakly ordered memory model of arm-v7 based platforms.

Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
11 years agousb: musb: host: release dma channels if no active io
Ajay Kumar Gupta [Fri, 2 Mar 2012 11:02:19 +0000 (16:32 +0530)]
usb: musb: host: release dma channels if no active io

Currently DMA channels are allocated and they remain allocated
even if there is no active data transfer. Added channel_release()
whenever there is no pending request.

Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
11 years agousb: musb: ti81xx: use runtime pm API for clock
Ajay Kumar Gupta [Mon, 27 Feb 2012 09:55:41 +0000 (15:25 +0530)]
usb: musb: ti81xx: use runtime pm API for clock

Also has cleanup for pm support

Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
11 years agoARM: OMAP: AM33XX: Cleanup usb hwmod
Ajay Kumar Gupta [Mon, 27 Feb 2012 09:42:34 +0000 (15:12 +0530)]
ARM: OMAP: AM33XX: Cleanup usb hwmod

Updated the hwmod data for usb pm support.
Changes:
- updated the sysc type to type2
- Added the interface and functional clock and removed opt clocks

Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
11 years agoARM: OMAP: AM335X evm: remove default initialization
Maupin, Chase [Mon, 5 Mar 2012 19:55:22 +0000 (01:25 +0530)]
ARM: OMAP: AM335X evm: remove default initialization

* Remove the code that assumes a default board during the
  seutp call.  Instead give a more descriptive error message and
  then call machine_halt to halt the boot.
* This is to prevent trying to configure and boot unknown
  hardware configurations, and instead guide users to the area
  of the kernel they will need to modify.

Signed-off-by: Chase Maupin <Chase.Maupin@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
11 years agoARM: OMAP2+: edma: use runtime PM
Hebbar, Gururaja [Thu, 23 Feb 2012 10:56:28 +0000 (16:26 +0530)]
ARM: OMAP2+: edma: use runtime PM

Convert the OMAP edma driver to use runtime PM. This will use HWMOD data
which is preferred upon regular clk_[disable/enable]

Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
11 years agoARM: OMAP2+: edma: use omap_device api for registration
Hebbar, Gururaja [Fri, 24 Feb 2012 12:25:00 +0000 (17:55 +0530)]
ARM: OMAP2+: edma: use omap_device api for registration

Convert the old-style device registration code for edma to use
omap_device.  This will allow the driver to be converted to use PM
runtime and to take advantage of the OMAP IP block management
infrastructure (hwmod, PM, etc.).

Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
11 years agoARM: OMAP2+: edma: add support for suspend/resume
Hebbar, Gururaja [Thu, 9 Feb 2012 13:18:40 +0000 (18:48 +0530)]
ARM: OMAP2+: edma: add support for suspend/resume

This patch adds suspend/resume support along with context save and
restore to edma module. All registers updated during probe, channel,
event allocation, param-set, interrupts are saved and restored.

This patch is tested on AM335x Beagle bone HS-MMC module.

TODO:
Currently all register are backed up and restored irrespective whether
there was any change from the values that was programmed or not.
This is likely to negatively impact the overall suspend/resume time.

Param-set saving can be optimized by looking at the actual usage. A
caching mechanism can be implemented and values can be cached when they
are changed. This way noting needs to be saved & restore is just a copy
from the cache.

Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
11 years agoARM: OMAP2+: edma: move edma clock setup to edma driver
Hebbar, Gururaja [Thu, 9 Feb 2012 12:55:08 +0000 (18:25 +0530)]
ARM: OMAP2+: edma: move edma clock setup to edma driver

Let edma driver handle clock setup. Earlier this was handled during
edma device registration

Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
11 years agoARM: OMAP2+: edma: correct edma HWMOD data
Hebbar, Gururaja [Fri, 10 Feb 2012 13:46:48 +0000 (19:16 +0530)]
ARM: OMAP2+: edma: correct edma HWMOD data

This patch
1. adds edma base address defines to hwmod file. Tomorrow when DT is
introduced, this file can be removed completely
2. groups edma related declarations together. Also, updates hwmod data
for tpcc/tptc instances.

Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
11 years agovideo: da8xx-fb: save and restore LCDC context on power management
Manjunathappa, Prakash [Mon, 20 Feb 2012 13:27:05 +0000 (18:57 +0530)]
video: da8xx-fb: save and restore LCDC context on power management

Save and restore register context of LCDC before suspend and after resume.

Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com>
11 years agovideo: da8xx-fb: rely on pm_runtime API for clock operations
Manjunathappa, Prakash [Mon, 20 Feb 2012 10:42:36 +0000 (16:12 +0530)]
video: da8xx-fb: rely on pm_runtime API for clock operations

Replace clk_enable/clk_disable by pm_runtime_get_sync/pm_runtime_put_sync
to enable and disable interface and functional clocks.

Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com>
11 years agoARM: OMAP2+: am33xx: Register LCD device via HWMOD data
Manjunathappa, Prakash [Thu, 16 Feb 2012 16:07:54 +0000 (21:37 +0530)]
ARM: OMAP2+: am33xx: Register LCD device via HWMOD data

Make necessary changes to register LCDC device via HWMOD data.

Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com>
11 years agoARM: OMAP3: am33xx_hwmod: Do not idle/reset debugss module
Vaibhav Hiremath [Fri, 24 Feb 2012 11:41:25 +0000 (17:11 +0530)]
ARM: OMAP3: am33xx_hwmod: Do not idle/reset debugss module

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
11 years agoARM: OMAP2+: control: Add missing defination for AM33XX_CTRL_REGADDR
Vaibhav Hiremath [Fri, 24 Feb 2012 11:24:47 +0000 (16:54 +0530)]
ARM: OMAP2+: control: Add missing defination for AM33XX_CTRL_REGADDR

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
11 years agoARM: OMAP3: am33xx_hwmod: Merge upstream changes
Vaibhav Hiremath [Fri, 24 Feb 2012 11:22:38 +0000 (16:52 +0530)]
ARM: OMAP3: am33xx_hwmod: Merge upstream changes

Based on community feedback/developement,
      - Hardcode baseaddr and irq nos.
      - Some cleanup, arrangement of code, etc...

11 years agoARM: OMAP2+: Makefile: Remove build rule for deleted files
Vaibhav Hiremath [Fri, 24 Feb 2012 11:19:25 +0000 (16:49 +0530)]
ARM: OMAP2+: Makefile: Remove build rule for deleted files

Remove the references (or build rule) for the deleted source
files, prminst, cminst, etc...

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
11 years agoARM: OMAP3: cminstam33xx: Merge upstream changes
Vaibhav Hiremath [Fri, 24 Feb 2012 11:16:07 +0000 (16:46 +0530)]
ARM: OMAP3: cminstam33xx: Merge upstream changes

Based on community feedback/developement,
      - New clock tree data, exact replica of HW clock tree.
        Used exactly naming conventions as per HW clock tree.
      - Consolidate AM33xx and OMAP4 cminst code
      - Remove cminst33xx.c & cm33xx.c files
      - Define seperate clkdm_ops for am33xx

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
11 years agoARM: OMAP3: prmam33xx: Merge upstream changes
Vaibhav Hiremath [Fri, 24 Feb 2012 11:10:11 +0000 (16:40 +0530)]
ARM: OMAP3: prmam33xx: Merge upstream changes

Based on community feedback/developement,
      - Consolidate AM33xx and OMAP4 prminst code
      - Remove prminst33xx.c & powerdomain33xx.c

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
11 years agoARM: OMAP3: voltagedomainsam33xx_data: Remove unnecessary code
Vaibhav Hiremath [Fri, 24 Feb 2012 10:31:10 +0000 (16:01 +0530)]
ARM: OMAP3: voltagedomainsam33xx_data: Remove unnecessary code

Based on community feedback, removed ".scalable = false"
initialization code from voltagedomain data.

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
11 years agoARM: OMAP: am33xx: Hook-up am33xx support to existing cm code
Vaibhav Hiremath [Tue, 14 Feb 2012 12:20:33 +0000 (17:50 +0530)]
ARM: OMAP: am33xx: Hook-up am33xx support to existing cm code

Reuse existing omap4 cminst code for am33xx device,
add separate cm base table for am33xx device and initialize
it during __init for future use.

Also, since cpu_is_omap34xx() check is true for am33xx family of
devices, we must change the order of cpu_is_xxxx check, so first
check for cpu_is_am33xx() to follow right execution path.

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
CC: Tony Lindgren <tony@atomide.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
11 years agoARM: OMAP4: cminst: Add boot time __init function for cminst
Vaibhav Hiremath [Tue, 14 Feb 2012 12:13:12 +0000 (17:43 +0530)]
ARM: OMAP4: cminst: Add boot time __init function for cminst

AM33xx CM module is closer to OMAP4 CM module, and
in order to reuse cminst api's we have to address
some of the differences like, base addresses and partitions.
Unlike OMAP4 CM, AM33xx doesn't have any partitions and
maintains only single partition.

So, in order to reuse the existing OMAP4 cminst code
for AM33xx this patch adds,

  - Boot time __init function, to initialize _cm_bases
    based on cpu_is_xxx
  - Instead of maintaining phy addr for CM partition
    in _cm_bases[] table and then changing it to virt addr,
    directly maintain respective virt addr.

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
CC: Tony Lindgren <tony@atomide.com>
Cc: Paul Walmsley <paul@pwsan.com>
11 years agoARM: OMAP: am33xx: Hook-up am33xx support to existing prm code
Vaibhav Hiremath [Sun, 8 Jan 2012 09:41:12 +0000 (15:11 +0530)]
ARM: OMAP: am33xx: Hook-up am33xx support to existing prm code

Reuse existing omap4 prminst code for am33xx device,
add separate prm base table for am33xx device and initialize
it during __init for future use.

Also, since cpu_is_omap34xx() check is true for am33xx family of
devices, we must change the order of cpu_is_xxxx check, so first
check for cpu_is_am33xx() to follow right execution path.

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
CC: Tony Lindgren <tony@atomide.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
11 years agoARM: OMAP4: prminst: Add boot time __init function for prminst
Vaibhav Hiremath [Sun, 8 Jan 2012 09:20:05 +0000 (14:50 +0530)]
ARM: OMAP4: prminst: Add boot time __init function for prminst

AM33xx PRM module is closer to OMAP4 PRM module, and
in order to reuse prminst api's we have to address
some of the differences like, base addresses and partitions.
Unlike OMAP4 PRM, AM33xx doesn't have any partitions and
maintains single partition.

So, in order to reuse the existing OMAP4 prminst code
for AM33xx this patch adds,

  - Boot time __init function, to initialize _prm_bases
    based on cpu_is_xxx
  - Instead of maintaining phy addr for PRM partition
    in _prm_bases[] table and then changing it to virt addr,
    directly maintain respective virt addr.

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
CC: Tony Lindgren <tony@atomide.com>
11 years agoARM: OMAP4: Remove hardcoded reg-offs for PWRSTCTRL & PWRSTST
Vaibhav Hiremath [Sun, 8 Jan 2012 09:08:46 +0000 (14:38 +0530)]
ARM: OMAP4: Remove hardcoded reg-offs for PWRSTCTRL & PWRSTST

This patch removes the existing hard-coded way of providing
offset to omap4_prminst_xxx API's and instead use offsets
provided in powerdomainsxxxx_data.

Very much required for the new device AM33XX, where,

PRM module in AM33XX is closer to OMAP4 PRM module, so it makes
complete sense to reuse all the code from existing OMAP4 implementation.
Having said that, there is a catch here with respect to AM33XX device,

The register offset in PRM module is not consistent
across (crazy IP integration), for example,

PRM_XXX         PWRSTCTRL PWRSTST RSTCTRL RSTST
===============================================
PRM_PER_MOD:    0x0C,     0x08,   0x00,   0x04
PRM_WKUP_MOD:   0x04,     0x08,   0x00,   0x0C
PRM_MPU_MOD:    0x00,     0x04,   0x08,   NA
PRM_DEVICE_MOD: NA,       NA,     0x00,   0x08

So in order to reuse the existing OMAP4 code, we have to add
seperate entry for register offsets, especially
PWRSTCTRL & PWRSTST.

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Merge to "Remove-hardcoded-reg-offs-for-PWRSTCT"

11 years agoARM: OMAP2+: edma: clear events in edma_start()
Hebbar, Gururaja [Thu, 9 Feb 2012 12:21:17 +0000 (17:51 +0530)]
ARM: OMAP2+: edma: clear events in edma_start()

This patch fixes an issue where a DMA channel can erroneously process an
event generated by a previous transfer.  A failure case is where DMA is
being used for SPI transmit and receive channels on OMAP L138.  In this
case there is a single bit that controls all event generation from the
SPI peripheral.  Therefore it is possible that between when edma_stop()
has been called for the transmit channel on a previous transfer and
edma_start() is called for the transmit channel on a subsequent
transfer, that a transmit event has been generated.

The fix is to clear events in edma_start().  This prevents false events
from being processed when events are enabled for that channel.

Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
11 years agoARM: OMAP2+: edma: clear interrupt status for interrupt enabled channels only
Hebbar, Gururaja [Thu, 9 Feb 2012 12:15:08 +0000 (17:45 +0530)]
ARM: OMAP2+: edma: clear interrupt status for interrupt enabled channels only

Currently, the ISR in the EDMA driver clears the pending interrupt for all
channels without regard to whether that channel has a registered callback
or not.

This patch fixes the issue by making the ISR clear the interrupts only for
those channels which have interrupt enabled. The channels which are allocated
for the purpose of being polled on by the accelerator will not have a callback
function provided and so will not have IER (interrupt enable register) bits set.

Signed-off-by: Anuj Aggarwal <anuj.aggarwal@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
CC: Archith John Bency <archith@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
11 years agoARM: OMAP2+: edma: fix coding style issue related to breaking lines
Hebbar, Gururaja [Thu, 9 Feb 2012 12:10:36 +0000 (17:40 +0530)]
ARM: OMAP2+: edma: fix coding style issue related to breaking lines

In the edma driver, most of the long lines in 'if condition' are
broken after the logical operator '&&' except two instances.

This patch fixes that to bring consistency across the file.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
11 years agoARM: OMAP2+: am335x: correct McASP0 pin mux detail
Hebbar, Gururaja [Mon, 27 Feb 2012 06:26:39 +0000 (11:56 +0530)]
ARM: OMAP2+: am335x: correct McASP0 pin mux detail

McASP0 AXR3 pin mux-mode was incorrect specified in mux file. This
patch corrects the same.

Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
11 years agoARM: OMAP2+: am335x: Add method to read config data from daughter board
Shankarmurthy, Akshay [Thu, 9 Feb 2012 09:13:17 +0000 (14:43 +0530)]
ARM: OMAP2+: am335x: Add method to read config data from daughter board

Patch adds support to read config data held in daughter board eeprom
and updates the corresponding sections accordingly.

Signed-off-by: Shankarmurthy, Akshay <akshay.s@ti.com>
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
11 years agoARM: OMAP2+: am33xx: fix serial mux warnings for am33xx
Hebbar, Gururaja [Tue, 24 Jan 2012 14:15:12 +0000 (19:45 +0530)]
ARM: OMAP2+: am33xx: fix serial mux warnings for am33xx

The patch removes below warning in serial mux setup on AM335x platform

[    0.162052] _omap_mux_get_by_name: Could not find signal
uart1_cts.uart1_cts
[    0.169437] omap_hwmod_mux_init: Could not allocate device mux entry
[    0.176384] _omap_mux_get_by_name: Could not find signal
uart2_cts.uart2_cts
[    0.183735] omap_hwmod_mux_init: Could not allocate device mux entry
[    0.190663] _omap_mux_get_by_name: Could not find signal
uart3_cts_rctx.uart3_cts_rctx
[    0.198926] omap_hwmod_mux_init: Could not allocate device mux entry

Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
11 years agoinput: TSC: Add suspend/resume feature for TSC
Patil, Rachna [Wed, 1 Feb 2012 05:36:37 +0000 (11:06 +0530)]
input: TSC: Add suspend/resume feature for TSC

This patch adds support for suspend/resume feature in
touchscreen.
Since touchscreen is in wakeup domain, it can be used
to resume the system.

Signed-off-by: Patil, Rachna <rachna@ti.com>
11 years agoarm: omap: am335x:Add ick data in Hwmod for TSC
Patil, Rachna [Thu, 16 Feb 2012 11:15:13 +0000 (16:45 +0530)]
arm: omap: am335x:Add ick data in Hwmod for TSC

Add interface clock information pertaining to Touchscreen
in hwmod data.

Signed-off-by: Patil, Rachna <rachna@ti.com>
11 years agoarm: omap: am335x: Use hwmod data to register TSC
Patil, Rachna [Fri, 10 Feb 2012 10:43:13 +0000 (16:13 +0530)]
arm: omap: am335x: Use hwmod data to register TSC

Make changes to register Touchscreen as a platform device
using hwmod data API

Signed-off-by: Patil, Rachna <rachna@ti.com>
11 years agoarm:omap:am335x: Correct interrupt signal for TSC
Patil, Rachna [Fri, 10 Feb 2012 10:36:03 +0000 (16:06 +0530)]
arm:omap:am335x: Correct interrupt signal for TSC

Interrupt signal entry in HwMod data of TSC has been corrected

Signed-off-by: Patil, Rachna <rachna@ti.com>
11 years agopwm:ehrpwm - Fix duty cycle inversion eHRPWM wave.
Shankarmurthy, Akshay [Mon, 26 Dec 2011 05:44:48 +0000 (11:14 +0530)]
pwm:ehrpwm - Fix duty cycle inversion eHRPWM wave.

Patch fixes the ON and OFF period inversion in PWM wave.
Action qualifier register settings causes switching PWM wave to OFF
period when counter reaches zero and to ON period on counter reaches
compare value. Because of this inversion in duty cycle was observed.

Signed-off-by: Shankarmurthy, Akshay <akshay.s@ti.com>
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
11 years agopwm: corrects return values to handle error situation
Philip, Avinash [Mon, 6 Feb 2012 09:44:17 +0000 (15:14 +0530)]
pwm: corrects return values to handle error situation

This patch fixes
1. Proper return values for pwm framework API's.
2. Return values for SYSFS interface.

Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
11 years agopwm: fix division by zero error.
Philip, Avinash [Mon, 6 Feb 2012 09:44:17 +0000 (15:14 +0530)]
pwm: fix division by zero error.

Divisor should be checked before dividing for non-zero value. This patch
fixes the same and added debug messages.

Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
11 years agopwm: Correct the "request" SYSFS interface
Philip, Avinash [Mon, 6 Feb 2012 13:57:34 +0000 (19:27 +0530)]
pwm: Correct the "request" SYSFS interface

This patch changes handling of "request" SYSFS interface
1. Request for PWM device
from "cat request" to "echo 1 > request"
2. Release for PWM device
from "echo 1 > request" to "echo 0 > request"
3.Information on reading "request" SYSFS interface
if pwm device used, "<pwm device> is used by which <application>"
or if pwm device is free, "<pwm device> is free"

Also this patch has the fix for hanging of the system on subsequent
request/release operation after release of unused device. This is
because, release of unused device causes mutex to hold in a locked state
and further request for the mutex would hang.

Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
11 years agousb: defconfig: enable file_storage gadget as module
Ajay Kumar Gupta [Tue, 7 Feb 2012 11:14:52 +0000 (16:44 +0530)]
usb: defconfig: enable file_storage gadget as module

Enabled file stoarge gadget also as seeing lot of instability with
mass storage gadget.

11 years agousb: musb: Let PIO option visible in menuconfig
Ajay Kumar Gupta [Mon, 6 Feb 2012 09:27:19 +0000 (14:57 +0530)]
usb: musb: Let PIO option visible in menuconfig

PIO option is not visible while selecting modules. Fixing the same.

11 years agousb: musb: cppi41: fall back to pio for interrupt based transfers
Ajay Kumar Gupta [Fri, 3 Feb 2012 10:11:39 +0000 (15:41 +0530)]
usb: musb: cppi41: fall back to pio for interrupt based transfers

System hang is observed as Tx FIFO is never empty for interrupt based transfer
and so system goes into loop checking for txFifo empty.

Fixing by using pio for such transfer where length is less than 128 bytes

11 years agoRevert "usb: musb_gadget: cppi41: Use pio for interrupt transfer"
Ajay Kumar Gupta [Tue, 31 Jan 2012 12:14:12 +0000 (17:44 +0530)]
Revert "usb: musb_gadget: cppi41: Use pio for interrupt transfer"

This reverts commit fe055e40c74fb24d8d86aae49b0f9a15a25f388b.

This patch is breaking RNDIS ping test with XP PC.

11 years agoarm:omap:am33xx: Register SGX device
Afzal Mohammed [Mon, 12 Dec 2011 09:40:12 +0000 (15:10 +0530)]
arm:omap:am33xx: Register SGX device

If SGX is enabled in hardware (information obtained from
device feature register) register SGX platform device.

Signed-off-by: Afzal Mohammed <afzal@ti.com>
11 years agoarm:omap:am33xx: Check device features
Afzal Mohammed [Wed, 7 Dec 2011 11:35:43 +0000 (17:05 +0530)]
arm:omap:am33xx: Check device features

Read device feature register and record features
on SOC. Currently only SGX is checked.

Signed-off-by: Afzal Mohammed <afzal@ti.com>
11 years agoARM: OMAP: AM33XX: Keep the CLKDIV32K module enabled
Vaibhav Bedia [Thu, 2 Feb 2012 08:50:08 +0000 (14:20 +0530)]
ARM: OMAP: AM33XX: Keep the CLKDIV32K module enabled

One of the 32K clocks for the RTCSS is obtained from
CLKDIV32K module. Till the dependencies are fully sorted
out in the clock tree keep this module enabled.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
11 years agoarm: omap: am33xx: update TSC hwmod data
Patil, Rachna [Mon, 23 Jan 2012 11:26:59 +0000 (16:56 +0530)]
arm: omap: am33xx: update TSC hwmod data

Sysconfig register bits are updated for TSC
hwmod. TSC supports idle mode at bit position 2&3,
hence following omap4 IP's.

Signed-off-by: Patil, Rachna <rachna@ti.com>
11 years agoarm:omap:am33xx : register i2c2 for beaglebone
Hebbar, Gururaja [Tue, 31 Jan 2012 03:43:38 +0000 (09:13 +0530)]
arm:omap:am33xx : register i2c2 for beaglebone

Beaglebone uses i2c2 to detect expansion cards. This patch registers
i2c2 device along with setting up pin-muxes

Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
11 years agoarm:omap:am33xx - add i2c2 hwmod data
Hebbar, Gururaja [Tue, 31 Jan 2012 03:35:25 +0000 (09:05 +0530)]
arm:omap:am33xx - add i2c2 hwmod data

i2c2 buss is used in beaglebone board. Add necessary i2c2 hwmod data

Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
11 years agoarm:omap:am33xx - add missing i2c pin mus details
Hebbar, Gururaja [Tue, 31 Jan 2012 03:25:52 +0000 (08:55 +0530)]
arm:omap:am33xx - add missing i2c pin mus details

Add all references to i2c pins in mux file. These pins may be used in
different board configurations.

Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
11 years agoPWM:eCAP: Reconfigure only if frequency has changed
Afzal Mohammed [Wed, 25 Jan 2012 15:28:06 +0000 (20:58 +0530)]
PWM:eCAP: Reconfigure only if frequency has changed

PWM needs to be reconfigured during cpufreq transition
only if input clock frequency has changed. Change notifier
accrodingly.

This prevents flickering during cpufreq transitions. It is
suspected that as PWM frequency is set to a low value,
reconfiguring PWM is causing flicker observable to naked
eye. Irrespective of this fact, this change removes
unnecessary reconfiguration of PWM.

Signed-off-by: Afzal Mohammed <afzal@ti.com>
11 years agoarm: omap: am335x: corrected mmc1 pin mux naming
Patil, Rachna [Wed, 25 Jan 2012 06:44:32 +0000 (12:14 +0530)]
arm: omap: am335x: corrected mmc1 pin mux naming

Signed-off-by: Patil, Rachna <rachna@ti.com>
11 years agoarm:omap:am335x:remove duplicated code in mux file
Patil, Rachna [Wed, 25 Jan 2012 06:20:01 +0000 (11:50 +0530)]
arm:omap:am335x:remove duplicated code in mux file

GPMC_CLK was declared twice, corrected the same

Signed-off-by: Patil, Rachna <rachna@ti.com>
11 years agoarm: omap: am335x: Add gpio entries in mux file
Patil, Rachna [Wed, 25 Jan 2012 06:00:38 +0000 (11:30 +0530)]
arm: omap: am335x: Add gpio entries in mux file

This pacth adds gpio in mode7 for all
the mux entries of am335x

Signed-off-by: Patil, Rachna <rachna@ti.com>
11 years agoarm:omap:am33xx - drive Haptics motor using eHRPWM's sysfs interface.
Philip, Avinash [Tue, 24 Jan 2012 13:33:04 +0000 (19:03 +0530)]
arm:omap:am33xx - drive Haptics motor using eHRPWM's sysfs interface.

Since Haptics doesn't have its own driver(yet), currently Haptics can
be tested using eHRPWM's sysfs interface.

This patch adds support for driving Haptics motor connected to
eHRPWM Instance 2 channel 2.

According to datasheet, the Haptic Motors Max RPM is 15000 RPM. Driving
the Motor above MAX RPM may spoil the Motor.
This patch limits the eHRPWM max freq to 250Hz. This can be changed
from platform data.

Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
11 years agoam335x: regulator: tps65217 fix for BeagleBone A3 and greater
AnilKumar Ch [Mon, 2 Jan 2012 09:14:20 +0000 (14:59 +0545)]
am335x: regulator: tps65217 fix for BeagleBone A3 and greater

This patch fixes the problem that tps65217B regulator support
is applicable only for BeagleBone A3 and greater. And tps65217B
regulator is not applicable for the BeagleBone's whose revision
verion is < A3

Signed-off-by: AnilKumar Ch <anilkumar@ti.com>
11 years agoARM: OMAP: AM33XX: Disable self-refresh upon resume
Vaibhav Bedia [Tue, 24 Jan 2012 11:45:38 +0000 (17:15 +0530)]
ARM: OMAP: AM33XX: Disable self-refresh upon resume

During suspend, we put the SDRAM in self-refresh mode.
If we don't clear this mode in the resume path SDRAM
can automatically enter self-refresh when the CPU is idle.

While this looks to be right behavior, this causes flickers
on the LCD specifically on ICS. So, when coming out of
suspend disable self-refresh mode.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
11 years agovideo:da8xx: Reverting patch to use dma_alloc_coherent instead
Manjunathappa, Prakash [Tue, 24 Jan 2012 07:25:18 +0000 (12:55 +0530)]
video:da8xx: Reverting patch to use dma_alloc_coherent instead
get_free_pages

Reverting "video:da8xx: Replace dma_alloc_coherent tp get_free_pages
(f482ac5b63e0fc84c546cb463e4dea5e02682516)" as SGX model fails do alloc
of DMA memory using get_free_pages. This patch is dependent on "AM335x:
Add option to configure CONSISTENT_DMA_SIZE" patch to increase
CONSISTENT_DMA_SIZE for successful allocation of memory >2MB.

Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com>