]> Gitweb @ Texas Instruments - Open Source Git Repositories - git.TI.com/gitweb - sitara-epos/sitara-epos-uboot.git/commitdiff
usb: ehci-mx5: Use 'bool' instead of 'unsigned char'
authorFabio Estevam <fabio.estevam@freescale.com>
Fri, 26 Jul 2013 16:54:28 +0000 (13:54 -0300)
committerMarek Vasut <marex@denx.de>
Mon, 26 Aug 2013 19:56:34 +0000 (21:56 +0200)
The 'enable' argument can be better expressed as boolean.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Otavio Salvador <otavio@ossystems.com.br>
arch/arm/cpu/armv7/mx5/clock.c
arch/arm/include/asm/arch-mx5/clock.h
drivers/usb/host/ehci-mx5.c

index fbbb365cb600942e9a8d7ff095b135c48dfd7345..6bef2544564a6e2924ee11426432453f623e0baf 100644 (file)
@@ -85,7 +85,7 @@ void set_usboh3_clk(void)
                        MXC_CCM_CSCDR1_USBOH3_CLK_PODF(1));
 }
 
-void enable_usboh3_clk(unsigned char enable)
+void enable_usboh3_clk(bool enable)
 {
        unsigned int cg = enable ? MXC_CCM_CCGR_CG_ON : MXC_CCM_CCGR_CG_OFF;
 
@@ -122,7 +122,7 @@ void set_usb_phy_clk(void)
 }
 
 #if defined(CONFIG_MX51)
-void enable_usb_phy1_clk(unsigned char enable)
+void enable_usb_phy1_clk(bool enable)
 {
        unsigned int cg = enable ? MXC_CCM_CCGR_CG_ON : MXC_CCM_CCGR_CG_OFF;
 
@@ -131,12 +131,12 @@ void enable_usb_phy1_clk(unsigned char enable)
                        MXC_CCM_CCGR2_USB_PHY(cg));
 }
 
-void enable_usb_phy2_clk(unsigned char enable)
+void enable_usb_phy2_clk(bool enable)
 {
        /* i.MX51 has a single USB PHY clock, so do nothing here. */
 }
 #elif defined(CONFIG_MX53)
-void enable_usb_phy1_clk(unsigned char enable)
+void enable_usb_phy1_clk(bool enable)
 {
        unsigned int cg = enable ? MXC_CCM_CCGR_CG_ON : MXC_CCM_CCGR_CG_OFF;
 
@@ -145,7 +145,7 @@ void enable_usb_phy1_clk(unsigned char enable)
                        MXC_CCM_CCGR4_USB_PHY1(cg));
 }
 
-void enable_usb_phy2_clk(unsigned char enable)
+void enable_usb_phy2_clk(bool enable)
 {
        unsigned int cg = enable ? MXC_CCM_CCGR_CG_ON : MXC_CCM_CCGR_CG_OFF;
 
index 406d150ae2ce7eebe8249d9f51ad9dab2adc057f..9ee79aede38a13c112f3af639a541806d5d123d9 100644 (file)
@@ -46,10 +46,10 @@ u32 imx_get_fecclk(void);
 unsigned int mxc_get_clock(enum mxc_clock clk);
 int mxc_set_clock(u32 ref, u32 freq, u32 clk_type);
 void set_usb_phy_clk(void);
-void enable_usb_phy1_clk(unsigned char enable);
-void enable_usb_phy2_clk(unsigned char enable);
+void enable_usb_phy1_clk(bool enable);
+void enable_usb_phy2_clk(bool enable);
 void set_usboh3_clk(void);
-void enable_usboh3_clk(unsigned char enable);
+void enable_usboh3_clk(bool enable);
 void mxc_set_sata_internal_clock(void);
 int enable_i2c_clk(unsigned char enable, unsigned i2c_num);
 void enable_nfc_clk(unsigned char enable);
index a397d2409fd91816dc85db01ad47ccb8fc5263e6..dd11f535adc5937c3fdd6ea2da52cbf53dd24455 100644 (file)
@@ -223,10 +223,10 @@ int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
        struct usb_ehci *ehci;
 
        set_usboh3_clk();
-       enable_usboh3_clk(1);
+       enable_usboh3_clk(true);
        set_usb_phy_clk();
-       enable_usb_phy1_clk(1);
-       enable_usb_phy2_clk(1);
+       enable_usb_phy1_clk(true);
+       enable_usb_phy2_clk(true);
        mdelay(1);
 
        /* Do board specific initialization */