9 years agoinput: ti_am335x_tsc: Ignore previous pen down event when pen up event occurs sitara-ti-linux-3.14.y
input: ti_am335x_tsc: Ignore previous pen down event when pen up event occurs
Frequently when a pen up event is detected the previous pen down event
would be incorrect. From a userspace perspective you will see an abnormal
jump when comparing the pen down events to the one right before the pen up
event.
To avoid this issue delay sending a pen down event until the next touch
event has occured. If the current touch event is not a pen up event then
send the previously detected pen down values. If the current touch event is
a pen up then simply ignore the previous pen down value.
Signed-off-by: Franklin S Cooper Jr. <fcooper@ti.com>
Frequently when a pen up event is detected the previous pen down event
would be incorrect. From a userspace perspective you will see an abnormal
jump when comparing the pen down events to the one right before the pen up
event.
To avoid this issue delay sending a pen down event until the next touch
event has occured. If the current touch event is not a pen up event then
send the previously detected pen down values. If the current touch event is
a pen up then simply ignore the previous pen down value.
Signed-off-by: Franklin S Cooper Jr. <fcooper@ti.com>
*-omap2plus_defconfig: Set CONFIG_DISPLAY_PANEL_DPI as inbuilt
* Setting CONFIG_DISPLAY_PANEL_DPI as a module prevent psplash from working
due to psplash running before udev and failing to load since fb0 doesn't exist
yet.
* By building it into the kernel this problem is fixed and psplash works.
Signed-off-by: Franklin S. Cooper Jr <fcooper@ti.com>
* Setting CONFIG_DISPLAY_PANEL_DPI as a module prevent psplash from working
due to psplash running before udev and failing to load since fb0 doesn't exist
yet.
* By building it into the kernel this problem is fixed and psplash works.
Signed-off-by: Franklin S. Cooper Jr <fcooper@ti.com>
input: touchscreen: ti_am335x_tsc: Read charge delay from DT
Backport patch posted to linux-omap mailing list.
Patch link:
https://patchwork.kernel.org/patch/5582371/
This patch reads charge delay from tsc DT node and writes to REG_CHARGEDELAY
register. If the charge delay is not specified in DT then default value of
0x400(CHARGEDLY_OPENDLY) is used.
Backport patch posted to linux-omap mailing list.
Patch link:
https://patchwork.kernel.org/patch/5582371/
This patch reads charge delay from tsc DT node and writes to REG_CHARGEDELAY
register. If the charge delay is not specified in DT then default value of
0x400(CHARGEDLY_OPENDLY) is used.
omap_hwmod: (HACK) Workaround lack of proper sw supervised power domains support
* This (hack) patch is to temporarily work around the issue where sw supervised
clock domains aren't properly being disabled in _deassert_hardreset. This
results in the clock domain use count for gfx being imbalanced which prevents
having the gfx clock from being powered down during suspend/standby.
* With this patch gfx demos, suspend and standby have been tested and is still
working. Also the gfx domain has been properly disabled.
* The problem this patch is trying to resolve is discussed in more details
under Defect D-02084.
Signed-off-by: Franklin S. Cooper Jr <fcooper@ti.com>
* This (hack) patch is to temporarily work around the issue where sw supervised
clock domains aren't properly being disabled in _deassert_hardreset. This
results in the clock domain use count for gfx being imbalanced which prevents
having the gfx clock from being powered down during suspend/standby.
* With this patch gfx demos, suspend and standby have been tested and is still
working. Also the gfx domain has been properly disabled.
* The problem this patch is trying to resolve is discussed in more details
under Defect D-02084.
Signed-off-by: Franklin S. Cooper Jr <fcooper@ti.com>
opp33xx_data: Enabled 1 GHz for 2.0 Silicon
* For AM335x, PG 2.0 silicon was a very short lived revision mainly used
for internal board development and Beaglebone Black.
* For versions of the Beaglebone Black that were sold the 2.0 silicon used
was binned to insure that they supported 1 GHz.
* Therefore, enable 1 GHz since the only real users of 1 GHz on 2.0 silicon
are 1 GHz users.
Signed-off-by: Franklin S. Cooper Jr <fcooper@ti.com>
* For AM335x, PG 2.0 silicon was a very short lived revision mainly used
for internal board development and Beaglebone Black.
* For versions of the Beaglebone Black that were sold the 2.0 silicon used
was binned to insure that they supported 1 GHz.
* Therefore, enable 1 GHz since the only real users of 1 GHz on 2.0 silicon
are 1 GHz users.
Signed-off-by: Franklin S. Cooper Jr <fcooper@ti.com>
Automated defconfig update
ARM: OMAP2+: sleep43xx: Do not use CKE override during DeepSleep
AM437x offers a CKE override register within the control module that
allows the SoC to take control of the CKE line from the EMIF in order to
forcibly hold it low during suspend in order to prevent glitches and
keep the DDR properly in self-refresh.
Previously this was used as described in the suspend and resume path but
more recently it has been shown to cause hangs during suspend, so remove
the toggling of the bits along with all support code as suspend seems to
work better without it.
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
AM437x offers a CKE override register within the control module that
allows the SoC to take control of the CKE line from the EMIF in order to
forcibly hold it low during suspend in order to prevent glitches and
keep the DDR properly in self-refresh.
Previously this was used as described in the suspend and resume path but
more recently it has been shown to cause hangs during suspend, so remove
the toggling of the bits along with all support code as suspend seems to
work better without it.
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
ARM: OMAP2+: sleep43xx: Add missing registers to EMIF save and restore
AM437x now supports hardware leveling for DDR3 in the EMIF which uses a
few registers not used in software leveling. These registers were not
present in the suspend and resume EMIF context save code so add them so
they are not lost after a suspend operation.
Also make sure to save and restore the EMIF Class of Service registers
as these can also be configured by u-boot if needed and will be lost
after suspend if not saved.
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
AM437x now supports hardware leveling for DDR3 in the EMIF which uses a
few registers not used in software leveling. These registers were not
present in the suspend and resume EMIF context save code so add them so
they are not lost after a suspend operation.
Also make sure to save and restore the EMIF Class of Service registers
as these can also be configured by u-boot if needed and will be lost
after suspend if not saved.
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
media: ti-vpe: vip: Update regmap write for SMA_SW1
The syscon property specifies the base address of the control module block.
Parse the correct propery from device tree.
Update the regmap write to add the offset for SMA_SW1
Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
The syscon property specifies the base address of the control module block.
Parse the correct propery from device tree.
Update the regmap write to add the offset for SMA_SW1
Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
arm: dts: dra7: Add syscon for smasw in VIP nodes
When using falling edge pixel clock with VIP, pclk needs to be inverted
inside SoC before it is given to the VIP block.
This is achieved by setting control module register "CTRL_CORE_SMA_SW1"
Add a syscon property for each VIP node to allow this to be set by the
driver.
Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
When using falling edge pixel clock with VIP, pclk needs to be inverted
inside SoC before it is given to the VIP block.
This is achieved by setting control module register "CTRL_CORE_SMA_SW1"
Add a syscon property for each VIP node to allow this to be set by the
driver.
Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
usb: dwc3: otg: fix failed enumeration at boot
We need 2 separate writes to OCTL register. First to set to HOST mode
and then to enable the PORT power. If written in single shot devices
never get detected at boot time. This is because the OTG internal
state machine disables Port power when it enters A_IDLE.
Fix that by waiting till OTG state machine enters A_IDLE and then
set the PORT power.
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
We need 2 separate writes to OCTL register. First to set to HOST mode
and then to enable the PORT power. If written in single shot devices
never get detected at boot time. This is because the OTG internal
state machine disables Port power when it enters A_IDLE.
Fix that by waiting till OTG state machine enters A_IDLE and then
set the PORT power.
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
net: ethernet: cpsw: fix hangs with interrupts
The CPSW IP implements pulse-signaled interrupts. Due to
that we must write a correct, pre-defined value to the
CPDMA_MACEOIVECTOR register so the controller generates
a pulse on the correct IRQ line to signal the End Of
Interrupt.
The way the driver is written today, all four IRQ lines
are requested using the same IRQ handler and, because of
that, we could fall into situations where a TX IRQ fires
but we tell the controller that we ended an RX IRQ (or
vice-versa). This situation triggers an IRQ storm on the
reserved IRQ 127 of INTC which will in turn call ack_bad_irq()
which will, then, print a ton of:
unexpected IRQ trap at vector 00
In order to fix the problem, we are moving all calls to
cpdma_ctlr_eoi() inside the IRQ handler and making sure
we *always* write the correct value to the CPDMA_MACEOIVECTOR
register. Note that the algorithm assumes that IRQ numbers and
value-to-be-written-to-EOI are proportional, meaning that a
write of value 0 would trigger an EOI pulse for the RX_THRESHOLD
Interrupt and that's the IRQ number sitting in the 0-th index
of our irqs_table array.
This, however, is safe at least for current implementations of
CPSW so we will refrain from making the check smarter (and, as
a side-effect, slower) until we actually have a platform where
IRQ lines are swapped.
This patch has been tested for several days with AM335x- and
AM437x-based platforms. AM57x was left out because there are
still pending patches to enable ethernet in mainline for that
platform. A read of the TRM confirms the statement on previous
paragraph.
Reported-by: Yegor Yefremov <yegorslists@googlemail.com>
Fixes: 510a1e7 (drivers: net: davinci_cpdma: acknowledge interrupt properly)
Cc: <stable@vger.kernel.org> # v3.9+
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The CPSW IP implements pulse-signaled interrupts. Due to
that we must write a correct, pre-defined value to the
CPDMA_MACEOIVECTOR register so the controller generates
a pulse on the correct IRQ line to signal the End Of
Interrupt.
The way the driver is written today, all four IRQ lines
are requested using the same IRQ handler and, because of
that, we could fall into situations where a TX IRQ fires
but we tell the controller that we ended an RX IRQ (or
vice-versa). This situation triggers an IRQ storm on the
reserved IRQ 127 of INTC which will in turn call ack_bad_irq()
which will, then, print a ton of:
unexpected IRQ trap at vector 00
In order to fix the problem, we are moving all calls to
cpdma_ctlr_eoi() inside the IRQ handler and making sure
we *always* write the correct value to the CPDMA_MACEOIVECTOR
register. Note that the algorithm assumes that IRQ numbers and
value-to-be-written-to-EOI are proportional, meaning that a
write of value 0 would trigger an EOI pulse for the RX_THRESHOLD
Interrupt and that's the IRQ number sitting in the 0-th index
of our irqs_table array.
This, however, is safe at least for current implementations of
CPSW so we will refrain from making the check smarter (and, as
a side-effect, slower) until we actually have a platform where
IRQ lines are swapped.
This patch has been tested for several days with AM335x- and
AM437x-based platforms. AM57x was left out because there are
still pending patches to enable ethernet in mainline for that
platform. A read of the TRM confirms the statement on previous
paragraph.
Reported-by: Yegor Yefremov <yegorslists@googlemail.com>
Fixes: 510a1e7 (drivers: net: davinci_cpdma: acknowledge interrupt properly)
Cc: <stable@vger.kernel.org> # v3.9+
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Merge branch 'platform-ti-linux-3.14.y' of git://git.ti.com/~rrnayak/ti-linux-kernel/platform-linux-feature-tree into ti-linux-3.14.y
TI-Feature: platform_base
TI-Tree: git://git.ti.com/~rrnayak/ti-linux-kernel/platform-linux-feature-tree.git
TI-Branch: platform-ti-linux-3.14.y
* 'platform-ti-linux-3.14.y' of git://git.ti.com/~rrnayak/ti-linux-kernel/platform-linux-feature-tree:
arm: Export cache flush management symbols when !MULTI_CACHE
Signed-off-by: Texas Instruments Auto Merger <lcpd_integration@list.ti.com>
TI-Feature: platform_base
TI-Tree: git://git.ti.com/~rrnayak/ti-linux-kernel/platform-linux-feature-tree.git
TI-Branch: platform-ti-linux-3.14.y
* 'platform-ti-linux-3.14.y' of git://git.ti.com/~rrnayak/ti-linux-kernel/platform-linux-feature-tree:
arm: Export cache flush management symbols when !MULTI_CACHE
Signed-off-by: Texas Instruments Auto Merger <lcpd_integration@list.ti.com>
arm: Export cache flush management symbols when !MULTI_CACHE
When compiling a kernel without CONFIG_MULTI_CACHE enabled the
dma access functions end up not being exported. Fix it.
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
When compiling a kernel without CONFIG_MULTI_CACHE enabled the
dma access functions end up not being exported. Fix it.
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Merge branch 'audio-display-ti-linux-3.14.y' of git://git.ti.com/~darrene/ti-linux-kernel/audio-display-linux-feature-tree into ti-linux-3.14.y
TI-Feature: audio-display
TI-Tree: git://git.ti.com/~darrene/ti-linux-kernel/audio-display-linux-feature-tree.git
TI-Branch: audio-display-ti-linux-3.14.y
* 'audio-display-ti-linux-3.14.y' of git://git.ti.com/~darrene/ti-linux-kernel/audio-display-linux-feature-tree:
OMAPDSS: fix programming of the control module
Signed-off-by: Texas Instruments Auto Merger <lcpd_integration@list.ti.com>
TI-Feature: audio-display
TI-Tree: git://git.ti.com/~darrene/ti-linux-kernel/audio-display-linux-feature-tree.git
TI-Branch: audio-display-ti-linux-3.14.y
* 'audio-display-ti-linux-3.14.y' of git://git.ti.com/~darrene/ti-linux-kernel/audio-display-linux-feature-tree:
OMAPDSS: fix programming of the control module
Signed-off-by: Texas Instruments Auto Merger <lcpd_integration@list.ti.com>
OMAPDSS: fix programming of the control module
The omapdss driver uses regmap_update_bits to program
CTRL_CORE_DSS_PLL_CONTROL_OFF register, but does not shift the value to
be written properly. This leads to the omapdss always writing 0 to the
bits.
This works, because for PLL enable bits, 0 means "enable", and for the
mux bits 0 means the mux setting that we want to use. So we fail to
disable the PLL, and fail to restore the mux to its original value.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
The omapdss driver uses regmap_update_bits to program
CTRL_CORE_DSS_PLL_CONTROL_OFF register, but does not shift the value to
be written properly. This leads to the omapdss always writing 0 to the
bits.
This works, because for PLL enable bits, 0 means "enable", and for the
mux bits 0 means the mux setting that we want to use. So we fail to
disable the PLL, and fail to restore the mux to its original value.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Merge branch 'platform-ti-linux-3.14.y' of git://git.ti.com/~rrnayak/ti-linux-kernel/platform-linux-feature-tree into ti-linux-3.14.y
TI-Feature: platform_base
TI-Tree: git://git.ti.com/~rrnayak/ti-linux-kernel/platform-linux-feature-tree.git
TI-Branch: platform-ti-linux-3.14.y
* 'platform-ti-linux-3.14.y' of git://git.ti.com/~rrnayak/ti-linux-kernel/platform-linux-feature-tree:
ARM: dts: am57xx-beagle-x15: mark full 2GB as valid memory.
Signed-off-by: Texas Instruments Auto Merger <lcpd_integration@list.ti.com>
TI-Feature: platform_base
TI-Tree: git://git.ti.com/~rrnayak/ti-linux-kernel/platform-linux-feature-tree.git
TI-Branch: platform-ti-linux-3.14.y
* 'platform-ti-linux-3.14.y' of git://git.ti.com/~rrnayak/ti-linux-kernel/platform-linux-feature-tree:
ARM: dts: am57xx-beagle-x15: mark full 2GB as valid memory.
Signed-off-by: Texas Instruments Auto Merger <lcpd_integration@list.ti.com>
ARM: dts: am57xx-beagle-x15: mark full 2GB as valid memory.
Now that we support beta board+ no reason to retain the old
definition of 1GB memory.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Now that we support beta board+ no reason to retain the old
definition of 1GB memory.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Merge branch 'pm-ti-linux-3.14.y' of git://git.ti.com/~kristo/ti-linux-kernel/pm-linux-feature-tree into ti-linux-3.14.y
TI-Feature: power_management_base
TI-Tree: git://git.ti.com/~kristo/ti-linux-kernel/pm-linux-feature-tree.git
TI-Branch: pm-ti-linux-3.14.y
* 'pm-ti-linux-3.14.y' of git://git.ti.com/~kristo/ti-linux-kernel/pm-linux-feature-tree:
ARM: dts: DRA7: Provide absolute max rating for voltage domains
PM / Voltagedomain: OMAP: Add support for absolute max voltage for a domain
ARM: dts: DRA7: Fix the thermal alert interrupt number
Signed-off-by: Texas Instruments Auto Merger <lcpd_integration@list.ti.com>
TI-Feature: power_management_base
TI-Tree: git://git.ti.com/~kristo/ti-linux-kernel/pm-linux-feature-tree.git
TI-Branch: pm-ti-linux-3.14.y
* 'pm-ti-linux-3.14.y' of git://git.ti.com/~kristo/ti-linux-kernel/pm-linux-feature-tree:
ARM: dts: DRA7: Provide absolute max rating for voltage domains
PM / Voltagedomain: OMAP: Add support for absolute max voltage for a domain
ARM: dts: DRA7: Fix the thermal alert interrupt number
Signed-off-by: Texas Instruments Auto Merger <lcpd_integration@list.ti.com>
ARM: dts: DRA7: Provide absolute max rating for voltage domains
Based on Table 5-1 'Absolute Maximum Rating Over Junction Temperature Range'
from n DRA75x, DRA74x Data Manual revision M (October 2014), provide the
absolute max voltage for all the voltage domains.
Reported-by: Ravikumar Kattekola <rk@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Based on Table 5-1 'Absolute Maximum Rating Over Junction Temperature Range'
from n DRA75x, DRA74x Data Manual revision M (October 2014), provide the
absolute max voltage for all the voltage domains.
Reported-by: Ravikumar Kattekola <rk@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
PM / Voltagedomain: OMAP: Add support for absolute max voltage for a domain
We need to mark the voltage domain absolute maximum rating. This allows
us to setup voltage for a domain from min to max absolute rating.
Unfortunately, it is not possible to solely depend on maximum OPP
allowed for a domain due to the following:
in the case of a ganged voltage rail, where SMPS_x is shared between
VDD_A and VDD_B, setting voltage_tol for VDD_A can prevent VDD_B from
achieving voltage required for the domain. example:
vdd_A requires voltage Z, vdd_B requires voltage Y,
setting Z-tol to Z + tol will not work when Y is > or < the range.
instead, we look for absolute max for the voltage domains A and B.
setting Z-tol to MAX_A and Y-tol to MAX_B allows voltage ranges which
fall in the intermediate ranges and work for both VDD_A and VDD_B even
if it may be suboptimal for one of them.
If the max range is not provided the mandatory tolerance is used.
Reported-by: Ravikumar Kattekola <rk@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
We need to mark the voltage domain absolute maximum rating. This allows
us to setup voltage for a domain from min to max absolute rating.
Unfortunately, it is not possible to solely depend on maximum OPP
allowed for a domain due to the following:
in the case of a ganged voltage rail, where SMPS_x is shared between
VDD_A and VDD_B, setting voltage_tol for VDD_A can prevent VDD_B from
achieving voltage required for the domain. example:
vdd_A requires voltage Z, vdd_B requires voltage Y,
setting Z-tol to Z + tol will not work when Y is > or < the range.
instead, we look for absolute max for the voltage domains A and B.
setting Z-tol to MAX_A and Y-tol to MAX_B allows voltage ranges which
fall in the intermediate ranges and work for both VDD_A and VDD_B even
if it may be suboptimal for one of them.
If the max range is not provided the mandatory tolerance is used.
Reported-by: Ravikumar Kattekola <rk@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
ARM: dts: DRA7: Fix the thermal alert interrupt number
The CTRL_MODULE thermal alert interrupt used in the bandgap node
is currently matching the MPU INTC number, but this should really
be the corresponding IRQ Crossbar input value since Crossbar module
is enabled.
Fixes: 3b8a6e02 (ARM: dts: DRA7: Add bandgap and related thermal nodes)
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
The CTRL_MODULE thermal alert interrupt used in the bandgap node
is currently matching the MPU INTC number, but this should really
be the corresponding IRQ Crossbar input value since Crossbar module
is enabled.
Fixes: 3b8a6e02 (ARM: dts: DRA7: Add bandgap and related thermal nodes)
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Merge branch 'platform-ti-linux-3.14.y' of git://git.ti.com/~rrnayak/ti-linux-kernel/platform-linux-feature-tree into ti-linux-3.14.y
TI-Feature: platform_base
TI-Tree: git://git.ti.com/~rrnayak/ti-linux-kernel/platform-linux-feature-tree.git
TI-Branch: platform-ti-linux-3.14.y
* 'platform-ti-linux-3.14.y' of git://git.ti.com/~rrnayak/ti-linux-kernel/platform-linux-feature-tree:
ARM: dra7xx: Fix counter frequency drift for AM572x errata i856
ARM: omap5/dra7xx: Fix frequency typos.
Conflicts:
arch/arm/mach-omap2/control.h
Signed-off-by: Dan Murphy <DMurphy@ti.com>
TI-Feature: platform_base
TI-Tree: git://git.ti.com/~rrnayak/ti-linux-kernel/platform-linux-feature-tree.git
TI-Branch: platform-ti-linux-3.14.y
* 'platform-ti-linux-3.14.y' of git://git.ti.com/~rrnayak/ti-linux-kernel/platform-linux-feature-tree:
ARM: dra7xx: Fix counter frequency drift for AM572x errata i856
ARM: omap5/dra7xx: Fix frequency typos.
Conflicts:
arch/arm/mach-omap2/control.h
Signed-off-by: Dan Murphy <DMurphy@ti.com>
ARM: dra7xx: Fix counter frequency drift for AM572x errata i856
Errata i856 for the AM572x (DRA7xx) points out that the 32.768KHz external
crystal is not enabled at power up. Instead the CPU falls back to using
an emulation for the 32KHz clock which is SYSCLK1/610. SYSCLK1 is usually
20MHz on boards so far (which gives an emulated frequency of 32.786KHz),
but can also be 19.2 or 27MHz which result in much larger drift.
Since this is used to drive the master counter at 32.768KHz * 375 /
2 = 6.144MHz, the emulated speed for 20MHz is of by 570ppm, or about 43
seconds per day, and more than the 500ppm NTP is able to tolerate.
Checking the CTRL_CORE_BOOTSTRAP register can determine if the CPU
is using the real 32.768KHz crystal or the emulated SYSCLK1/610, and
by known that the real counter frequency can be determined and used.
The real speed is then SYSCLK1 / 610 * 375 / 2 or SYSCLK1 * 75 / 244.
Signed-off-by: Len Sorensen <lsorense@csclub.uwaterloo.ca>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Errata i856 for the AM572x (DRA7xx) points out that the 32.768KHz external
crystal is not enabled at power up. Instead the CPU falls back to using
an emulation for the 32KHz clock which is SYSCLK1/610. SYSCLK1 is usually
20MHz on boards so far (which gives an emulated frequency of 32.786KHz),
but can also be 19.2 or 27MHz which result in much larger drift.
Since this is used to drive the master counter at 32.768KHz * 375 /
2 = 6.144MHz, the emulated speed for 20MHz is of by 570ppm, or about 43
seconds per day, and more than the 500ppm NTP is able to tolerate.
Checking the CTRL_CORE_BOOTSTRAP register can determine if the CPU
is using the real 32.768KHz crystal or the emulated SYSCLK1/610, and
by known that the real counter frequency can be determined and used.
The real speed is then SYSCLK1 / 610 * 375 / 2 or SYSCLK1 * 75 / 244.
Signed-off-by: Len Sorensen <lsorense@csclub.uwaterloo.ca>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
ARM: omap5/dra7xx: Fix frequency typos.
The switch statement of the possible list of SYSCLK1 frequencies is
missing a 0 in 4 out of the 7 frequencies.
Fixes: fa6d79d27614 ("ARM: OMAP: Add initialisation for the real-time counter")
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Len Sorensen <lsorense@csclub.uwaterloo.ca>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
The switch statement of the possible list of SYSCLK1 frequencies is
missing a 0 in 4 out of the 7 frequencies.
Fixes: fa6d79d27614 ("ARM: OMAP: Add initialisation for the real-time counter")
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Len Sorensen <lsorense@csclub.uwaterloo.ca>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Merge branch 'rpmsg-ti-linux-3.14.y' of git://git.ti.com/rpmsg/rpmsg into ti-linux-3.14.y
TI-Feature: rpmsg
TI-Tree: git://git.ti.com/rpmsg/rpmsg.git
TI-Branch: rpmsg-ti-linux-3.14.y
* 'rpmsg-ti-linux-3.14.y' of git://git.ti.com/rpmsg/rpmsg:
ARM: dts: AM4372: Add ti,mbox-send-noirq to wkup_m3 mailbox
ARM: dts: AM33XX: Add ti,mbox-send-noirq to wkup_m3 mailbox
mailbox/omap: Add ti,mbox-send-noirq quirk to fix AM33xx CPU Idle
Signed-off-by: Texas Instruments Auto Merger <lcpd_integration@list.ti.com>
TI-Feature: rpmsg
TI-Tree: git://git.ti.com/rpmsg/rpmsg.git
TI-Branch: rpmsg-ti-linux-3.14.y
* 'rpmsg-ti-linux-3.14.y' of git://git.ti.com/rpmsg/rpmsg:
ARM: dts: AM4372: Add ti,mbox-send-noirq to wkup_m3 mailbox
ARM: dts: AM33XX: Add ti,mbox-send-noirq to wkup_m3 mailbox
mailbox/omap: Add ti,mbox-send-noirq quirk to fix AM33xx CPU Idle
Signed-off-by: Texas Instruments Auto Merger <lcpd_integration@list.ti.com>
Merge branch 'audio-display-ti-linux-3.14.y' of git://git.ti.com/~darrene/ti-linux-kernel/audio-display-linux-feature-tree into ti-linux-3.14.y
TI-Feature: audio-display
TI-Tree: git://git.ti.com/~darrene/ti-linux-kernel/audio-display-linux-feature-tree.git
TI-Branch: audio-display-ti-linux-3.14.y
* 'audio-display-ti-linux-3.14.y' of git://git.ti.com/~darrene/ti-linux-kernel/audio-display-linux-feature-tree:
ASoC: tlv320aic31xx: Do not ignore errors in aic31xx_device_init()
video/logo: prevent use of logos after they have been freed
drm/omap: fix race conditon in DMM
drm/omap: fix race condition with dev->obj_list
Signed-off-by: Dan Murphy <DMurphy@ti.com>
TI-Feature: audio-display
TI-Tree: git://git.ti.com/~darrene/ti-linux-kernel/audio-display-linux-feature-tree.git
TI-Branch: audio-display-ti-linux-3.14.y
* 'audio-display-ti-linux-3.14.y' of git://git.ti.com/~darrene/ti-linux-kernel/audio-display-linux-feature-tree:
ASoC: tlv320aic31xx: Do not ignore errors in aic31xx_device_init()
video/logo: prevent use of logos after they have been freed
drm/omap: fix race conditon in DMM
drm/omap: fix race condition with dev->obj_list
Signed-off-by: Dan Murphy <DMurphy@ti.com>
Merge branch 'pm-ti-linux-3.14.y' of git://git.ti.com/~kristo/ti-linux-kernel/pm-linux-feature-tree into ti-linux-3.14.y
TI-Feature: power_management_base
TI-Tree: git://git.ti.com/~kristo/ti-linux-kernel/pm-linux-feature-tree.git
TI-Branch: pm-ti-linux-3.14.y
* 'pm-ti-linux-3.14.y' of git://git.ti.com/~kristo/ti-linux-kernel/pm-linux-feature-tree:
ARM: OMAP2: pm33xx: Bump firmware version requirement to 0x190
remoteproc: wkup_m3_rproc: Modify wkup_m3_ping to not use interrupts
remoteproc: wkup_m3: Defer probe until wkup_m3_pm_ops are populated
ARM: OMAP2+: pm33xx: Only pass i2c volt scale offsets for DeepSleep
ARM: dts: AM4372: Add ti,mbox-send-noirq to wkup_m3 mailbox
ARM: dts: AM33XX: Add ti,mbox-send-noirq to wkup_m3 mailbox
mailbox/omap: Add ti,mbox-send-noirq quirk to fix AM33xx CPU Idle
Signed-off-by: Dan Murphy <DMurphy@ti.com>
TI-Feature: power_management_base
TI-Tree: git://git.ti.com/~kristo/ti-linux-kernel/pm-linux-feature-tree.git
TI-Branch: pm-ti-linux-3.14.y
* 'pm-ti-linux-3.14.y' of git://git.ti.com/~kristo/ti-linux-kernel/pm-linux-feature-tree:
ARM: OMAP2: pm33xx: Bump firmware version requirement to 0x190
remoteproc: wkup_m3_rproc: Modify wkup_m3_ping to not use interrupts
remoteproc: wkup_m3: Defer probe until wkup_m3_pm_ops are populated
ARM: OMAP2+: pm33xx: Only pass i2c volt scale offsets for DeepSleep
ARM: dts: AM4372: Add ti,mbox-send-noirq to wkup_m3 mailbox
ARM: dts: AM33XX: Add ti,mbox-send-noirq to wkup_m3 mailbox
mailbox/omap: Add ti,mbox-send-noirq quirk to fix AM33xx CPU Idle
Signed-off-by: Dan Murphy <DMurphy@ti.com>
ARM: OMAP2: pm33xx: Bump firmware version requirement to 0x190
Bump PM firmware minimum version requirement to 0x190 to fix AM335x
cpuidle that uses the CM3 for MPU clock gating.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Bump PM firmware minimum version requirement to 0x190 to fix AM335x
cpuidle that uses the CM3 for MPU clock gating.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Merge branch 'platform-ti-linux-3.14.y' of git://git.ti.com/~rrnayak/ti-linux-kernel/platform-linux-feature-tree into ti-linux-3.14.y
TI-Feature: platform_base
TI-Tree: git://git.ti.com/~rrnayak/ti-linux-kernel/platform-linux-feature-tree.git
TI-Branch: platform-ti-linux-3.14.y
* 'platform-ti-linux-3.14.y' of git://git.ti.com/~rrnayak/ti-linux-kernel/platform-linux-feature-tree:
ARM: OMAP2+: hwmod: Fix _wait_target_ready() for hwmods without sysc
Signed-off-by: Texas Instruments Auto Merger <lcpd_integration@list.ti.com>
TI-Feature: platform_base
TI-Tree: git://git.ti.com/~rrnayak/ti-linux-kernel/platform-linux-feature-tree.git
TI-Branch: platform-ti-linux-3.14.y
* 'platform-ti-linux-3.14.y' of git://git.ti.com/~rrnayak/ti-linux-kernel/platform-linux-feature-tree:
ARM: OMAP2+: hwmod: Fix _wait_target_ready() for hwmods without sysc
Signed-off-by: Texas Instruments Auto Merger <lcpd_integration@list.ti.com>
ASoC: tlv320aic31xx: Do not ignore errors in aic31xx_device_init()
[ Upstream commit a72d2abbe5752f3a773c4d8b7b41ae41f617f772 ]
We need to return the error codes from aic31xx_device_init() and return
from the i2c_probe with the error code.
We will have kernel panic (NULL pointer dereference) in
regulator_register_notifier() in case the devm_regulator_bulk_get() fails
(with -EPROBE_DEFER for example).
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Cc: stable@vger.kernel.org
Conflicts:
sound/soc/codecs/tlv320aic31xx.c
Signed-off-by: Jyri Sarha <jsarha@ti.com>
[ Upstream commit a72d2abbe5752f3a773c4d8b7b41ae41f617f772 ]
We need to return the error codes from aic31xx_device_init() and return
from the i2c_probe with the error code.
We will have kernel panic (NULL pointer dereference) in
regulator_register_notifier() in case the devm_regulator_bulk_get() fails
(with -EPROBE_DEFER for example).
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Cc: stable@vger.kernel.org
Conflicts:
sound/soc/codecs/tlv320aic31xx.c
Signed-off-by: Jyri Sarha <jsarha@ti.com>
ARM: OMAP2+: hwmod: Fix _wait_target_ready() for hwmods without sysc
There are quite a few hwmods that don't have sysconfig register and so
_find_mpu_rt_port(oh) will return NULL thus preventing ready state check
on those modules after the module is enabled.
This can potentially cause a bus access error if the module is accessed
before the module is ready.
Get rid of the redundant _find_mpu_rt_port() check from the _wait_target_ready()
funcion for all the SoCs. The following PRCM register access that checks the
module ready state has nothing to do with module's SYSCONFIG or mpu_rt_port.
e.g. this fixes the below DCAN bus access error on AM437x-gp-evm.
[ 16.672978] ------------[ cut here ]------------
[ 16.677885] WARNING: CPU: 0 PID: 1580 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x234/0x35c()
[ 16.687946] 44000000.ocp:L3 Custom Error: MASTER M2 (64-bit) TARGET L4_PER_0 (Read): Data Access in User mode during Functional access
[ 16.700654] Modules linked in: xhci_hcd btwilink ti_vpfe dwc3 videobuf2_core ov2659 bluetooth v4l2_common videodev ti_am335x_adc kfifo_buf industrialio c_can_platform videobuf2_dma_contig media snd_soc_tlv320aic3x pixcir_i2c_ts c_can dc
[ 16.731144] CPU: 0 PID: 1580 Comm: rpc.statd Not tainted 3.14.26-02561-gf733aa036398 #180
[ 16.739747] Backtrace:
[ 16.742336] [<c0011108>] (dump_backtrace) from [<c00112a4>] (show_stack+0x18/0x1c)
[ 16.750285] r6:00000093 r5:00000009 r4:eab5b8a8 r3:00000000
[ 16.756252] [<c001128c>] (show_stack) from [<c05a4418>] (dump_stack+0x20/0x28)
[ 16.763870] [<c05a43f8>] (dump_stack) from [<c0037120>] (warn_slowpath_common+0x6c/0x8c)
[ 16.772408] [<c00370b4>] (warn_slowpath_common) from [<c00371e4>] (warn_slowpath_fmt+0x38/0x40)
[ 16.781550] r8:c05d1f90 r7:c0730844 r6:c0730448 r5:80080003 r4:ed0cd210
[ 16.788626] [<c00371b0>] (warn_slowpath_fmt) from [<c027fa94>] (l3_interrupt_handler+0x234/0x35c)
[ 16.797968] r3:ed0cd480 r2:c0730508
[ 16.801747] [<c027f860>] (l3_interrupt_handler) from [<c0063758>] (handle_irq_event_percpu+0x54/0x1bc)
[ 16.811533] r10:ed005600 r9:c084855b r8:0000002a r7:00000000 r6:00000000 r5:0000002a
[ 16.819780] r4:ed0e6d80
[ 16.822453] [<c0063704>] (handle_irq_event_percpu) from [<c00638f0>] (handle_irq_event+0x30/0x40)
[ 16.831789] r10:eb2b6938 r9:eb2b6960 r8:bf011420 r7:fa240100 r6:00000000 r5:0000002a
[ 16.840052] r4:ed005600
[ 16.842744] [<c00638c0>] (handle_irq_event) from [<c00661d8>] (handle_fasteoi_irq+0x74/0x128)
[ 16.851702] r4:ed005600 r3:00000000
[ 16.855479] [<c0066164>] (handle_fasteoi_irq) from [<c0063068>] (generic_handle_irq+0x28/0x38)
[ 16.864523] r4:0000002a r3:c0066164
[ 16.868294] [<c0063040>] (generic_handle_irq) from [<c000ef60>] (handle_IRQ+0x38/0x8c)
[ 16.876612] r4:c081c640 r3:00000202
[ 16.880380] [<c000ef28>] (handle_IRQ) from [<c00084f0>] (gic_handle_irq+0x30/0x5c)
[ 16.888328] r6:eab5ba38 r5:c0804460 r4:fa24010c r3:00000100
[ 16.894303] [<c00084c0>] (gic_handle_irq) from [<c05a8d80>] (__irq_svc+0x40/0x50)
[ 16.902193] Exception stack(0xeab5ba38 to 0xeab5ba80)
[ 16.907499] ba20: 00000000 00000006
[ 16.916108] ba40: fa1d0000 fa1d0008 ed3d3000 eab5bab4 ed3d3460 c0842af4 bf011420 eb2b6960
[ 16.924716] ba60: eb2b6938 eab5ba8c eab5ba90 eab5ba80 bf035220 bf07702c 600f0013 ffffffff
[ 16.933317] r7:eab5ba6c r6:ffffffff r5:600f0013 r4:bf07702c
[ 16.939317] [<bf077000>] (c_can_plat_read_reg_aligned_to_16bit [c_can_platform]) from [<bf035220>] (c_can_get_berr_counter+0x38/0x64 [c_can])
[ 16.952696] [<bf0351e8>] (c_can_get_berr_counter [c_can]) from [<bf010294>] (can_fill_info+0x124/0x15c [can_dev])
[ 16.963480] r5:ec8c9740 r4:ed3d3000
[ 16.967253] [<bf010170>] (can_fill_info [can_dev]) from [<c0502fa8>] (rtnl_fill_ifinfo+0x58c/0x8fc)
[ 16.976749] r6:ec8c9740 r5:ed3d3000 r4:eb2b6780
[ 16.981613] [<c0502a1c>] (rtnl_fill_ifinfo) from [<c0503408>] (rtnl_dump_ifinfo+0xf0/0x1dc)
[ 16.990401] r10:ec8c9740 r9:00000000 r8:00000000 r7:00000000 r6:ebd4d1b4 r5:ed3d3000
[ 16.998671] r4:00000000
[ 17.001342] [<c0503318>] (rtnl_dump_ifinfo) from [<c050e6e4>] (netlink_dump+0xa8/0x1e0)
[ 17.009772] r10:00000000 r9:00000000 r8:c0503318 r7:ebf3e6c0 r6:ebd4d1b4 r5:ec8c9740
[ 17.018050] r4:ebd4d000
[ 17.020714] [<c050e63c>] (netlink_dump) from [<c050ec10>] (__netlink_dump_start+0x104/0x154)
[ 17.029591] r6:eab5bd34 r5:ec8c9980 r4:ebd4d000
[ 17.034454] [<c050eb0c>] (__netlink_dump_start) from [<c0505604>] (rtnetlink_rcv_msg+0x110/0x1f4)
[ 17.043778] r7:00000000 r6:ec8c9980 r5:00000f40 r4:ebf3e6c0
[ 17.049743] [<c05054f4>] (rtnetlink_rcv_msg) from [<c05108e8>] (netlink_rcv_skb+0xb4/0xc8)
[ 17.058449] r8:eab5bdac r7:ec8c9980 r6:c05054f4 r5:ec8c9980 r4:ebf3e6c0
[ 17.065534] [<c0510834>] (netlink_rcv_skb) from [<c0504134>] (rtnetlink_rcv+0x24/0x2c)
[ 17.073854] r6:ebd4d000 r5:00000014 r4:ec8c9980 r3:c0504110
[ 17.079846] [<c0504110>] (rtnetlink_rcv) from [<c05102ac>] (netlink_unicast+0x180/0x1ec)
[ 17.088363] r4:ed0c6800 r3:c0504110
[ 17.092113] [<c051012c>] (netlink_unicast) from [<c0510670>] (netlink_sendmsg+0x2ac/0x380)
[ 17.100813] r10:00000000 r8:00000008 r7:ec8c9980 r6:ebd4d000 r5:eab5be70 r4:eab5bee4
[ 17.109083] [<c05103c4>] (netlink_sendmsg) from [<c04dfdb4>] (sock_sendmsg+0x90/0xb0)
[ 17.117305] r10:00000000 r9:eab5a000 r8:becdda3c r7:0000000c r6:ea978400 r5:eab5be70
[ 17.125563] r4:c05103c4
[ 17.128225] [<c04dfd24>] (sock_sendmsg) from [<c04e1c28>] (SyS_sendto+0xb8/0xdc)
[ 17.136001] r6:becdda5c r5:00000014 r4:ecd37040
[ 17.140876] [<c04e1b70>] (SyS_sendto) from [<c000e680>] (ret_fast_syscall+0x0/0x30)
[ 17.148923] r10:00000000 r8:c000e804 r7:00000122 r6:becdda5c r5:0000000c r4:becdda5c
[ 17.157169] ---[ end trace 2b71e15b38f58bad ]---
Signed-off-by: Roger Quadros <rogerq@ti.com>
There are quite a few hwmods that don't have sysconfig register and so
_find_mpu_rt_port(oh) will return NULL thus preventing ready state check
on those modules after the module is enabled.
This can potentially cause a bus access error if the module is accessed
before the module is ready.
Get rid of the redundant _find_mpu_rt_port() check from the _wait_target_ready()
funcion for all the SoCs. The following PRCM register access that checks the
module ready state has nothing to do with module's SYSCONFIG or mpu_rt_port.
e.g. this fixes the below DCAN bus access error on AM437x-gp-evm.
[ 16.672978] ------------[ cut here ]------------
[ 16.677885] WARNING: CPU: 0 PID: 1580 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x234/0x35c()
[ 16.687946] 44000000.ocp:L3 Custom Error: MASTER M2 (64-bit) TARGET L4_PER_0 (Read): Data Access in User mode during Functional access
[ 16.700654] Modules linked in: xhci_hcd btwilink ti_vpfe dwc3 videobuf2_core ov2659 bluetooth v4l2_common videodev ti_am335x_adc kfifo_buf industrialio c_can_platform videobuf2_dma_contig media snd_soc_tlv320aic3x pixcir_i2c_ts c_can dc
[ 16.731144] CPU: 0 PID: 1580 Comm: rpc.statd Not tainted 3.14.26-02561-gf733aa036398 #180
[ 16.739747] Backtrace:
[ 16.742336] [<c0011108>] (dump_backtrace) from [<c00112a4>] (show_stack+0x18/0x1c)
[ 16.750285] r6:00000093 r5:00000009 r4:eab5b8a8 r3:00000000
[ 16.756252] [<c001128c>] (show_stack) from [<c05a4418>] (dump_stack+0x20/0x28)
[ 16.763870] [<c05a43f8>] (dump_stack) from [<c0037120>] (warn_slowpath_common+0x6c/0x8c)
[ 16.772408] [<c00370b4>] (warn_slowpath_common) from [<c00371e4>] (warn_slowpath_fmt+0x38/0x40)
[ 16.781550] r8:c05d1f90 r7:c0730844 r6:c0730448 r5:80080003 r4:ed0cd210
[ 16.788626] [<c00371b0>] (warn_slowpath_fmt) from [<c027fa94>] (l3_interrupt_handler+0x234/0x35c)
[ 16.797968] r3:ed0cd480 r2:c0730508
[ 16.801747] [<c027f860>] (l3_interrupt_handler) from [<c0063758>] (handle_irq_event_percpu+0x54/0x1bc)
[ 16.811533] r10:ed005600 r9:c084855b r8:0000002a r7:00000000 r6:00000000 r5:0000002a
[ 16.819780] r4:ed0e6d80
[ 16.822453] [<c0063704>] (handle_irq_event_percpu) from [<c00638f0>] (handle_irq_event+0x30/0x40)
[ 16.831789] r10:eb2b6938 r9:eb2b6960 r8:bf011420 r7:fa240100 r6:00000000 r5:0000002a
[ 16.840052] r4:ed005600
[ 16.842744] [<c00638c0>] (handle_irq_event) from [<c00661d8>] (handle_fasteoi_irq+0x74/0x128)
[ 16.851702] r4:ed005600 r3:00000000
[ 16.855479] [<c0066164>] (handle_fasteoi_irq) from [<c0063068>] (generic_handle_irq+0x28/0x38)
[ 16.864523] r4:0000002a r3:c0066164
[ 16.868294] [<c0063040>] (generic_handle_irq) from [<c000ef60>] (handle_IRQ+0x38/0x8c)
[ 16.876612] r4:c081c640 r3:00000202
[ 16.880380] [<c000ef28>] (handle_IRQ) from [<c00084f0>] (gic_handle_irq+0x30/0x5c)
[ 16.888328] r6:eab5ba38 r5:c0804460 r4:fa24010c r3:00000100
[ 16.894303] [<c00084c0>] (gic_handle_irq) from [<c05a8d80>] (__irq_svc+0x40/0x50)
[ 16.902193] Exception stack(0xeab5ba38 to 0xeab5ba80)
[ 16.907499] ba20: 00000000 00000006
[ 16.916108] ba40: fa1d0000 fa1d0008 ed3d3000 eab5bab4 ed3d3460 c0842af4 bf011420 eb2b6960
[ 16.924716] ba60: eb2b6938 eab5ba8c eab5ba90 eab5ba80 bf035220 bf07702c 600f0013 ffffffff
[ 16.933317] r7:eab5ba6c r6:ffffffff r5:600f0013 r4:bf07702c
[ 16.939317] [<bf077000>] (c_can_plat_read_reg_aligned_to_16bit [c_can_platform]) from [<bf035220>] (c_can_get_berr_counter+0x38/0x64 [c_can])
[ 16.952696] [<bf0351e8>] (c_can_get_berr_counter [c_can]) from [<bf010294>] (can_fill_info+0x124/0x15c [can_dev])
[ 16.963480] r5:ec8c9740 r4:ed3d3000
[ 16.967253] [<bf010170>] (can_fill_info [can_dev]) from [<c0502fa8>] (rtnl_fill_ifinfo+0x58c/0x8fc)
[ 16.976749] r6:ec8c9740 r5:ed3d3000 r4:eb2b6780
[ 16.981613] [<c0502a1c>] (rtnl_fill_ifinfo) from [<c0503408>] (rtnl_dump_ifinfo+0xf0/0x1dc)
[ 16.990401] r10:ec8c9740 r9:00000000 r8:00000000 r7:00000000 r6:ebd4d1b4 r5:ed3d3000
[ 16.998671] r4:00000000
[ 17.001342] [<c0503318>] (rtnl_dump_ifinfo) from [<c050e6e4>] (netlink_dump+0xa8/0x1e0)
[ 17.009772] r10:00000000 r9:00000000 r8:c0503318 r7:ebf3e6c0 r6:ebd4d1b4 r5:ec8c9740
[ 17.018050] r4:ebd4d000
[ 17.020714] [<c050e63c>] (netlink_dump) from [<c050ec10>] (__netlink_dump_start+0x104/0x154)
[ 17.029591] r6:eab5bd34 r5:ec8c9980 r4:ebd4d000
[ 17.034454] [<c050eb0c>] (__netlink_dump_start) from [<c0505604>] (rtnetlink_rcv_msg+0x110/0x1f4)
[ 17.043778] r7:00000000 r6:ec8c9980 r5:00000f40 r4:ebf3e6c0
[ 17.049743] [<c05054f4>] (rtnetlink_rcv_msg) from [<c05108e8>] (netlink_rcv_skb+0xb4/0xc8)
[ 17.058449] r8:eab5bdac r7:ec8c9980 r6:c05054f4 r5:ec8c9980 r4:ebf3e6c0
[ 17.065534] [<c0510834>] (netlink_rcv_skb) from [<c0504134>] (rtnetlink_rcv+0x24/0x2c)
[ 17.073854] r6:ebd4d000 r5:00000014 r4:ec8c9980 r3:c0504110
[ 17.079846] [<c0504110>] (rtnetlink_rcv) from [<c05102ac>] (netlink_unicast+0x180/0x1ec)
[ 17.088363] r4:ed0c6800 r3:c0504110
[ 17.092113] [<c051012c>] (netlink_unicast) from [<c0510670>] (netlink_sendmsg+0x2ac/0x380)
[ 17.100813] r10:00000000 r8:00000008 r7:ec8c9980 r6:ebd4d000 r5:eab5be70 r4:eab5bee4
[ 17.109083] [<c05103c4>] (netlink_sendmsg) from [<c04dfdb4>] (sock_sendmsg+0x90/0xb0)
[ 17.117305] r10:00000000 r9:eab5a000 r8:becdda3c r7:0000000c r6:ea978400 r5:eab5be70
[ 17.125563] r4:c05103c4
[ 17.128225] [<c04dfd24>] (sock_sendmsg) from [<c04e1c28>] (SyS_sendto+0xb8/0xdc)
[ 17.136001] r6:becdda5c r5:00000014 r4:ecd37040
[ 17.140876] [<c04e1b70>] (SyS_sendto) from [<c000e680>] (ret_fast_syscall+0x0/0x30)
[ 17.148923] r10:00000000 r8:c000e804 r7:00000122 r6:becdda5c r5:0000000c r4:becdda5c
[ 17.157169] ---[ end trace 2b71e15b38f58bad ]---
Signed-off-by: Roger Quadros <rogerq@ti.com>
video/logo: prevent use of logos after they have been freed
If the probe of an fb driver has been deferred due to missing
dependencies, and the probe is later ran when a module is loaded, the
fbdev framework will try to find a logo to use.
However, the logos are __initdata, and have already been freed. This
causes sometimes page faults, if the logo memory is not mapped,
sometimes other random crashes as the logo data is invalid, and
sometimes nothing, if the fbdev decides to reject the logo (e.g. the
random value depicting the logo's height is too big).
This patch adds a late_initcall function to mark the logos as freed. In
reality the logos are freed later, and fbdev probe may be ran between
this late_initcall and the freeing of the logos. In that case we will
miss drawing the logo, even if it would be possible.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
If the probe of an fb driver has been deferred due to missing
dependencies, and the probe is later ran when a module is loaded, the
fbdev framework will try to find a logo to use.
However, the logos are __initdata, and have already been freed. This
causes sometimes page faults, if the logo memory is not mapped,
sometimes other random crashes as the logo data is invalid, and
sometimes nothing, if the fbdev decides to reject the logo (e.g. the
random value depicting the logo's height is too big).
This patch adds a late_initcall function to mark the logos as freed. In
reality the logos are freed later, and fbdev probe may be ran between
this late_initcall and the freeing of the logos. In that case we will
miss drawing the logo, even if it would be possible.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
drm/omap: fix race conditon in DMM
The omapdrm DMM code sometimes crashes with:
WARNING: CPU: 0 PID: 1235 at lib/list_debug.c:36 __list_add+0x8c/0xbc()
list_add double add: new=e9265368, prev=e90139c4, next=e9265368.
This is caused by the code calling release_engine() twice for the same
engine.
dmm_txn_commit(wait=true) call is supposed to wait until the DMM
transaction has been finished. And it does that, but it does not wait
for the irq handler to finish.
What happens is that the irq handler is triggered, and it either wakes
up the thread that called dmm_txn_commit(), or that thread never even
slept because the transaction was finished in the HW very quickly. That
thread then continues executing, even if the irq handler is not yet
finished, and a new transaction may be initiated. If that transaction is
async (i.e. wait=false), a 'async' flag is set to true. The original irq
handler, which has yet not finished, then sees the transaction as
'async', even if it was supposed to be 'sync'.
When that happens, the irq handler does an extra release_engine() call
because it thinks it need to release the engine, leading to the crash.
This patch fixes the issue by using completion to ensure that the irq
handler has finished before a dmm_txn_commit(wait=true) may continue.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
The omapdrm DMM code sometimes crashes with:
WARNING: CPU: 0 PID: 1235 at lib/list_debug.c:36 __list_add+0x8c/0xbc()
list_add double add: new=e9265368, prev=e90139c4, next=e9265368.
This is caused by the code calling release_engine() twice for the same
engine.
dmm_txn_commit(wait=true) call is supposed to wait until the DMM
transaction has been finished. And it does that, but it does not wait
for the irq handler to finish.
What happens is that the irq handler is triggered, and it either wakes
up the thread that called dmm_txn_commit(), or that thread never even
slept because the transaction was finished in the HW very quickly. That
thread then continues executing, even if the irq handler is not yet
finished, and a new transaction may be initiated. If that transaction is
async (i.e. wait=false), a 'async' flag is set to true. The original irq
handler, which has yet not finished, then sees the transaction as
'async', even if it was supposed to be 'sync'.
When that happens, the irq handler does an extra release_engine() call
because it thinks it need to release the engine, leading to the crash.
This patch fixes the issue by using completion to ensure that the irq
handler has finished before a dmm_txn_commit(wait=true) may continue.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
drm/omap: fix race condition with dev->obj_list
omap_gem_objects are added to dev->obj_list in omap_gem_new, and removed
in omap_gem_free_object. Unfortunately there's no locking for
dev->obj_list, which eventually leads to a crash:
WARNING: CPU: 1 PID: 1123 at lib/list_debug.c:59 __list_del_entry+0xa4/0xe0()
list_del corruption. prev->next should be e9281344, but was ea722b84
Add a spinlock to protect dev->obj_list.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
omap_gem_objects are added to dev->obj_list in omap_gem_new, and removed
in omap_gem_free_object. Unfortunately there's no locking for
dev->obj_list, which eventually leads to a crash:
WARNING: CPU: 1 PID: 1123 at lib/list_debug.c:59 __list_del_entry+0xa4/0xe0()
list_del corruption. prev->next should be e9281344, but was ea722b84
Add a spinlock to protect dev->obj_list.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
remoteproc: wkup_m3_rproc: Modify wkup_m3_ping to not use interrupts
The wkup_m3 needs the ability to receive messages in noirq context
during cpuidle transition. Change wkup_m3_ping to not use any mailbox
interrupts during ping now that the mailbox driver can handle sending
the message in noirq context.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
The wkup_m3 needs the ability to receive messages in noirq context
during cpuidle transition. Change wkup_m3_ping to not use any mailbox
interrupts during ping now that the mailbox driver can handle sending
the message in noirq context.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
remoteproc: wkup_m3: Defer probe until wkup_m3_pm_ops are populated
Defer probe till remowkup_m3_pm_ops are populated. This is to ensure
that wkup_m3 is probed after the wkup_m3_pm_ops are populated by the
mach-omap2 init call. This ensures clean initialization of m3.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Acked-by: Dave Gerlach <d-gerlach@ti.com>
Defer probe till remowkup_m3_pm_ops are populated. This is to ensure
that wkup_m3 is probed after the wkup_m3_pm_ops are populated by the
mach-omap2 init call. This ensures clean initialization of m3.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Acked-by: Dave Gerlach <d-gerlach@ti.com>
ARM: OMAP2+: pm33xx: Only pass i2c volt scale offsets for DeepSleep
The offsets for i2c voltage scaling sequence were being set directly
into IPC register 5 and being passed for all PM operations. This is
incorrect as only DeepSleep0 should scale voltage, not standby or
cpuidle. Instead we should store the value when it is calculated
and only pass for DeepSleep operation, not cpuidle operation.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
The offsets for i2c voltage scaling sequence were being set directly
into IPC register 5 and being passed for all PM operations. This is
incorrect as only DeepSleep0 should scale voltage, not standby or
cpuidle. Instead we should store the value when it is calculated
and only pass for DeepSleep operation, not cpuidle operation.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
ARM: dts: AM4372: Add ti,mbox-send-noirq to wkup_m3 mailbox
Add ti,mbox-send-noirq to wkup_m3 mailbox so that messages using
wkup_m3 mailbox are sent without triggering any further interrupts.
This is required to be able to send multiple messages to the WkupM3
after the mailbox usage logic adjustment in the wkup_m3_ipc driver.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Acked-by: Dave Gerlach <d-gerlach@ti.com>
[s-anna@ti.com: revise commit description]
Signed-off-by: Suman Anna <s-anna@ti.com>
Add ti,mbox-send-noirq to wkup_m3 mailbox so that messages using
wkup_m3 mailbox are sent without triggering any further interrupts.
This is required to be able to send multiple messages to the WkupM3
after the mailbox usage logic adjustment in the wkup_m3_ipc driver.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Acked-by: Dave Gerlach <d-gerlach@ti.com>
[s-anna@ti.com: revise commit description]
Signed-off-by: Suman Anna <s-anna@ti.com>
ARM: dts: AM33XX: Add ti,mbox-send-noirq to wkup_m3 mailbox
Add ti,mbox-send-noirq to wkup_m3 mailbox so that messages using
wkup_m3 mailbox are sent without triggering any further interrupts.
This is needed to achieve lower power numbers during CPU idle on
AM33xx.
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
[s-anna@ti.com: revise commit description]
Signed-off-by: Suman Anna <s-anna@ti.com>
Add ti,mbox-send-noirq to wkup_m3 mailbox so that messages using
wkup_m3 mailbox are sent without triggering any further interrupts.
This is needed to achieve lower power numbers during CPU idle on
AM33xx.
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
[s-anna@ti.com: revise commit description]
Signed-off-by: Suman Anna <s-anna@ti.com>
mailbox/omap: Add ti,mbox-send-noirq quirk to fix AM33xx CPU Idle
The mailbox framework controls the transmission queue and requires
either its controller implementations or clients to run the state
machine for the Tx queue. The OMAP mailbox controller uses a Tx-ready
interrupt as the equivalent of a Tx-done interrupt to run this Tx
queue state-machine.
The WkupM3 processor on AM33xx and AM43xx SoCs is used to offload
certain PM tasks, like doing the necessary operations for Device
PM suspend/resume or for entering lower c-states during cpuidle.
The CPUIdle on AM33xx requires the messages to be sent without
having to trigger the Tx-ready interrupts, as the interrupt
would immediately terminate the CPUIdle operation. Support for
this has been added by introducing a DT quirk, "ti,mbox-send-noirq"
and using it to modify the normal OMAP mailbox controller behavior
on the sub-mailboxes used to communicate with the WkupM3 remote
processor. This also requires the wkup_m3_ipc driver to adjust
its mailbox usage logic to run the Tx state machine.
NOTE:
- AM43xx does not communicate with WkupM3 for CPU Idle, so is
not affected by this behavior. But, it uses the same IPC driver
for PM suspend/resume functionality, so requires the quirk as
well, because of changes to the common wkup_m3_ipc driver.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
[s-anna@ti.com: revise logic and update comments/patch description]
Signed-off-by: Suman Anna <s-anna@ti.com>
The mailbox framework controls the transmission queue and requires
either its controller implementations or clients to run the state
machine for the Tx queue. The OMAP mailbox controller uses a Tx-ready
interrupt as the equivalent of a Tx-done interrupt to run this Tx
queue state-machine.
The WkupM3 processor on AM33xx and AM43xx SoCs is used to offload
certain PM tasks, like doing the necessary operations for Device
PM suspend/resume or for entering lower c-states during cpuidle.
The CPUIdle on AM33xx requires the messages to be sent without
having to trigger the Tx-ready interrupts, as the interrupt
would immediately terminate the CPUIdle operation. Support for
this has been added by introducing a DT quirk, "ti,mbox-send-noirq"
and using it to modify the normal OMAP mailbox controller behavior
on the sub-mailboxes used to communicate with the WkupM3 remote
processor. This also requires the wkup_m3_ipc driver to adjust
its mailbox usage logic to run the Tx state machine.
NOTE:
- AM43xx does not communicate with WkupM3 for CPU Idle, so is
not affected by this behavior. But, it uses the same IPC driver
for PM suspend/resume functionality, so requires the quirk as
well, because of changes to the common wkup_m3_ipc driver.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
[s-anna@ti.com: revise logic and update comments/patch description]
Signed-off-by: Suman Anna <s-anna@ti.com>
Merge branch 'rproc-linux-3.14.y' of git://git.ti.com/rpmsg/remoteproc into rpmsg-ti-linux-3.14.y
Pull in the updated remoteproc feature branch that includes the
updates to the OMAP mailbox driver required for AM33xx/AM43xx
PM fixes.
* 'rproc-linux-3.14.y' of git://git.ti.com/rpmsg/remoteproc:
ARM: dts: AM4372: Add ti,mbox-send-noirq to wkup_m3 mailbox
ARM: dts: AM33XX: Add ti,mbox-send-noirq to wkup_m3 mailbox
mailbox/omap: Add ti,mbox-send-noirq quirk to fix AM33xx CPU Idle
Signed-off-by: Suman Anna <s-anna@ti.com>
Pull in the updated remoteproc feature branch that includes the
updates to the OMAP mailbox driver required for AM33xx/AM43xx
PM fixes.
* 'rproc-linux-3.14.y' of git://git.ti.com/rpmsg/remoteproc:
ARM: dts: AM4372: Add ti,mbox-send-noirq to wkup_m3 mailbox
ARM: dts: AM33XX: Add ti,mbox-send-noirq to wkup_m3 mailbox
mailbox/omap: Add ti,mbox-send-noirq quirk to fix AM33xx CPU Idle
Signed-off-by: Suman Anna <s-anna@ti.com>
Merge branch 'mailbox-linux-3.14.y' of git://git.ti.com/rpmsg/mailbox into rproc-linux-3.14.y
Pull in the updated mailbox feature branch into the remoteproc
tree, this adds a mailbox quirk to fix AM33xx CPU Idle and the
associated updates for the mailbox communication to work with
the WkupM3 remote processor on AM33xx/AM43xx SoCs.
* 'mailbox-linux-3.14.y' of git://git.ti.com/rpmsg/mailbox:
ARM: dts: AM4372: Add ti,mbox-send-noirq to wkup_m3 mailbox
ARM: dts: AM33XX: Add ti,mbox-send-noirq to wkup_m3 mailbox
mailbox/omap: Add ti,mbox-send-noirq quirk to fix AM33xx CPU Idle
Signed-off-by: Suman Anna <s-anna@ti.com>
Pull in the updated mailbox feature branch into the remoteproc
tree, this adds a mailbox quirk to fix AM33xx CPU Idle and the
associated updates for the mailbox communication to work with
the WkupM3 remote processor on AM33xx/AM43xx SoCs.
* 'mailbox-linux-3.14.y' of git://git.ti.com/rpmsg/mailbox:
ARM: dts: AM4372: Add ti,mbox-send-noirq to wkup_m3 mailbox
ARM: dts: AM33XX: Add ti,mbox-send-noirq to wkup_m3 mailbox
mailbox/omap: Add ti,mbox-send-noirq quirk to fix AM33xx CPU Idle
Signed-off-by: Suman Anna <s-anna@ti.com>
Merge branch 'connectivity-ti-linux-3.14.y' of git://git.ti.com/connectivity-integration-tree/connectivity-ti-linux-kernel into ti-linux-3.14.y
* 'connectivity-ti-linux-3.14.y' of git://git.ti.com/connectivity-integration-tree/connectivity-ti-linux-kernel: (27 commits)
ARM: dts: dra7: make usb1 of dra7-evm and dra72-evm as OTG
ARM: dts: am437x-gp-evm: Move pinctrl data to dwc3_omap wrapper from usb_phy
usb: dwc3: dwc3-omap: USB DRVVBUS pinctrl state should be set from wrapper
usb: host: xhci: Call suspend/resume depending on DRD state
usb: dwc3: gadget: Mark freed EPs as NULL
usb: dwc3: dwc3-omap: Fix disable IRQ
usb: dwc3: Save/Restore OTG registers while suspend/resume
arm: dts: am43x evms: Make usb1 as OTG
arm: dts: exynos5250: Add named interrupt property for dwc3
arm: dts: dra7: Add named interrupt property for dwc3
arm: dts: omap5: Add named interrupt property for dwc3
arm: dts: am4372: Add named interrupt property for dwc3
usb: dwc3: otg: Add the initial otg driver for dwc3.
usb: dwc3: core: Add DWC3 OTG specific register defines
usb: dwc3: gadget: Adapt gadget to drd library
usb: dwc3: Add seperate dwc3_gadget object to support gadget release
usb: dwc3: core: Adapt to named interrupts
usb: dwc3: dwc3-omap: Make the wrapper interrupt shared
usb: dwc3: core: Add dwc3_drd_helper function
usb: host: xhci: Adapt xhci to use usb drd library
...
* 'connectivity-ti-linux-3.14.y' of git://git.ti.com/connectivity-integration-tree/connectivity-ti-linux-kernel: (27 commits)
ARM: dts: dra7: make usb1 of dra7-evm and dra72-evm as OTG
ARM: dts: am437x-gp-evm: Move pinctrl data to dwc3_omap wrapper from usb_phy
usb: dwc3: dwc3-omap: USB DRVVBUS pinctrl state should be set from wrapper
usb: host: xhci: Call suspend/resume depending on DRD state
usb: dwc3: gadget: Mark freed EPs as NULL
usb: dwc3: dwc3-omap: Fix disable IRQ
usb: dwc3: Save/Restore OTG registers while suspend/resume
arm: dts: am43x evms: Make usb1 as OTG
arm: dts: exynos5250: Add named interrupt property for dwc3
arm: dts: dra7: Add named interrupt property for dwc3
arm: dts: omap5: Add named interrupt property for dwc3
arm: dts: am4372: Add named interrupt property for dwc3
usb: dwc3: otg: Add the initial otg driver for dwc3.
usb: dwc3: core: Add DWC3 OTG specific register defines
usb: dwc3: gadget: Adapt gadget to drd library
usb: dwc3: Add seperate dwc3_gadget object to support gadget release
usb: dwc3: core: Adapt to named interrupts
usb: dwc3: dwc3-omap: Make the wrapper interrupt shared
usb: dwc3: core: Add dwc3_drd_helper function
usb: host: xhci: Adapt xhci to use usb drd library
...
ARM: dts: dra7: make usb1 of dra7-evm and dra72-evm as OTG
Make USB1 of dra7-evm and dra72-evm as OTG.
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Make USB1 of dra7-evm and dra72-evm as OTG.
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
ARM: dts: am437x-gp-evm: Move pinctrl data to dwc3_omap wrapper from usb_phy
Now that we switch pinctrl states from dwc3-omap wrapper driver,
add the pinctrl data to wrapper node.
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Now that we switch pinctrl states from dwc3-omap wrapper driver,
add the pinctrl data to wrapper node.
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
usb: dwc3: dwc3-omap: USB DRVVBUS pinctrl state should be set from wrapper
The USB DRVVBUS pinctrl state should be changed from the wrapper driver
rather than from the PHY driver. While testing suspend with DRD enabled,
it is seen that we miss interrupts since the pin state is switched to
default later by the PHY driver where as the wrapper driver starts using
the pin before that.
To avoid this maintain pin states in wrapper driver.
Signed-off-by: George Cherian <george.cherian@ti.com>
[nsekhar@ti.com: updates to patch description]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The USB DRVVBUS pinctrl state should be changed from the wrapper driver
rather than from the PHY driver. While testing suspend with DRD enabled,
it is seen that we miss interrupts since the pin state is switched to
default later by the PHY driver where as the wrapper driver starts using
the pin before that.
To avoid this maintain pin states in wrapper driver.
Signed-off-by: George Cherian <george.cherian@ti.com>
[nsekhar@ti.com: updates to patch description]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
usb: host: xhci: Call suspend/resume depending on DRD state
It's quite possible that the system might enter suspend after switching
role from host to device. In such scenarios, the xhci platform device is
still valid but the HCD will be removed. With the help of DRD library
determine the state and call suspend/resume accordingly.
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
It's quite possible that the system might enter suspend after switching
role from host to device. In such scenarios, the xhci platform device is
still valid but the HCD will be removed. With the help of DRD library
determine the state and call suspend/resume accordingly.
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
usb: dwc3: gadget: Mark freed EPs as NULL
The freed EPs should be marked as NULL else any further
access would cause issues. This was seen while testing suspend/resume
with DRD enabled. While at it, check for valid ep0 and ep1 during
suspend /resume.
ep0 and ep1 are freed while switching from host to device mode.
Now that we make it NULL after freeing check the validity during
suspend/resume.
Signed-off-by: George Cherian <george.cherian@ti.com>
[nsekhar@ti.com: minor tweaks to patch description]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The freed EPs should be marked as NULL else any further
access would cause issues. This was seen while testing suspend/resume
with DRD enabled. While at it, check for valid ep0 and ep1 during
suspend /resume.
ep0 and ep1 are freed while switching from host to device mode.
Now that we make it NULL after freeing check the validity during
suspend/resume.
Signed-off-by: George Cherian <george.cherian@ti.com>
[nsekhar@ti.com: minor tweaks to patch description]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
usb: dwc3: dwc3-omap: Fix disable IRQ
In the wrapper the IRQ disable should be done by writing 1's to the
IRQ*_CLR register. Existing code is broken because it instead writes
zeros to IRQ*_SET register.
Fix this by adding functions dwc3_omap_write_irqmisc_clr() and
dwc3_omap_write_irq0_clr() which do the right thing.
Signed-off-by: George Cherian <george.cherian@ti.com>
[nsekhar@ti.com: minor tweaks to patch description]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
In the wrapper the IRQ disable should be done by writing 1's to the
IRQ*_CLR register. Existing code is broken because it instead writes
zeros to IRQ*_SET register.
Fix this by adding functions dwc3_omap_write_irqmisc_clr() and
dwc3_omap_write_irq0_clr() which do the right thing.
Signed-off-by: George Cherian <george.cherian@ti.com>
[nsekhar@ti.com: minor tweaks to patch description]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
usb: dwc3: Save/Restore OTG registers while suspend/resume
With DRD enabled, OTG registers can lose context during suspend
resume. Save the registers during suspend and restore them
while resuming.
Signed-off-by: George Cherian <george.cherian@ti.com>
[nsekhar@ti.com: minor tweaks to patch description]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
With DRD enabled, OTG registers can lose context during suspend
resume. Save the registers during suspend and restore them
while resuming.
Signed-off-by: George Cherian <george.cherian@ti.com>
[nsekhar@ti.com: minor tweaks to patch description]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
arm: dts: am43x evms: Make usb1 as OTG
USB1 of am43x EPOS EVM, am437x GP EVM and am437x SK EVM can be used as OTG.
Enable the same.
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
USB1 of am43x EPOS EVM, am437x GP EVM and am437x SK EVM can be used as OTG.
Enable the same.
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
arm: dts: exynos5250: Add named interrupt property for dwc3
Add interrupt names so that the same can be used for OTG easily.
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Add interrupt names so that the same can be used for OTG easily.
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
arm: dts: dra7: Add named interrupt property for dwc3
Add interrupt names so that the same can be used for OTG easily.
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Add interrupt names so that the same can be used for OTG easily.
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
arm: dts: omap5: Add named interrupt property for dwc3
Add interrupt names so that the same can be used for OTG easily.
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Add interrupt names so that the same can be used for OTG easily.
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
arm: dts: am4372: Add named interrupt property for dwc3
Add interrupt names so that the same can be used for OTG easily.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Add interrupt names so that the same can be used for OTG easily.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
usb: dwc3: otg: Add the initial otg driver for dwc3.
Add the Initial OTG driver for dwc3.
Currently support only
* ID based Role switching.
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Add the Initial OTG driver for dwc3.
Currently support only
* ID based Role switching.
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
usb: dwc3: core: Add DWC3 OTG specific register defines
Add OTG reggister defines to DWC3 core.h
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Add OTG reggister defines to DWC3 core.h
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
usb: dwc3: gadget: Adapt gadget to drd library
Adapt the dwc3 gadget to use drd library functions.
In preparation to support DRD on dwc3.
Signed-off-by: George Cherian <george.cherian@ti.com>
[nsekhar@ti.com: fix sparse warnings]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Adapt the dwc3 gadget to use drd library functions.
In preparation to support DRD on dwc3.
Signed-off-by: George Cherian <george.cherian@ti.com>
[nsekhar@ti.com: fix sparse warnings]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
usb: dwc3: Add seperate dwc3_gadget object to support gadget release
With the current implementation it's impossible to release the gadget.
Add a separate dwc3_gadget object to dwc3 structure so that the same
can be freed during the gadget release.
This is in prepration to adapt dwc3 gadget driver to drd library.
DRD library uses usb_del/add_gadget_udc while switching roles between
HOST and DEVICE modes. If the usb_gadget is not released during usb_del_gadget_udc,
the subsequent usb_add_gadget_udc would try to initialize an already initialized
kobject. To avoid this make sure we have an easily freeable object.
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
With the current implementation it's impossible to release the gadget.
Add a separate dwc3_gadget object to dwc3 structure so that the same
can be freed during the gadget release.
This is in prepration to adapt dwc3 gadget driver to drd library.
DRD library uses usb_del/add_gadget_udc while switching roles between
HOST and DEVICE modes. If the usb_gadget is not released during usb_del_gadget_udc,
the subsequent usb_add_gadget_udc would try to initialize an already initialized
kobject. To avoid this make sure we have an easily freeable object.
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
usb: dwc3: core: Adapt to named interrupts
Add support to use interrupt names,
Following are the interrupt names
Peripheral Interrupt - peripheral
HOST Interrupt - host
OTG Interrupt - otg
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Add support to use interrupt names,
Following are the interrupt names
Peripheral Interrupt - peripheral
HOST Interrupt - host
OTG Interrupt - otg
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
usb: dwc3: dwc3-omap: Make the wrapper interrupt shared
OTG interrupt and wrapper is shared
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
OTG interrupt and wrapper is shared
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
usb: dwc3: core: Add dwc3_drd_helper function
This helper function, facilitates to re-initialize the event buffers.
It re-initilizes the event buffers while switching role from
HOST to DEVICE mode.
The DWC3 IP shares internal RAM for both HOST and Device specific registers.
So while switching roles from HOST to Device modes, it's required to
re-initialize the EVENT buffer registers for the Device mode to continue
work properly. dwc3_event_buffers_setup() is exported out from core.c via
wrapper dwc3_core_gadget_helper() which will be invoked from dwc3 otg driver.
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
This helper function, facilitates to re-initialize the event buffers.
It re-initilizes the event buffers while switching role from
HOST to DEVICE mode.
The DWC3 IP shares internal RAM for both HOST and Device specific registers.
So while switching roles from HOST to Device modes, it's required to
re-initialize the EVENT buffer registers for the Device mode to continue
work properly. dwc3_event_buffers_setup() is exported out from core.c via
wrapper dwc3_core_gadget_helper() which will be invoked from dwc3 otg driver.
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
usb: host: xhci: Adapt xhci to use usb drd library
Adapt the xhci-plat driver to use drd library functions.
In prepration to support DRD on dwc3.
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Adapt the xhci-plat driver to use drd library functions.
In prepration to support DRD on dwc3.
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
usb: dwc3: host: Pass the XHCI_DRD_SUPPORT and XHCI_NEEDS_LHC_RESET quirk
Pass the quir flag XHCI_DRD_SUPPORT from DWC3 host to xhci platform driver.
This enables xhci driver to handle deallocation's differently while in DRD mode.
Pass the quirk flag XHCI_NEEDS_LHC_RESET from DWC3 host to xhci platform
driver. This enables to do LHRESET during xhci_reset().
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Pass the quir flag XHCI_DRD_SUPPORT from DWC3 host to xhci platform driver.
This enables xhci driver to handle deallocation's differently while in DRD mode.
Pass the quirk flag XHCI_NEEDS_LHC_RESET from DWC3 host to xhci platform
driver. This enables to do LHRESET during xhci_reset().
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
dwc3: host: Enable USB3 LPM capability
All dwc3 based xhci host controller supports USB3.0 LPM functionality.
Therefore enable it in platform data for all dwc3 based xhci device if
DWC3_HOST_USB3_LPM_ENABLE is selected in Kconfig.
Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
All dwc3 based xhci host controller supports USB3.0 LPM functionality.
Therefore enable it in platform data for all dwc3 based xhci device if
DWC3_HOST_USB3_LPM_ENABLE is selected in Kconfig.
Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
usb: host: xhci-plat: Add support to pass XHCI_NEEDS_LHC_RESET quirk
Extend the platform data to pass XHCI_NEEDS_LHC_RESET quirk to
the xhci driver.
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Extend the platform data to pass XHCI_NEEDS_LHC_RESET quirk to
the xhci driver.
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
usb: host xhci: Add XHCI_NEEDS_LHC_RESET quirk
This adds XHCI_NEEDS_LHC_RESET quirk, to make sure only Light Host Reset
is done during xhci_reset(). This is mainly useful when we switch roles
HOST to Device mode and viceversa.
The DWC3 IP shares internal RAM for both HOST and Device specific registers.
So while switching roles between HOST and Device modes, it's advbised to do
a LIGHT HC reset else the already configured global registers of the DWC3 IP
gets re-initialized.
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
This adds XHCI_NEEDS_LHC_RESET quirk, to make sure only Light Host Reset
is done during xhci_reset(). This is mainly useful when we switch roles
HOST to Device mode and viceversa.
The DWC3 IP shares internal RAM for both HOST and Device specific registers.
So while switching roles between HOST and Device modes, it's advbised to do
a LIGHT HC reset else the already configured global registers of the DWC3 IP
gets re-initialized.
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
usb: host: xhci-plat: Add support to pass XHCI_DRD_SUPPORT quirk
Extend the platform data to pass XHCI_DRD_SUPPORT quirk to the xhci driver.
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Extend the platform data to pass XHCI_DRD_SUPPORT quirk to the xhci driver.
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
usb: host xhci: fix up deallocation code
This fixes up the deallocation code in the xhci driver, so that
usb_add_hcd()/usb_remove_hcd() can be called repeatedly without
crashing.
In case of DRD mode, the DRD library calls /usb_remove_hcd() while
switching from HOST mode to Device mode, but it doesnot call usb_put_hcd().
We need to preserve the already allocated xhci struct for the subsequent
call of usb_add_hcd() from the DRD library.
A new quirk flag XHCI_DRD_SUPPORT is added to differentiate between
normal usb_remove_hcd and drd specific call.
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
This fixes up the deallocation code in the xhci driver, so that
usb_add_hcd()/usb_remove_hcd() can be called repeatedly without
crashing.
In case of DRD mode, the DRD library calls /usb_remove_hcd() while
switching from HOST mode to Device mode, but it doesnot call usb_put_hcd().
We need to preserve the already allocated xhci struct for the subsequent
call of usb_add_hcd() from the DRD library.
A new quirk flag XHCI_DRD_SUPPORT is added to differentiate between
normal usb_remove_hcd and drd specific call.
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
usb: drd-lib: Add DRD lib for USB
Add USB DRD library. This Library facilitates to
switch roles between HOST and Device modes.
A DRD should be added to the library using usb_drd_add().
Register the HOST and UDC using usb_drd_register_hcd/udc().
Un-Register the HOST and UDC using usb_drd_unregister_hcd/udc().
Depending on the state of IP -
Call the following to start/stop HOST controller
usb_drd_start/stop_hcd().
This internally calls usb_add/remove_hcd() or IP specific low level start/stop
defined in ll_start/stop
Call the following to start/stop UDC
usb_drd_start/stop_udc().
This internally calls udc_start/udc_stop() or IP specific low level start/stop
defined in ll_start/stop
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Add USB DRD library. This Library facilitates to
switch roles between HOST and Device modes.
A DRD should be added to the library using usb_drd_add().
Register the HOST and UDC using usb_drd_register_hcd/udc().
Un-Register the HOST and UDC using usb_drd_unregister_hcd/udc().
Depending on the state of IP -
Call the following to start/stop HOST controller
usb_drd_start/stop_hcd().
This internally calls usb_add/remove_hcd() or IP specific low level start/stop
defined in ll_start/stop
Call the following to start/stop UDC
usb_drd_start/stop_udc().
This internally calls udc_start/udc_stop() or IP specific low level start/stop
defined in ll_start/stop
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Merge branch 'audio-display-ti-linux-3.14.y' of git://git.ti.com/~darrene/ti-linux-kernel/audio-display-linux-feature-tree into ti-linux-3.14.y
TI-Feature: audio-display
TI-Tree: git://git.ti.com/~darrene/ti-linux-kernel/audio-display-linux-feature-tree.git
TI-Branch: audio-display-ti-linux-3.14.y
* 'audio-display-ti-linux-3.14.y' of git://git.ti.com/~darrene/ti-linux-kernel/audio-display-linux-feature-tree:
drm/irq: Implement a generic vblank_wait function
drm/omap: fbdev: add a module option controlling num backbuffers allocated
OMAPDSS: make dss & dispc runtime PM irq-safe
PM / Runtime: Better support for nested irq_safe drivers
ASoC: omap-hdmi-audio: Set SNDRV_PCM_HW_PARAM_BUFFER_BYTES constraint
Signed-off-by: Texas Instruments Auto Merger <lcpd_integration@list.ti.com>
TI-Feature: audio-display
TI-Tree: git://git.ti.com/~darrene/ti-linux-kernel/audio-display-linux-feature-tree.git
TI-Branch: audio-display-ti-linux-3.14.y
* 'audio-display-ti-linux-3.14.y' of git://git.ti.com/~darrene/ti-linux-kernel/audio-display-linux-feature-tree:
drm/irq: Implement a generic vblank_wait function
drm/omap: fbdev: add a module option controlling num backbuffers allocated
OMAPDSS: make dss & dispc runtime PM irq-safe
PM / Runtime: Better support for nested irq_safe drivers
ASoC: omap-hdmi-audio: Set SNDRV_PCM_HW_PARAM_BUFFER_BYTES constraint
Signed-off-by: Texas Instruments Auto Merger <lcpd_integration@list.ti.com>
drm/irq: Implement a generic vblank_wait function
[ Upstream commit e8450f51a4b39cfe0878b4aee339820b2bfff240 ]
As usual in both a crtc index and a struct drm_crtc * version.
The function assumes that no one drivers their display below 10Hz, and
it will complain if the vblank wait takes longer than that.
v2: Also check dev->max_vblank_counter since some drivers register a
fake get_vblank_counter function.
v3: Use drm_vblank_count instead of calling the low-level
->get_vblank_counter callback. That way we'll get the sw-cooked
counter for platforms without proper vblank support and so can ditch
the max_vblank_counter check again.
v4: Review from Michel Dänzer:
- Restore lost notes about v3:
- Spelling in kerneldoc.
- Inline wait_event condition.
- s/vblank_wait/wait_one_vblank/
Cc: Michel Dänzer <michel@daenzer.net>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Darren Etheridge <detheridge@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
[ Upstream commit e8450f51a4b39cfe0878b4aee339820b2bfff240 ]
As usual in both a crtc index and a struct drm_crtc * version.
The function assumes that no one drivers their display below 10Hz, and
it will complain if the vblank wait takes longer than that.
v2: Also check dev->max_vblank_counter since some drivers register a
fake get_vblank_counter function.
v3: Use drm_vblank_count instead of calling the low-level
->get_vblank_counter callback. That way we'll get the sw-cooked
counter for platforms without proper vblank support and so can ditch
the max_vblank_counter check again.
v4: Review from Michel Dänzer:
- Restore lost notes about v3:
- Spelling in kerneldoc.
- Inline wait_event condition.
- s/vblank_wait/wait_one_vblank/
Cc: Michel Dänzer <michel@daenzer.net>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Darren Etheridge <detheridge@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
drm/omap: fbdev: add a module option controlling num backbuffers allocated
Some software requires the use of the fbdev PAN ioctl (SGX driver in flip
mode for instance). This commit adds a new kernel parameter:
omapdrm.num_fbdev_backbuffers=<int>
that can be used to specify how many buffers get allocated when the
omapdrm/fbdev driver gets initialized. It defaults to 1 if it is not
specified which is the existing behavior.
Signed-off-by: Darren Etheridge <detheridge@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Some software requires the use of the fbdev PAN ioctl (SGX driver in flip
mode for instance). This commit adds a new kernel parameter:
omapdrm.num_fbdev_backbuffers=<int>
that can be used to specify how many buffers get allocated when the
omapdrm/fbdev driver gets initialized. It defaults to 1 if it is not
specified which is the existing behavior.
Signed-off-by: Darren Etheridge <detheridge@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
OMAPDSS: make dss & dispc runtime PM irq-safe
Both dss and dispc runtime PM suspend & resume can be called in atomic
context. As omapdrm has a habit of calling runtime get/put from atomic
context, set both dss and dispc as irq-safe to solve fix omapdrm.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Both dss and dispc runtime PM suspend & resume can be called in atomic
context. As omapdrm has a habit of calling runtime get/put from atomic
context, set both dss and dispc as irq-safe to solve fix omapdrm.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
PM / Runtime: Better support for nested irq_safe drivers
Do not lock parent of irq safe device to enabled state if the parent
is also irq safe.
Before this patch the pm_runtime_irq_safe() always called
pm_runtime_get_sync() for the parent, locking the parent to enabled
state and for sure making any parent irq_safe. This is hardly optimal
if the parent device PM code is also irq_safe.
After this patch the PM runtime core synchronously enables any
irq_safe parents of an irq_safe device when pm_runtime_get_sync() is
called. The parents are checked asyncronously after pm_runtime_put()
call.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Do not lock parent of irq safe device to enabled state if the parent
is also irq safe.
Before this patch the pm_runtime_irq_safe() always called
pm_runtime_get_sync() for the parent, locking the parent to enabled
state and for sure making any parent irq_safe. This is hardly optimal
if the parent device PM code is also irq_safe.
After this patch the PM runtime core synchronously enables any
irq_safe parents of an irq_safe device when pm_runtime_get_sync() is
called. The parents are checked asyncronously after pm_runtime_put()
call.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
ASoC: omap-hdmi-audio: Set SNDRV_PCM_HW_PARAM_BUFFER_BYTES constraint
Set SNDRV_PCM_HW_PARAM_BUFFER_BYTES contraint that matches with
SNDRV_PCM_HW_PARAM_PERIOD_BYTES constraint.
For some reason setting the hw params with snd_pcm_hw_params_*_near()
functions sometimes fails if the period bytes constraint is set
without a matching buffer bytes constraint.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Set SNDRV_PCM_HW_PARAM_BUFFER_BYTES contraint that matches with
SNDRV_PCM_HW_PARAM_PERIOD_BYTES constraint.
For some reason setting the hw params with snd_pcm_hw_params_*_near()
functions sometimes fails if the period bytes constraint is set
without a matching buffer bytes constraint.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Merge branch 'connectivity-ti-linux-3.14.y' of git://git.ti.com/connectivity-integration-tree/connectivity-ti-linux-kernel into ti-linux-3.14.y
TI-Feature: connectivity
TI-Tree: git://git.ti.com/connectivity-integration-tree/connectivity-ti-linux-kernel.git
TI-Branch: connectivity-ti-linux-3.14.y
* 'connectivity-ti-linux-3.14.y' of git://git.ti.com/connectivity-integration-tree/connectivity-ti-linux-kernel:
usb: musb: stuff leak of struct usb_hcd
gpio: pcf857x: restore the initial line state of all pcf lines
drivers: net: cpsw: fix cpsw hang on ethernet cable connect/disconnect
Signed-off-by: Texas Instruments Auto Merger <lcpd_integration@list.ti.com>
TI-Feature: connectivity
TI-Tree: git://git.ti.com/connectivity-integration-tree/connectivity-ti-linux-kernel.git
TI-Branch: connectivity-ti-linux-3.14.y
* 'connectivity-ti-linux-3.14.y' of git://git.ti.com/connectivity-integration-tree/connectivity-ti-linux-kernel:
usb: musb: stuff leak of struct usb_hcd
gpio: pcf857x: restore the initial line state of all pcf lines
drivers: net: cpsw: fix cpsw hang on ethernet cable connect/disconnect
Signed-off-by: Texas Instruments Auto Merger <lcpd_integration@list.ti.com>
usb: musb: stuff leak of struct usb_hcd
since the split of host+gadget mode in commit 74c2e9360058 ("usb: musb:
factor out hcd initalization") we leak the usb_hcd struct. We call now
musb_host_cleanup() which does basically usb_remove_hcd() and also sets
the hcd variable to NULL. Doing so makes the finall call to
musb_host_free() basically a nop and the usb_hcd remains around for ever
without anowner.
This patch drops that NULL assignment for that reason.
Fixes: 74c2e9360058 ("usb: musb: factor out hcd initalization")
Cc: stable@vger.kernel.org
Cc: Daniel Mack <zonque@gmail.com>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
since the split of host+gadget mode in commit 74c2e9360058 ("usb: musb:
factor out hcd initalization") we leak the usb_hcd struct. We call now
musb_host_cleanup() which does basically usb_remove_hcd() and also sets
the hcd variable to NULL. Doing so makes the finall call to
musb_host_free() basically a nop and the usb_hcd remains around for ever
without anowner.
This patch drops that NULL assignment for that reason.
Fixes: 74c2e9360058 ("usb: musb: factor out hcd initalization")
Cc: stable@vger.kernel.org
Cc: Daniel Mack <zonque@gmail.com>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
gpio: pcf857x: restore the initial line state of all pcf lines
The reset values for all the PCF lines are high and hence on shutdown
we should drive all the lines high in order to bring it to the reset state.
This is actually required since pcf doesn't have a reset line and even after
warm reset (by invoking "reboot" in prompt) the pcf lines maintains it's
previous programmed state. This becomes a problem if the boards are designed
to work with the default initial state.
DRA7XX_evm uses PCF8575 and one of the PCF output lines feeds to MMC/SD and
this line should be driven high in order for the MMC/SD to be detected.
This line is modelled as regulator and the hsmmc driver takes care of enabling
and disabling it. In the case of 'reboot', during shutdown path as part of it's
cleanup process the hsmmc driver disables this regulator. This makes MMC boot
not functional.
Fixed it by driving high all the pcf lines.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The reset values for all the PCF lines are high and hence on shutdown
we should drive all the lines high in order to bring it to the reset state.
This is actually required since pcf doesn't have a reset line and even after
warm reset (by invoking "reboot" in prompt) the pcf lines maintains it's
previous programmed state. This becomes a problem if the boards are designed
to work with the default initial state.
DRA7XX_evm uses PCF8575 and one of the PCF output lines feeds to MMC/SD and
this line should be driven high in order for the MMC/SD to be detected.
This line is modelled as regulator and the hsmmc driver takes care of enabling
and disabling it. In the case of 'reboot', during shutdown path as part of it's
cleanup process the hsmmc driver disables this regulator. This makes MMC boot
not functional.
Fixed it by driving high all the pcf lines.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
drivers: net: cpsw: fix cpsw hang on ethernet cable connect/disconnect
During cable disconnect CPSW internal fifo's should be put in disable mode
else internal fifo's can overflow and DMA can hang and can be recovered
only by issuing IP reset via interface down and up. In the commit 088f02263,
instead of putting the fifo in disable mode it is put in forward mode via
port state. So during cable connect/disconnect CPSW Tx might not work.
Fixing this by setting disable state to the slave fifo's during cable
disconnect.
Fixes: 088f02263 ("drivers: net: cpsw: switch-config: set/get port state")
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
During cable disconnect CPSW internal fifo's should be put in disable mode
else internal fifo's can overflow and DMA can hang and can be recovered
only by issuing IP reset via interface down and up. In the commit 088f02263,
instead of putting the fifo in disable mode it is put in forward mode via
port state. So during cable connect/disconnect CPSW Tx might not work.
Fixing this by setting disable state to the slave fifo's during cable
disconnect.
Fixes: 088f02263 ("drivers: net: cpsw: switch-config: set/get port state")
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Merge branch 'connectivity-ti-linux-3.14.y' of git://git.ti.com/connectivity-integration-tree/connectivity-ti-linux-kernel into ti-linux-3.14.y
TI-Feature: connectivity
TI-Tree: git://git.ti.com/connectivity-integration-tree/connectivity-ti-linux-kernel.git
TI-Branch: connectivity-ti-linux-3.14.y
* 'connectivity-ti-linux-3.14.y' of git://git.ti.com/connectivity-integration-tree/connectivity-ti-linux-kernel:
ARM: dts: dra72-evm: add evm_3v3_sd regulator
ARM: dts: dra7-evm: add evm_3v3_sd regulator
ARM: dts: dra72-evm: Set max clock frequency of MMC1 and MMC2 to 192MHz
ARM: dts: dra72-evm: Set MMC host controller capability properties
ARM: dts: add pbias-supply
mmc: omap_hsmmc: add voltage switch support for UHS SD card
mmc: omap_hsmmc: add tuning support
Signed-off-by: Texas Instruments Auto Merger <lcpd_integration@list.ti.com>
TI-Feature: connectivity
TI-Tree: git://git.ti.com/connectivity-integration-tree/connectivity-ti-linux-kernel.git
TI-Branch: connectivity-ti-linux-3.14.y
* 'connectivity-ti-linux-3.14.y' of git://git.ti.com/connectivity-integration-tree/connectivity-ti-linux-kernel:
ARM: dts: dra72-evm: add evm_3v3_sd regulator
ARM: dts: dra7-evm: add evm_3v3_sd regulator
ARM: dts: dra72-evm: Set max clock frequency of MMC1 and MMC2 to 192MHz
ARM: dts: dra72-evm: Set MMC host controller capability properties
ARM: dts: add pbias-supply
mmc: omap_hsmmc: add voltage switch support for UHS SD card
mmc: omap_hsmmc: add tuning support
Signed-off-by: Texas Instruments Auto Merger <lcpd_integration@list.ti.com>
ARM: dts: dra72-evm: add evm_3v3_sd regulator
Add a node for evm_3v3_sd using pcf which feeds on to mmc power-on.
Update mapping for vmmc-supply and vmmc_aux-supply.
evm_3v3_sd supplies to SD card vdd, and ldo1 to sdcard i/o voltage.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Add a node for evm_3v3_sd using pcf which feeds on to mmc power-on.
Update mapping for vmmc-supply and vmmc_aux-supply.
evm_3v3_sd supplies to SD card vdd, and ldo1 to sdcard i/o voltage.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
ARM: dts: dra7-evm: add evm_3v3_sd regulator
Add a node for evm_3v3_sd using onboard pcf GPIO expander which feeds
on to mmc power-on.
Update mapping for vmmc-supply and vmmc_aux-supply.
evm_3v3_sd supplies to SD card vdd, and ldo1 to sdcard i/o voltage.
Signed-off-by: Balaji T K <balajitk@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Add a node for evm_3v3_sd using onboard pcf GPIO expander which feeds
on to mmc power-on.
Update mapping for vmmc-supply and vmmc_aux-supply.
evm_3v3_sd supplies to SD card vdd, and ldo1 to sdcard i/o voltage.
Signed-off-by: Balaji T K <balajitk@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
ARM: dts: dra72-evm: Set max clock frequency of MMC1 and MMC2 to 192MHz
MMC1 supports SDR104 and MMC2 supports HS200 both of which requires
192MHz clock. Set the maximum operating clock frequency to 192 MHz.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
MMC1 supports SDR104 and MMC2 supports HS200 both of which requires
192MHz clock. Set the maximum operating clock frequency to 192 MHz.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
ARM: dts: dra72-evm: Set MMC host controller capability properties
Added properties in device tree to indicate the MMC controllers support
UHS or HS200.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Added properties in device tree to indicate the MMC controllers support
UHS or HS200.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
ARM: dts: AM4372: Add ti,mbox-send-noirq to wkup_m3 mailbox
Add ti,mbox-send-noirq to wkup_m3 mailbox so that messages using
wkup_m3 mailbox are sent without triggering any further interrupts.
This is required to be able to send multiple messages to the WkupM3
after the mailbox usage logic adjustment in the wkup_m3_ipc driver.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Acked-by: Dave Gerlach <d-gerlach@ti.com>
[s-anna@ti.com: revise commit description]
Signed-off-by: Suman Anna <s-anna@ti.com>
Add ti,mbox-send-noirq to wkup_m3 mailbox so that messages using
wkup_m3 mailbox are sent without triggering any further interrupts.
This is required to be able to send multiple messages to the WkupM3
after the mailbox usage logic adjustment in the wkup_m3_ipc driver.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Acked-by: Dave Gerlach <d-gerlach@ti.com>
[s-anna@ti.com: revise commit description]
Signed-off-by: Suman Anna <s-anna@ti.com>
ARM: dts: AM33XX: Add ti,mbox-send-noirq to wkup_m3 mailbox
Add ti,mbox-send-noirq to wkup_m3 mailbox so that messages using
wkup_m3 mailbox are sent without triggering any further interrupts.
This is needed to achieve lower power numbers during CPU idle on
AM33xx.
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
[s-anna@ti.com: revise commit description]
Signed-off-by: Suman Anna <s-anna@ti.com>
Add ti,mbox-send-noirq to wkup_m3 mailbox so that messages using
wkup_m3 mailbox are sent without triggering any further interrupts.
This is needed to achieve lower power numbers during CPU idle on
AM33xx.
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
[s-anna@ti.com: revise commit description]
Signed-off-by: Suman Anna <s-anna@ti.com>
mailbox/omap: Add ti,mbox-send-noirq quirk to fix AM33xx CPU Idle
The mailbox framework controls the transmission queue and requires
either its controller implementations or clients to run the state
machine for the Tx queue. The OMAP mailbox controller uses a Tx-ready
interrupt as the equivalent of a Tx-done interrupt to run this Tx
queue state-machine.
The WkupM3 processor on AM33xx and AM43xx SoCs is used to offload
certain PM tasks, like doing the necessary operations for Device
PM suspend/resume or for entering lower c-states during cpuidle.
The CPUIdle on AM33xx requires the messages to be sent without
having to trigger the Tx-ready interrupts, as the interrupt
would immediately terminate the CPUIdle operation. Support for
this has been added by introducing a DT quirk, "ti,mbox-send-noirq"
and using it to modify the normal OMAP mailbox controller behavior
on the sub-mailboxes used to communicate with the WkupM3 remote
processor. This also requires the wkup_m3_ipc driver to adjust
its mailbox usage logic to run the Tx state machine.
NOTE:
- AM43xx does not communicate with WkupM3 for CPU Idle, so is
not affected by this behavior. But, it uses the same IPC driver
for PM suspend/resume functionality, so requires the quirk as
well, because of changes to the common wkup_m3_ipc driver.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
[s-anna@ti.com: revise logic and update comments/patch description]
Signed-off-by: Suman Anna <s-anna@ti.com>
The mailbox framework controls the transmission queue and requires
either its controller implementations or clients to run the state
machine for the Tx queue. The OMAP mailbox controller uses a Tx-ready
interrupt as the equivalent of a Tx-done interrupt to run this Tx
queue state-machine.
The WkupM3 processor on AM33xx and AM43xx SoCs is used to offload
certain PM tasks, like doing the necessary operations for Device
PM suspend/resume or for entering lower c-states during cpuidle.
The CPUIdle on AM33xx requires the messages to be sent without
having to trigger the Tx-ready interrupts, as the interrupt
would immediately terminate the CPUIdle operation. Support for
this has been added by introducing a DT quirk, "ti,mbox-send-noirq"
and using it to modify the normal OMAP mailbox controller behavior
on the sub-mailboxes used to communicate with the WkupM3 remote
processor. This also requires the wkup_m3_ipc driver to adjust
its mailbox usage logic to run the Tx state machine.
NOTE:
- AM43xx does not communicate with WkupM3 for CPU Idle, so is
not affected by this behavior. But, it uses the same IPC driver
for PM suspend/resume functionality, so requires the quirk as
well, because of changes to the common wkup_m3_ipc driver.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
[s-anna@ti.com: revise logic and update comments/patch description]
Signed-off-by: Suman Anna <s-anna@ti.com>
TI-Integration: ARM: DRA7: hwmod_data: Fix merge mangling of pcie and pruss data
The commit 8fb3a87 (Merge branch 'rpmsg-ti-linux-3.14.y' of
git://git.ti.com/rpmsg/rpmsg into ti-linux-3.14.y) has added
the pruss class and pruss1 hwmod data in between the pcie
hwmod data during merge conflict resolution. Reorder this
properly to maintain the order maintained in the hwmod data
files.
Signed-off-by: Suman Anna <s-anna@ti.com>
The commit 8fb3a87 (Merge branch 'rpmsg-ti-linux-3.14.y' of
git://git.ti.com/rpmsg/rpmsg into ti-linux-3.14.y) has added
the pruss class and pruss1 hwmod data in between the pcie
hwmod data during merge conflict resolution. Reorder this
properly to maintain the order maintained in the hwmod data
files.
Signed-off-by: Suman Anna <s-anna@ti.com>
Merge branch 'rpmsg-ti-linux-3.14.y' of git://git.ti.com/rpmsg/rpmsg into ti-linux-3.14.y
TI-Feature: rpmsg
TI-Tree: git://git.ti.com/rpmsg/rpmsg.git
TI-Branch: rpmsg-ti-linux-3.14.y
* 'rpmsg-ti-linux-3.14.y' of git://git.ti.com/rpmsg/rpmsg:
ARM: dts: beagle-x15: Enable PRU-ICSS and the child PRU nodes
ARM: DRA7: hwmod_data: Add PRU-ICSS data for AM57xx variants
ARM: dts: beagle-x15: Add mailboxes to the PRU nodes
ARM: dts: DRA7: Add the PRU-ICSS nodes
remoteproc/pruss: add support for PRU-ICSS subsystems on AM57xx SoCs
ARM: dts: beagle-x15: Enable the system mailboxes 3 and 4
ARM: dts: DRA74x: Add sub-mailbox nodes for all PRUSS1 & PRUSS2
Conflicts:
arch/arm/boot/dts/am57xx-beagle-x15.dts
arch/arm/mach-omap2/omap_hwmod_7xx_data.c
Signed-off-by: Dan Murphy <DMurphy@ti.com>
TI-Feature: rpmsg
TI-Tree: git://git.ti.com/rpmsg/rpmsg.git
TI-Branch: rpmsg-ti-linux-3.14.y
* 'rpmsg-ti-linux-3.14.y' of git://git.ti.com/rpmsg/rpmsg:
ARM: dts: beagle-x15: Enable PRU-ICSS and the child PRU nodes
ARM: DRA7: hwmod_data: Add PRU-ICSS data for AM57xx variants
ARM: dts: beagle-x15: Add mailboxes to the PRU nodes
ARM: dts: DRA7: Add the PRU-ICSS nodes
remoteproc/pruss: add support for PRU-ICSS subsystems on AM57xx SoCs
ARM: dts: beagle-x15: Enable the system mailboxes 3 and 4
ARM: dts: DRA74x: Add sub-mailbox nodes for all PRUSS1 & PRUSS2
Conflicts:
arch/arm/boot/dts/am57xx-beagle-x15.dts
arch/arm/mach-omap2/omap_hwmod_7xx_data.c
Signed-off-by: Dan Murphy <DMurphy@ti.com>
ARM: dts: add pbias-supply
Add pbias-supply to mmc1/sd card.
Signed-off-by: Balaji T K <balajitk@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Add pbias-supply to mmc1/sd card.
Signed-off-by: Balaji T K <balajitk@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
mmc: omap_hsmmc: add voltage switch support for UHS SD card
UHS sd card i/o data line can operate at 3V and 1.8V on UHS speed
modes. Add support for signal voltage switch and check for card_busy.
Signed-off-by: Balaji T K <balajitk@ti.com>
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
UHS sd card i/o data line can operate at 3V and 1.8V on UHS speed
modes. Add support for signal voltage switch and check for card_busy.
Signed-off-by: Balaji T K <balajitk@ti.com>
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
mmc: omap_hsmmc: add tuning support
MMC tuning procedure is required to support SD card
UHS1-SDR104 mode and EMMC HS200 mode.
The tuning function omap_execute_tuning() will only
be called by the MMC/SD core if the corresponding
speed modes are supported by the OMAP silicon which
is set in the mmc host "caps" field.
Signed-off-by: Viswanath Puttagunta <vishp@ti.com>
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
[ kishon@ti.com : Set the functional clock to 192MHz if the contoller
supports HS200 ]
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
MMC tuning procedure is required to support SD card
UHS1-SDR104 mode and EMMC HS200 mode.
The tuning function omap_execute_tuning() will only
be called by the MMC/SD core if the corresponding
speed modes are supported by the OMAP silicon which
is set in the mmc host "caps" field.
Signed-off-by: Viswanath Puttagunta <vishp@ti.com>
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
[ kishon@ti.com : Set the functional clock to 192MHz if the contoller
supports HS200 ]
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Merge branch 'connectivity-ti-linux-3.14.y' of git://git.ti.com/connectivity-integration-tree/connectivity-ti-linux-kernel into ti-linux-3.14.y
TI-Feature: connectivity
TI-Tree: git://git.ti.com/connectivity-integration-tree/connectivity-ti-linux-kernel.git
TI-Branch: connectivity-ti-linux-3.14.y
* 'connectivity-ti-linux-3.14.y' of git://git.ti.com/connectivity-integration-tree/connectivity-ti-linux-kernel:
drivers: net: cpsw: add broadcast/multicast rate limit support via switch config ioctl
drivers; net: cpsw: add port vlan support via switch config ioctl
Signed-off-by: Dan Murphy <DMurphy@ti.com>
TI-Feature: connectivity
TI-Tree: git://git.ti.com/connectivity-integration-tree/connectivity-ti-linux-kernel.git
TI-Branch: connectivity-ti-linux-3.14.y
* 'connectivity-ti-linux-3.14.y' of git://git.ti.com/connectivity-integration-tree/connectivity-ti-linux-kernel:
drivers: net: cpsw: add broadcast/multicast rate limit support via switch config ioctl
drivers; net: cpsw: add port vlan support via switch config ioctl
Signed-off-by: Dan Murphy <DMurphy@ti.com>
drivers: net: cpsw: add broadcast/multicast rate limit support via switch config ioctl
Add broadcast/multicast rate limit support via switch config ioctl to
limit the number of broadcast/multicast packets processed by ALE.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Add broadcast/multicast rate limit support via switch config ioctl to
limit the number of broadcast/multicast packets processed by ALE.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
drivers; net: cpsw: add port vlan support via switch config ioctl
Add port vlan support via switch config ioctl to configure port vlan
in the ports to add desired vlan to the packet when an untagged VLAN
packet arrives at the port.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Add port vlan support via switch config ioctl to configure port vlan
in the ports to add desired vlan to the packet when an untagged VLAN
packet arrives at the port.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Merge branch 'rproc-linux-3.14.y' of git://git.ti.com/rpmsg/remoteproc into rpmsg-ti-linux-3.14.y
Pull in the updated remoteproc feature branch that enhances the support
in the PRUSS remoteproc driver to load the PRU cores on the two PRU-ICSS
subsystems present on AM57xx SoCs (on Beagle-X15 board).
* 'rproc-linux-3.14.y' of git://git.ti.com/rpmsg/remoteproc:
ARM: dts: beagle-x15: Enable PRU-ICSS and the child PRU nodes
ARM: DRA7: hwmod_data: Add PRU-ICSS data for AM57xx variants
ARM: dts: beagle-x15: Add mailboxes to the PRU nodes
ARM: dts: DRA7: Add the PRU-ICSS nodes
remoteproc/pruss: add support for PRU-ICSS subsystems on AM57xx SoCs
ARM: dts: beagle-x15: Enable the system mailboxes 3 and 4
ARM: dts: DRA74x: Add sub-mailbox nodes for all PRUSS1 & PRUSS2
Signed-off-by: Suman Anna <s-anna@ti.com>
Pull in the updated remoteproc feature branch that enhances the support
in the PRUSS remoteproc driver to load the PRU cores on the two PRU-ICSS
subsystems present on AM57xx SoCs (on Beagle-X15 board).
* 'rproc-linux-3.14.y' of git://git.ti.com/rpmsg/remoteproc:
ARM: dts: beagle-x15: Enable PRU-ICSS and the child PRU nodes
ARM: DRA7: hwmod_data: Add PRU-ICSS data for AM57xx variants
ARM: dts: beagle-x15: Add mailboxes to the PRU nodes
ARM: dts: DRA7: Add the PRU-ICSS nodes
remoteproc/pruss: add support for PRU-ICSS subsystems on AM57xx SoCs
ARM: dts: beagle-x15: Enable the system mailboxes 3 and 4
ARM: dts: DRA74x: Add sub-mailbox nodes for all PRUSS1 & PRUSS2
Signed-off-by: Suman Anna <s-anna@ti.com>
ARM: dts: beagle-x15: Enable PRU-ICSS and the child PRU nodes
The two PRU-ICSS processor subsystems nodes and their associated
child PRU remote processor nodes were left in disabled state in
the base dra7.dts file. The PRU-ICSSs are supported on only the
AM57xx SoCs, and are now enabled in the supported Beagle-X15
board.
These nodes can be disabled later on if there is no use-case
defined to use that remote PRU core or PRU-ICSS subsystem if
both its PRU cores are unused.
Signed-off-by: Suman Anna <s-anna@ti.com>
The two PRU-ICSS processor subsystems nodes and their associated
child PRU remote processor nodes were left in disabled state in
the base dra7.dts file. The PRU-ICSSs are supported on only the
AM57xx SoCs, and are now enabled in the supported Beagle-X15
board.
These nodes can be disabled later on if there is no use-case
defined to use that remote PRU core or PRU-ICSS subsystem if
both its PRU cores are unused.
Signed-off-by: Suman Anna <s-anna@ti.com>
ARM: DRA7: hwmod_data: Add PRU-ICSS data for AM57xx variants
The AM57xx family of SoCs have two PRU-ICSS remote processor
subsystems, each supporting two PRU processor cores. These
subsystems are not supported on the DRA7 family of SOCs. They
are very similar to the respective processor subsystems on
AM33xx/AM43xx SoCs except for a few differences. The relevant
hwmod classes and data structures have been added for the
PRU-ICSS1 and PRU-ICSS2 subsystems to enable support for
these on the AM57xx SoC variants.
Do note that these subsystems are not supported on the DRA7
do not have a programmable module reset line unlike those
present in AM33xx/AM43xx. The modules are reset just like
any other IP with the SoC's global cold/warm resets.
Signed-off-by: Suman Anna <s-anna@ti.com>
The AM57xx family of SoCs have two PRU-ICSS remote processor
subsystems, each supporting two PRU processor cores. These
subsystems are not supported on the DRA7 family of SOCs. They
are very similar to the respective processor subsystems on
AM33xx/AM43xx SoCs except for a few differences. The relevant
hwmod classes and data structures have been added for the
PRU-ICSS1 and PRU-ICSS2 subsystems to enable support for
these on the AM57xx SoC variants.
Do note that these subsystems are not supported on the DRA7
do not have a programmable module reset line unlike those
present in AM33xx/AM43xx. The modules are reset just like
any other IP with the SoC's global cold/warm resets.
Signed-off-by: Suman Anna <s-anna@ti.com>