2 #ifndef __TAS2562_
3 #define __TAS2562_
6 /* Book Control Register (available in page0 of each book) */
7 #define TAS2562_BOOKCTL_PAGE 0
8 #define TAS2562_BOOKCTL_REG 127
10 #define TAS2562_REG(page, reg) ((page * 128) + reg)
12 /* Page */
13 #define TAS2562_Page TAS2562_REG(0X0, 0x00)
14 #define TAS2562_Page_Page_Mask (0xff << 0)
17 #define TAS2562_BOOK_ID(reg) (reg / (256 * 128))
19 #define TAS2562_PAGE_ID(reg) ((reg % (256 * 128)) / 128)
21 #define TAS2562_BOOK_REG(reg) (reg % (256 * 128))
23 #define TAS2562_PAGE_REG(reg) ((reg % (256 * 128)) % 128)
26 /* Software Reset */
27 #define TAS2562_SoftwareReset TAS2562_REG(0X0, 0x01)
28 #define TAS2562_SoftwareReset_SoftwareReset_Mask (0x1 << 0),
29 #define TAS2562_SoftwareReset_SoftwareReset_DontReset (0x0 << 0)
30 #define TAS2562_SoftwareReset_SoftwareReset_Reset (0x1 << 0)
32 /* Power Control */
33 #define TAS2562_PowerControl TAS2562_REG(0X0, 0x02)
34 #define TAS2562_PowerControl_ISNSPower_Mask (0x1 << 3)
35 #define TAS2562_PowerControl_ISNSPower_Active (0x0 << 3)
36 #define TAS2562_PowerControl_ISNSPower_PoweredDown (0x1 << 3)
37 #define TAS2562_PowerControl_VSNSPower_Mask (0x1 << 2)
38 #define TAS2562_PowerControl_VSNSPower_Active (0x0 << 2)
39 #define TAS2562_PowerControl_VSNSPower_PoweredDown (0x1 << 2)
40 #define TAS2562_PowerControl_OperationalMode10_Mask (0x3 << 0)
41 #define TAS2562_PowerControl_OperationalMode10_Active (0x0 << 0)
42 #define TAS2562_PowerControl_OperationalMode10_Mute (0x1 << 0)
43 #define TAS2562_PowerControl_OperationalMode10_Shutdown (0x2 << 0)
45 /* data format */
46 #define TAS2562_DATAFORMAT_SHIFT 2
47 #define TAS2562_DATAFORMAT_I2S 0x0
48 #define TAS2562_DATAFORMAT_DSP 0x1
49 #define TAS2562_DATAFORMAT_RIGHT_J 0x2
50 #define TAS2562_DATAFORMAT_LEFT_J 0x3
52 #define TAS2562_DAI_FMT_MASK (0x7 << TAS2562_DATAFORMAT_SHIFT)
54 /* Playback Configuration Reg0 */
55 #define TAS2562_PlaybackConfigurationReg0 TAS2562_REG(0X0, 0x03)
56 #define TAS2562_PlaybackConfigurationReg0_PDMPinMapping_Mask (0x1 << 7)
57 #define TAS2562_PlaybackConfigurationReg0_PDMPinMapping_Pdm0 (0x0 << 7)
58 #define TAS2562_PlaybackConfigurationReg0_PDMPinMapping_Pdm1 (0x1 << 7)
59 #define TAS2562_PlaybackConfigurationReg0_PlaybackPDMSource_Mask (0x1 << 6)
60 #define TAS2562_PlaybackConfigurationReg0_PlaybackSource_Mask (0x1 << 5)
61 #define TAS2562_PlaybackConfigurationReg0_PlaybackSource_Pcm (0x0 << 5)
62 #define TAS2562_PlaybackConfigurationReg0_PlaybackSource_Pdm (0x1 << 5)
63 #define TAS2562_PlaybackConfigurationReg0_AmplifierLevel40_Mask (0x1f << 0)
65 /* Misc Configuration Reg0 */
66 #define TAS2562_MiscConfigurationReg0 TAS2562_REG(0X0, 0x04)
67 #define TAS2562_MiscConfigurationReg0_CPPGRetry_Mask (0x1 << 7)
68 #define TAS2562_MiscConfigurationReg0_CPPGRetry_DoNotRetry (0x0 << 7)
69 #define TAS2562_MiscConfigurationReg0_CPPGRetry_Retry (0x1 << 7)
70 #define TAS2562_MiscConfigurationReg0_VBATPRORetry_Mask (0x1 << 6)
71 #define TAS2562_MiscConfigurationReg0_VBATPRORetry_DoNotRetry (0x0 << 6)
72 #define TAS2562_MiscConfigurationReg0_VBATPRORetry_Retry (0x1 << 6)
73 #define TAS2562_MiscConfigurationReg0_OCERetry_Mask (0x1 << 5)
74 #define TAS2562_MiscConfigurationReg0_OCERetry_DoNotRetry (0x0 << 5)
75 #define TAS2562_MiscConfigurationReg0_OCERetry_Retry (0x1 << 5)
76 #define TAS2562_MiscConfigurationReg0_OTERetry_Mask (0x1 << 4)
77 #define TAS2562_MiscConfigurationReg0_OTERetry_DoNotRetry (0x0 << 4)
78 #define TAS2562_MiscConfigurationReg0_OTERetry_Retry (0x1 << 4)
79 #define TAS2562_MiscConfigurationReg0_IRQZPull_Mask (0x1 << 3)
80 #define TAS2562_MiscConfigurationReg0_IRQZPull_Disabled (0x0 << 3)
81 #define TAS2562_MiscConfigurationReg0_IRQZPull_Enabled (0x1 << 3)
82 #define TAS2562_MiscConfigurationReg0_AMPSS_Mask (0x1 << 2)
83 #define TAS2562_MiscConfigurationReg0_AMPSS_Disabled (0x0 << 2)
84 #define TAS2562_MiscConfigurationReg0_AMPSS_Enabled (0x1 << 2)
86 /* TDM Configuration Reg0 */
87 #define TAS2562_TDMConfigurationReg0 TAS2562_REG(0X0, 0x06)
88 #define TAS2562_TDMConfigurationReg0_SAMPRATERAMP_Mask (0x1 << 5)
89 #define TAS2562_TDMConfigurationReg0_SAMPRATERAMP_48KHz (0x0 << 5)
90 #define TAS2562_TDMConfigurationReg0_SAMPRATERAMP_44_1KHz (0x1 << 5)
91 #define TAS2562_TDMConfigurationReg0_DETECTSAMPRATE_Mask (0x1 << 4)
92 #define TAS2562_TDMConfigurationReg0_DETECTSAMPRATE_Disabled (0x1 << 4)
93 #define TAS2562_TDMConfigurationReg0_DETECTSAMPRATE_Enabled (0x0 << 4)
94 #define TAS2562_TDMConfigurationReg0_SAMPRATE31_Mask (0x7 << 1)
95 #define TAS2562_TDMConfigurationReg0_SAMPRATE31_14_7_16kHz (0x1 << 1)
96 #define TAS2562_TDMConfigurationReg0_SAMPRATE31_44_1_48kHz (0x4 << 1)
97 #define TAS2562_TDMConfigurationReg0_SAMPRATE31_88_2_96kHz (0x5 << 1)
98 #define TAS2562_TDMConfigurationReg0_SAMPRATE31_176_4_192kHz (0x6 << 1)
99 #define TAS2562_TDMConfigurationReg0_FRAMESTART_Mask (0x1 << 0)
100 #define TAS2562_TDMConfigurationReg0_FRAMESTART_LowToHigh (0x0 << 0)
101 #define TAS2562_TDMConfigurationReg0_FRAMESTART_HighToLow (0x1 << 0)
103 /* TDM Configuration Reg1 */
104 #define TAS2562_TDMConfigurationReg1 TAS2562_REG(0X0, 0x07)
105 #define TAS2562_TDMConfigurationReg1_RXJUSTIFY_Mask (0x1 << 6)
106 #define TAS2562_TDMConfigurationReg1_RXJUSTIFY_Left (0x0 << 6)
107 #define TAS2562_TDMConfigurationReg1_RXJUSTIFY_Right (0x1 << 6)
108 #define TAS2562_TDMConfigurationReg1_RXOFFSET51_Mask (0x1f << 1)
109 #define TAS2562_TDMConfigurationReg1_RXOFFSET51_Shift (1)
110 #define TAS2562_TDMConfigurationReg1_RXEDGE_Mask (0x1 << 0)
111 #define TAS2562_TDMConfigurationReg1_RXEDGE_Rising (0x0 << 0)
112 #define TAS2562_TDMConfigurationReg1_RXEDGE_Falling (0x1 << 0)
114 /* TDM Configuration Reg2 */
115 #define TAS2562_TDMConfigurationReg2 TAS2562_REG(0X0, 0x08)
116 #define TAS2562_TDMConfigurationReg2_RXSCFG54_Mask (0x3 << 4)
117 #define TAS2562_TDMConfigurationReg2_RXSCFG54_Mono_I2C (0x0 << 4),
118 #define TAS2562_TDMConfigurationReg2_RXSCFG54_Mono_Left (0x1 << 4),
119 #define TAS2562_TDMConfigurationReg2_RXSCFG54_Mono_Right (0x2 << 4)
120 #define TAS2562_TDMConfigurationReg2_RXSCFG54_Stereo_DownMix (0x3 << 4)
121 #define TAS2562_TDMConfigurationReg2_RXWLEN32_Mask (0x3 << 2)
122 #define TAS2562_TDMConfigurationReg2_RXWLEN32_16Bits (0x0 << 2)
123 #define TAS2562_TDMConfigurationReg2_RXWLEN32_20Bits (0x1 << 2)
124 #define TAS2562_TDMConfigurationReg2_RXWLEN32_24Bits (0x2 << 2)
125 #define TAS2562_TDMConfigurationReg2_RXWLEN32_32Bits (0x3 << 2)
126 #define TAS2562_TDMConfigurationReg2_RXSLEN10_Mask (0x3 << 0)
127 #define TAS2562_TDMConfigurationReg2_RXSLEN10_16Bits (0x0 << 0)
128 #define TAS2562_TDMConfigurationReg2_RXSLEN10_24Bits (0x1 << 0)
129 #define TAS2562_TDMConfigurationReg2_RXSLEN10_32Bits (0x2 << 0)
131 /* TDM Configuration Reg3 */
132 #define TAS2562_TDMConfigurationReg3 TAS2562_REG(0X0, 0x09)
133 #define TAS2562_TDMConfigurationReg3_RXSLOTRight74_Mask (0xf << 4)
134 #define TAS2562_TDMConfigurationReg3_RXSLOTLeft30_Mask (0xf << 0)
136 /* TDM Configuration Reg4 */
137 #define TAS2562_TDMConfigurationReg4 TAS2562_REG(0X0, 0x0A)
138 #define TAS2562_TDMConfigurationReg4_TXKEEPER_Mask (0x1 << 5)
139 #define TAS2562_TDMConfigurationReg4_TXKEEPER_Disable (0x0 << 5)
140 #define TAS2562_TDMConfigurationReg4_TXKEEPER_Enable (0x1 << 5)
141 #define TAS2562_TDMConfigurationReg4_TXFILL_Mask (0x1 << 4)
142 #define TAS2562_TDMConfigurationReg4_TXFILL_Transmit0 (0x0 << 4)
143 #define TAS2562_TDMConfigurationReg4_TXFILL_TransmitHiz (0x1 << 4)
144 #define TAS2562_TDMConfigurationReg4_TXOFFSET31_Mask (0x7 << 1)
145 #define TAS2562_TDMConfigurationReg4_TXEDGE_Mask (0x1 << 0)
146 #define TAS2562_TDMConfigurationReg4_TXEDGE_Rising (0x0 << 0)
147 #define TAS2562_TDMConfigurationReg4_TXEDGE_Falling (0x1 << 0)
149 /* TDM Configuration Reg5 */
150 #define TAS2562_TDMConfigurationReg5 TAS2562_REG(0X0, 0x0B)
151 #define TAS2562_TDMConfigurationReg5_VSNSTX_Mask (0x1 << 6)
152 #define TAS2562_TDMConfigurationReg5_VSNSTX_Disable (0x0 << 6),
153 #define TAS2562_TDMConfigurationReg5_VSNSTX_Enable (0x1 << 6),
154 #define TAS2562_TDMConfigurationReg5_VSNSSLOT50_Mask (0x3f << 0)
156 /* TDM Configuration Reg6 */
157 #define TAS2562_TDMConfigurationReg6 TAS2562_REG(0X0, 0x0C)
158 #define TAS2562_TDMConfigurationReg6_ISNSTX_Mask (0x1 << 6)
159 #define TAS2562_TDMConfigurationReg6_ISNSTX_Disable (0x0 << 6),
160 #define TAS2562_TDMConfigurationReg6_ISNSTX_Enable (0x1 << 6),
161 #define TAS2562_TDMConfigurationReg6_ISNSSLOT50_Mask (0x3f << 0)
163 /* TDM Configuration Reg7 */
164 #define TAS2562_TDMConfigurationReg7 TAS2562_REG(0X0, 0x0D)
165 #define TAS2562_TDMConfigurationReg7_VBATSLEN_Mask (0x1 << 7)
166 #define TAS2562_TDMConfigurationReg7_VBATSLEN_8Bits (0x0 << 7)
167 #define TAS2562_TDMConfigurationReg7_VBATSLEN_16Bits (0x1 << 7)
168 #define TAS2562_TDMConfigurationReg7_VBATTX_Mask (0x1 << 6)
169 #define TAS2562_TDMConfigurationReg7_VBATTX_Disable (0x0 << 6)
170 #define TAS2562_TDMConfigurationReg7_VBATTX_Enable (0x1 << 6)
171 #define TAS2562_TDMConfigurationReg7_VBATSLOT50_Mask (0x3f << 0)
173 /* TDM Configuration Reg8 */
174 #define TAS2562_TDMConfigurationReg8 TAS2562_REG(0X0, 0x0E)
175 #define TAS2562_TDMConfigurationReg8_TEMPTX_Mask (0x1 << 6)
176 #define TAS2562_TDMConfigurationReg8_TEMPTX_Disable (0x0 << 6)
177 #define TAS2562_TDMConfigurationReg8_TEMPTX_Enable (0x1 << 6)
178 #define TAS2562_TDMConfigurationReg8_TEMPSLOT50_Mask (0x3f << 0)
180 /* TDM Configuration Reg9 */
181 #define TAS2562_TDMConfigurationReg9 TAS2562_REG(0X0, 0x0F)
182 #define TAS2562_TDMConfigurationReg9_GAINTX_Mask (0x1 << 6)
183 #define TAS2562_TDMConfigurationReg9_GAINTX_Disable (0x0 << 6)
184 #define TAS2562_TDMConfigurationReg9_GAINTX_Enable (0x1 << 6)
185 #define TAS2562_TDMConfigurationReg9_GAINSLOT50_Mask (0x3f << 0)
187 /* Limiter Configuration Reg0 */
188 #define TAS2562_LimiterConfigurationReg0 TAS2562_REG(0X0, 0x12)
189 #define TAS2562_LimiterConfigurationReg0_LIMATKST54_Mask (0x3 << 4)
190 #define TAS2562_LimiterConfigurationReg0_LIMATKST54_1 (0x2 << 4)
191 #define TAS2562_LimiterConfigurationReg0_LIMATKST54_2 (0x3 << 4)
192 #define TAS2562_LimiterConfigurationReg0_LIMATKST54_0_25 (0x0 << 4)
193 #define TAS2562_LimiterConfigurationReg0_LIMATKST54_0_5 (0x1 << 4)
194 #define TAS2562_LimiterConfigurationReg0_LIMATKRT31_Mask (0x7 << 1)
195 #define TAS2562_LimiterConfigurationReg0_LIMATKRT31_5 (0x0 << 1)
196 #define TAS2562_LimiterConfigurationReg0_LIMATKRT31_10 (0x1 << 1)
197 #define TAS2562_LimiterConfigurationReg0_LIMATKRT31_20 (0x2 << 1)
198 #define TAS2562_LimiterConfigurationReg0_LIMATKRT31_40 (0x3 << 1)
199 #define TAS2562_LimiterConfigurationReg0_LIMATKRT31_80 (0x4 << 1)
200 #define TAS2562_LimiterConfigurationReg0_LIMATKRT31_160 (0x5 << 1)
201 #define TAS2562_LimiterConfigurationReg0_LIMATKRT31_320 (0x6 << 1)
202 #define TAS2562_LimiterConfigurationReg0_LIMATKRT31_640 (0x7 << 1)
203 #define TAS2562_LimiterConfigurationReg0_LIMEN_Mask (0x1 << 0)
204 #define TAS2562_LimiterConfigurationReg0_LIMEN_Disabled (0x0 << 0)
205 #define TAS2562_LimiterConfigurationReg0_LIMEN_Enabled (0x1 << 0)
207 /* Limiter Configuration Reg1 */
208 #define TAS2562_LimiterConfigurationReg1 TAS2562_REG(0X0, 0x13)
209 #define TAS2562_LimiterConfigurationReg1_LIMRLSST76_Mask (0x3 << 6)
210 #define TAS2562_LimiterConfigurationReg1_LIMRLSST76_1 (0x2 << 6)
211 #define TAS2562_LimiterConfigurationReg1_LIMRLSST76_2 (0x3 << 6)
212 #define TAS2562_LimiterConfigurationReg1_LIMRLSST76_0_25 (0x0 << 6)
213 #define TAS2562_LimiterConfigurationReg1_LIMRLSST76_0_5 (0x1 << 6)
214 #define TAS2562_LimiterConfigurationReg1_LIMRLSRT53_Mask (0x7 << 3)
215 #define TAS2562_LimiterConfigurationReg1_LIMRLSRT53_10 (0x0 << 3)
216 #define TAS2562_LimiterConfigurationReg1_LIMRLSRT53_50 (0x1 << 3)
217 #define TAS2562_LimiterConfigurationReg1_LIMRLSRT53_100 (0x2 << 3)
218 #define TAS2562_LimiterConfigurationReg1_LIMRLSRT53_250 (0x3 << 3)
219 #define TAS2562_LimiterConfigurationReg1_LIMRLSRT53_500 (0x4 << 3)
220 #define TAS2562_LimiterConfigurationReg1_LIMRLSRT53_750 (0x5 << 3)
221 #define TAS2562_LimiterConfigurationReg1_LIMRLSRT53_1000 (0x6 << 3)
222 #define TAS2562_LimiterConfigurationReg1_LIMRLSRT53_1500 (0x7 << 3)
223 #define TAS2562_LimiterConfigurationReg1_LIMHLDTM20_Mask (0x7 << 0)
224 #define TAS2562_LimiterConfigurationReg1_LIMHLDTM20_0 (0x0 << 0)
225 #define TAS2562_LimiterConfigurationReg1_LIMHLDTM20_10 (0x1 << 0)
226 #define TAS2562_LimiterConfigurationReg1_LIMHLDTM20_25 (0x2 << 0)
227 #define TAS2562_LimiterConfigurationReg1_LIMHLDTM20_50 (0x3 << 0)
228 #define TAS2562_LimiterConfigurationReg1_LIMHLDTM20_100 (0x4 << 0)
229 #define TAS2562_LimiterConfigurationReg1_LIMHLDTM20_250 (0x5 << 0)
230 #define TAS2562_LimiterConfigurationReg1_LIMHLDTM20_500 (0x6 << 0)
231 #define TAS2562_LimiterConfigurationReg1_LIMHLDTM20_1000 (0x7 << 0)
233 /* Brown Out Prevention Reg0 */
234 #define TAS2562_BrownOutPreventionReg0 TAS2562_REG(0X0, 0x14)
235 #define TAS2562_BrownOutPreventionReg0_BOPSDEN_Mask (0x1 << 4)
236 #define TAS2562_BrownOutPreventionReg0_BOPSDEN_Disabled (0x0 << 4)
237 #define TAS2562_BrownOutPreventionReg0_BOPSDEN_Enabled (0x1 << 4)
238 #define TAS2562_BrownOutPreventionReg0_BOPHLDCLR_Mask (0x1 << 3)
239 #define TAS2562_BrownOutPreventionReg0_BOPHLDCLR_DontClear (0x0 << 3)
240 #define TAS2562_BrownOutPreventionReg0_BOPHLDCLR_Clear (0x1 << 3)
241 #define TAS2562_BrownOutPreventionReg0_BOPINFHLD_Mask (0x1 << 2)
242 #define TAS2562_BrownOutPreventionReg0_BOPINFHLD_UseHoldTime (0x0 << 2)
243 #define TAS2562_BrownOutPreventionReg0_BOPINFHLD_HoldUntilCleared (0x1 << 2)
244 #define TAS2562_BrownOutPreventionReg0_BOPMUTE_Mask (0x1 << 1)
245 #define TAS2562_BrownOutPreventionReg0_BOPMUTE_DoNotMute (0x0 << 1)
246 #define TAS2562_BrownOutPreventionReg0_BOPMUTE_Mute (0x1 << 1)
247 #define TAS2562_BrownOutPreventionReg0_BOPEN_Mask (0x1 << 0)
248 #define TAS2562_BrownOutPreventionReg0_BOPEN_Disabled (0x0 << 0)
249 #define TAS2562_BrownOutPreventionReg0_BOPEN_Enabled (0x1 << 0)
251 /* Brown Out Prevention Reg1 */
252 #define TAS2562_BrownOutPreventionReg1 TAS2562_REG(0X0, 0x15)
253 #define TAS2562_BrownOutPreventionReg1_BOPATKRT75_Mask (0x7 << 5)
254 #define TAS2562_BrownOutPreventionReg1_BOPATKRT75_1 (0x0 << 5)
255 #define TAS2562_BrownOutPreventionReg1_BOPATKRT75_2 (0x1 << 5)
256 #define TAS2562_BrownOutPreventionReg1_BOPATKRT75_4 (0x2 << 5)
257 #define TAS2562_BrownOutPreventionReg1_BOPATKRT75_8 (0x3 << 5)
258 #define TAS2562_BrownOutPreventionReg1_BOPATKRT75_16 (0x4 << 5)
259 #define TAS2562_BrownOutPreventionReg1_BOPATKRT75_32 (0x5 << 5)
260 #define TAS2562_BrownOutPreventionReg1_BOPATKRT75_64 (0x6 << 5)
261 #define TAS2562_BrownOutPreventionReg1_BOPATKRT75_128 (0x7 << 5)
262 #define TAS2562_BrownOutPreventionReg1_BOPATKST43_Mask (0x3 << 3)
263 #define TAS2562_BrownOutPreventionReg1_BOPATKST43_1 (0x1 << 3)
264 #define TAS2562_BrownOutPreventionReg1_BOPATKST43_2 (0x3 << 3)
265 #define TAS2562_BrownOutPreventionReg1_BOPATKST43_0_5 (0x0 << 3)
266 #define TAS2562_BrownOutPreventionReg1_BOPATKST43_1_5 (0x2 << 3)
267 #define TAS2562_BrownOutPreventionReg1_BOPHLDTM20_Mask (0x7 << 0)
268 #define TAS2562_BrownOutPreventionReg1_BOPHLDTM20_0 (0x0 << 0)
269 #define TAS2562_BrownOutPreventionReg1_BOPHLDTM20_10 (0x1 << 0)
270 #define TAS2562_BrownOutPreventionReg1_BOPHLDTM20_25 (0x2 << 0)
271 #define TAS2562_BrownOutPreventionReg1_BOPHLDTM20_50 (0x3 << 0)
272 #define TAS2562_BrownOutPreventionReg1_BOPHLDTM20_100 (0x4 << 0)
273 #define TAS2562_BrownOutPreventionReg1_BOPHLDTM20_250 (0x5 << 0)
274 #define TAS2562_BrownOutPreventionReg1_BOPHLDTM20_500 (0x6 << 0)
275 #define TAS2562_BrownOutPreventionReg1_BOPHLDTM20_1000 (0x7 << 0
277 /* Interrupt Mask Reg0 */
278 #define TAS2562_InterruptMaskReg0 TAS2562_REG(0X0, 0x1A)
279 #define TAS2562_InterruptMaskReg0_LIMMUTEINTMASK_Mask (0x1 << 7)
280 #define TAS2562_InterruptMaskReg0_LIMMUTEINTMASK_Unmask (0x0 << 7)
281 #define TAS2562_InterruptMaskReg0_LIMMUTEINTMASK_Disable (0x1 << 7)
282 #define TAS2562_InterruptMaskReg0_LIMINFHLDINTMASK_Mask (0x1 << 6)
283 #define TAS2562_InterruptMaskReg0_LIMINFHLDINTMASK_Unmask (0x0 << 6)
284 #define TAS2562_InterruptMaskReg0_LIMINFHLDINTMASK_Disable (0x1 << 6)
285 #define TAS2562_InterruptMaskReg0_LIMMAXATNINTMASK_Mask (0x1 << 5)
286 #define TAS2562_InterruptMaskReg0_LIMMAXATNINTMASK_Unmask (0x0 << 5)
287 #define TAS2562_InterruptMaskReg0_LIMMAXATNINTMASK_Disable (0x1 << 5)
288 #define TAS2562_InterruptMaskReg0_VBATLessthanINFINTMASK_Mask (0x1 << 4)
289 #define TAS2562_InterruptMaskReg0_VBATLessthanINFINTMASK_Unmask (0x0 << 4)
290 #define TAS2562_InterruptMaskReg0_VBATLessthanINFINTMASK_Disable (0x1 << 4)
291 #define TAS2562_InterruptMaskReg0_LIMActiveFlagINTMASK_Mask (0x1 << 3)
292 #define TAS2562_InterruptMaskReg0_LIMActiveFlagINTMASK_Unmask (0x0 << 3)
293 #define TAS2562_InterruptMaskReg0_LIMActiveFlagINTMASK_Disable (0x1 << 3)
294 #define TAS2562_InterruptMaskReg0_TDMClockErrorINTMASK_Mask (0x1 << 2)
295 #define TAS2562_InterruptMaskReg0_TDMClockErrorINTMASK_Unmask (0x0 << 2)
296 #define TAS2562_InterruptMaskReg0_TDMClockErrorINTMASK_Disable (0x1 << 2)
297 #define TAS2562_InterruptMaskReg0_OCEINTMASK_Mask (0x1 << 1)
298 #define TAS2562_InterruptMaskReg0_OCEINTMASK_Unmask (0x0 << 1)
299 #define TAS2562_InterruptMaskReg0_OCEINTMASK_Disable (0x1 << 1)
300 #define TAS2562_InterruptMaskReg0_OTEINTMASK_Mask (0x1 << 0)
301 #define TAS2562_InterruptMaskReg0_OTEINTMASK_Unmask (0x0 << 0)
302 #define TAS2562_InterruptMaskReg0_OTEINTMASK_Disable (0x1 << 0)
303 #define TAS2562_InterruptMaskReg0_Disable 0xff
305 /* Interrupt Mask Reg1 */
306 #define TAS2562_InterruptMaskReg1 TAS2562_REG(0X0, 0x1B)
307 #define TAS2562_InterruptMaskReg1_DSPOUTPUTINTMASK_Mask (0x1 << 7)
308 #define TAS2562_InterruptMaskReg1_DSPOUTPUTINTMASK_Unmask (0x0 << 7)
309 #define TAS2562_InterruptMaskReg1_DSPOUTPUTINTMASK_Disable (0x1 << 7)
310 #define TAS2562_InterruptMaskReg1_CRCINTMASK_Mask (0x1 << 6)
311 #define TAS2562_InterruptMaskReg1_CRCINTMASK_Unmask (0x0 << 6)
312 #define TAS2562_InterruptMaskReg1_CRCINTMASK_Disable (0x1 << 6)
313 #define TAS2562_InterruptMaskReg1_VBATOVLOINTMASK_Mask (0x1 << 2)
314 #define TAS2562_InterruptMaskReg1_VBATOVLOINTMASK_Unmask (0x0 << 2)
315 #define TAS2562_InterruptMaskReg1_VBATOVLOINTMASK_Disable (0x1 << 2)
316 #define TAS2562_InterruptMaskReg1_VBATUVLOINTMASK_Mask (0x1 << 1)
317 #define TAS2562_InterruptMaskReg1_VBATUVLOINTMASK_Unmask (0x0 << 1)
318 #define TAS2562_InterruptMaskReg1_VBATUVLOINTMASK_Disable (0x1 << 1)
319 #define TAS2562_InterruptMaskReg1_BrownOutFlagINTMASK_Mask (0x1 << 0)
320 #define TAS2562_InterruptMaskReg1_BrownOutFlagINTMASK_Unmask (0x0 << 0)
321 #define TAS2562_InterruptMaskReg1_BrownOutFlagINTMASK_Disable (0x1 << 0)
322 #define TAS2562_InterruptMaskReg1_Disable 0xff
324 /* Interrupt Mask Reg2 */
325 #define TAS2562_InterruptMaskReg2 TAS2562_REG(0X0, 0x1C)
326 #define TAS2562_InterruptMaskReg2_DACLKINTMASK_Mask (0x1 << 7)
327 #define TAS2562_InterruptMaskReg2_DACLKINTMASK_Unmask (0x0 << 7)
328 #define TAS2562_InterruptMaskReg2_DACLKINTMASK_Disable (0x1 << 7)
329 #define TAS2562_InterruptMaskReg2_BSTCLKINTMASK_Mask (0x1 << 6)
330 #define TAS2562_InterruptMaskReg2_BSTCLKINTMASK_Unmask (0x0 << 6)
331 #define TAS2562_InterruptMaskReg2_BSTCLKINTMASK_Disable (0x1 << 6)
332 #define TAS2562_InterruptMaskReg2_VBATPORCLKINTMASK_Mask (0x1 << 5)
333 #define TAS2562_InterruptMaskReg2_VBATPORCLKINTMASK_Unmask (0x0 << 5)
334 #define TAS2562_InterruptMaskReg2_VBATPORCLKINTMASK_Disable (0x1 << 5)
335 #define TAS2562_InterruptMaskReg2_PLLOCKINTMASK_Mask (0x1 << 4)
336 #define TAS2562_InterruptMaskReg2_PLLOCKINTMASK_Unmask (0x0 << 4)
337 #define TAS2562_InterruptMaskReg2_PLLOCKINTMASK_Disable (0x1 << 4)
338 #define TAS2562_InterruptMaskReg2_DCDETECTINTMASK_Mask (0x1 << 3)
339 #define TAS2562_InterruptMaskReg2_DCDETECTINTMASK_Unmask (0x0 << 3)
340 #define TAS2562_InterruptMaskReg2_DCDETECTINTMASK_Disable (0x1 << 3)
342 /* Live-Interrupt Reg0 */
343 #define TAS2562_LiveInterruptReg0 TAS2562_REG(0X0, 0x1F)
344 #define TAS2562_LiveInterruptReg0_LIMMUTE_Mask (0x1 << 7)
345 #define TAS2562_LiveInterruptReg0_LIMMUTE_NoInterrupt (0x0 << 7)
346 #define TAS2562_LiveInterruptReg0_LIMMUTE_Interrupt (0x1 << 7)
347 #define TAS2562_LiveInterruptReg0_LIMINFHLD_Mask (0x1 << 6)
348 #define TAS2562_LiveInterruptReg0_LIMINFHLD_NoInterrupt (0x0 << 6)
349 #define TAS2562_LiveInterruptReg0_LIMINFHLD_Interrupt (0x1 << 6)
350 #define TAS2562_LiveInterruptReg0_LIMMAXATN_Mask (0x1 << 5)
351 #define TAS2562_LiveInterruptReg0_LIMMAXATN_NoInterrupt (0x0 << 5)
352 #define TAS2562_LiveInterruptReg0_LIMMAXATN_Interrupt (0x1 << 5)
353 #define TAS2562_LiveInterruptReg0_VBATLessthanINF_Mask (0x1 << 4)
354 #define TAS2562_LiveInterruptReg0_VBATLessthanINF_NoInterrupt (0x0 << 4)
355 #define TAS2562_LiveInterruptReg0_VBATLessthanINF_Interrupt (0x1 << 4)
356 #define TAS2562_LiveInterruptReg0_LIMActiveFlag_Mask (0x1 << 3)
357 #define TAS2562_LiveInterruptReg0_LIMActiveFlag_NoInterrupt (0x0 << 3)
358 #define TAS2562_LiveInterruptReg0_LIMActiveFlag_Interrupt (0x1 << 3)
359 #define TAS2562_LiveInterruptReg0_TDMClockError_Mask (0x1 << 2)
360 #define TAS2562_LiveInterruptReg0_TDMClockError_NoInterrupt (0x0 << 2)
361 #define TAS2562_LiveInterruptReg0_TDMClockError_Interrupt (0x1 << 2)
362 #define TAS2562_LiveInterruptReg0_OCEFlag_Mask (0x1 << 1)
363 #define TAS2562_LiveInterruptReg0_OCEFlag_NoInterrupt (0x0 << 1)
364 #define TAS2562_LiveInterruptReg0_OCEFlag_Interrupt (0x1 << 1)
365 #define TAS2562_LiveInterruptReg0_OTEFlag_Mask (0x1 << 0)
366 #define TAS2562_LiveInterruptReg0_OTEFlag_NoInterrupt (0x0 << 0)
367 #define TAS2562_LiveInterruptReg0_OTEFlag_Interrupt (0x1 << 0)
369 /* Live-Interrupt Reg1 */
370 #define TAS2562_LiveInterruptReg1 TAS2562_REG(0X0, 0x20)
371 #define TAS2562_LiveInterruptReg1_DSPINTOutput_Mask (0x1 << 7)
372 #define TAS2562_LiveInterruptReg1_DSPINTOutput_NoInterrupt (0x0 << 7)
373 #define TAS2562_LiveInterruptReg1_DSPINTOutput_Interrupt (0x1 << 7)
374 #define TAS2562_LiveInterruptReg1_OTPCRC_Mask (0x1 << 6)
375 #define TAS2562_LiveInterruptReg1_OTPCRC_NoInterrupt (0x0 << 6)
376 #define TAS2562_LiveInterruptReg1_OTPCRC_Interrupt (0x1 << 6)
377 #define TAS2562_LiveInterruptReg1_BrownOutFlag_Mask (0x1 << 1)
378 #define TAS2562_LiveInterruptReg1_BrownOutFlag_NoInterrupt (0x0 << 1)
379 #define TAS2562_LiveInterruptReg1_BrownOutFlag_Interrupt (0x1 << 1)
380 #define TAS2562_LiveInterruptReg1_BrownOutDetected_Mask (0x1 << 1)
381 #define TAS2562_LiveInterruptReg1_BrownOutDetected_NoInterrupt (0x0 << 1)
382 #define TAS2562_LiveInterruptReg1_BrownOutDetected_Interrupt (0x1 << 1)
384 /* Latched-Interrupt Reg0 */
385 #define TAS2562_LatchedInterruptReg0 TAS2562_REG(0X0, 0x24)
386 #define TAS2562_LatchedInterruptReg0_LIMMUTESticky_Mask (0x1 << 7)
387 #define TAS2562_LatchedInterruptReg0_LIMMUTESticky_NoInterrupt (0x0 << 7)
388 #define TAS2562_LatchedInterruptReg0_LIMMUTESticky_Interrupt (0x1 << 7)
389 #define TAS2562_LatchedInterruptReg0_LIMINFHLDSticky_Mask (0x1 << 6)
390 #define TAS2562_LatchedInterruptReg0_LIMINFHLDSticky_NoInterrupt (0x0 << 6)
391 #define TAS2562_LatchedInterruptReg0_LIMINFHLDSticky_Interrupt (0x1 << 6)
392 #define TAS2562_LatchedInterruptReg0_LIMMAXATNSticky_Mask (0x1 << 5)
393 #define TAS2562_LatchedInterruptReg0_LIMMAXATNSticky_NoInterrupt (0x0 << 5)
394 #define TAS2562_LatchedInterruptReg0_LIMMAXATNSticky_Interrupt (0x1 << 5)
395 #define TAS2562_LatchedInterruptReg0_VBATLessthanINFSticky_Mask (0x1 << 4)
396 #define TAS2562_LatchedInterruptReg0_VBATLessthanINFSticky_NoInterrupt \
397 (0x0 << 4)
398 #define TAS2562_LatchedInterruptReg0_VBATLessthanINFSticky_Interrupt (0x1 << 4)
399 #define TAS2562_LatchedInterruptReg0_LIMActiveFlagSticky_Mask (0x1 << 3)
400 #define TAS2562_LatchedInterruptReg0_LIMActiveFlagSticky_NoInterrupt (0x0 << 3)
401 #define TAS2562_LatchedInterruptReg0_LIMActiveFlagSticky_Interrupt (0x1 << 3)
402 #define TAS2562_LatchedInterruptReg0_TDMClockErrorSticky_Mask (0x1 << 2)
403 #define TAS2562_LatchedInterruptReg0_TDMClockErrorSticky_NoInterrupt (0x0 << 2)
404 #define TAS2562_LatchedInterruptReg0_TDMClockErrorSticky_Interrupt (0x1 << 2)
405 #define TAS2562_LatchedInterruptReg0_OCEFlagSticky_Mask (0x1 << 1)
406 #define TAS2562_LatchedInterruptReg0_OCEFlagSticky_NoInterrupt (0x0 << 1)
407 #define TAS2562_LatchedInterruptReg0_OCEFlagSticky_Interrupt (0x1 << 1)
408 #define TAS2562_LatchedInterruptReg0_OTEFlagSticky_Mask (0x1 << 0)
409 #define TAS2562_LatchedInterruptReg0_OTEFlagSticky_NoInterrupt (0x0 << 0)
410 #define TAS2562_LatchedInterruptReg0_OTEFlagSticky_Interrupt (0x1 << 0)
412 /* Latched-Interrupt Reg1 */
413 #define TAS2562_LatchedInterruptReg1 TAS2562_REG(0X0, 0x25)
414 #define TAS2562_LatchedInterruptReg1_PDMAUDDATAINVALIDSticky_Mask (0x1 << 7)
415 #define TAS2562_LatchedInterruptReg1_PDMAUDDATAINVALIDSticky_NoInterrupt \
416 (0x0 << 7)
417 #define TAS2562_LatchedInterruptReg1_PDMAUDDATAINVALIDSticky_Interrupt \
418 (0x1 << 7)
419 #define TAS2562_LatchedInterruptReg1_VBATOVLOSticky_Mask (0x1 << 3)
420 #define TAS2562_LatchedInterruptReg1_VBATOVLOSticky_NoInterrupt (0x0 << 3)
421 #define TAS2562_LatchedInterruptReg1_VBATOVLOSticky_Interrupt (0x1 << 3)
422 #define TAS2562_LatchedInterruptReg1_VBATUVLOSticky_Mask (0x1 << 2)
423 #define TAS2562_LatchedInterruptReg1_VBATUVLOSticky_NoInterrupt (0x0 << 2)
424 #define TAS2562_LatchedInterruptReg1_VBATUVLOSticky_Interrupt (0x1 << 2)
425 #define TAS2562_LatchedInterruptReg1_BrownOutFlagSticky_Mask (0x1 << 1)
426 #define TAS2562_LatchedInterruptReg1_BrownOutFlagSticky_NoInterrupt (0x0 << 1)
427 #define TAS2562_LatchedInterruptReg1_BrownOutFlagSticky_Interrupt (0x1 << 1)
428 #define TAS2562_LatchedInterruptReg1_PDMClockErrorSticky_Mask (0x1 << 0)
429 #define TAS2562_LatchedInterruptReg1_PDMClockErrorSticky_NoInterrupt (0x0 << 0)
430 #define TAS2562_LatchedInterruptReg1_PDMClockErrorSticky_Interrupt (0x1 << 0)
432 /* VBAT MSB */
433 #define TAS2562_VBATMSB TAS2562_REG(0X0, 0x2A)
434 #define TAS2562_VBATMSB_VBATMSB70_Mask (0xff << 0)
436 /* VBAT LSB */
437 #define TAS2562_VBATLSB TAS2562_REG(0X0, 0x2B)
438 #define TAS2562_VBATLSB_VBATLSB74_Mask (0xf << 4)
440 /* TEMP */
441 #define TAS2562_TEMP TAS2562_REG(0X0, 0x2C)
442 #define TAS2562_TEMP_TEMPMSB70_Mask (0xff << 0)
445 /* Interrupt Configuration */
446 #define TAS2562_InterruptConfiguration TAS2562_REG(0X0, 0x30)
447 #define TAS2562_InterruptConfiguration_LTCHINTClear_Mask (0x1 << 2)
448 #define TAS2562_InterruptConfiguration_LTCHINTClear (0x1 << 2)
449 #define TAS2562_InterruptConfiguration_PININTConfig10_Mask (0x3 << 0)
450 #define TAS2562_InterruptConfiguration_PININTConfig10_AssertOnLiveInterrupts \
451 (0x0 << 0)
452 #define \
453 TAS2562_InterruptConfiguration_PININTConfig10_AssertOnLatchedInterrupts \
454 (0x1 << 0)
455 #define \
456 TAS2562_InterruptConfiguration_PININTConfig10_Assert2msOnLiveInterrupts \
457 (0x2 << 0)
458 #define \
459 TAS2562_InterruptConfiguration_PININTConfig10_Assert2msOnLatchedInterrupts \
460 (0x3 << 0)
462 /* Digital Input Pin Pull Down */
463 #define TAS2562_DigitalInputPinPullDown TAS2562_REG(0X0, 0x31)
464 #define TAS2562_DigitalInputPinPullDown_WKPulldownSDOUT_Mask (0x1 << 7)
465 #define TAS2562_DigitalInputPinPullDown_WKPulldownSDOUT_Disabled (0x0 << 7)
466 #define TAS2562_DigitalInputPinPullDown_WKPulldownSDOUT_Enabled (0x1 << 7)
467 #define TAS2562_DigitalInputPinPullDown_WKPulldownSDIN_Mask (0x1 << 6)
468 #define TAS2562_DigitalInputPinPullDown_WKPulldownSDIN_Disabled (0x0 << 6)
469 #define TAS2562_DigitalInputPinPullDown_WKPulldownSDIN_Enabled (0x1 << 6)
470 #define TAS2562_DigitalInputPinPullDown_WKPulldownFSYNC_Mask (0x1 << 5)
471 #define TAS2562_DigitalInputPinPullDown_WKPulldownFSYNC_Disabled (0x0 << 5)
472 #define TAS2562_DigitalInputPinPullDown_WKPulldownFSYNC_Enabled (0x1 << 5)
473 #define TAS2562_DigitalInputPinPullDown_WKPulldownSBCLK_Mask (0x1 << 4)
474 #define TAS2562_DigitalInputPinPullDown_WKPulldownSBCLK_Disabled (0x0 << 4)
475 #define TAS2562_DigitalInputPinPullDown_WKPulldownSBCLK_Enabled (0x1 << 4)
476 #define TAS2562_DigitalInputPinPullDown_WKPulldownPDMD0_Mask (0x1 << 3)
477 #define TAS2562_DigitalInputPinPullDown_WKPulldownPDMD0_Disabled (0x0 << 3)
478 #define TAS2562_DigitalInputPinPullDown_WKPulldownPDMD0_Enabled (0x1 << 3)
479 #define TAS2562_DigitalInputPinPullDown_WKPulldownPDMD1_Mask (0x1 << 2)
480 #define TAS2562_DigitalInputPinPullDown_WKPulldownPDMD1_Disabled (0x0 << 2)
481 #define TAS2562_DigitalInputPinPullDown_WKPulldownPDMD1_Enabled (0x1 << 2)
482 #define TAS2562_DigitalInputPinPullDown_WKPulldownPDMCK0_Mask (0x1 << 1)
483 #define TAS2562_DigitalInputPinPullDown_WKPulldownPDMCK0_Disabled (0x0 << 1)
484 #define TAS2562_DigitalInputPinPullDown_WKPulldownPDMCK0_Enabled (0x1 << 1)
485 #define TAS2562_DigitalInputPinPullDown_WKPulldownPDMCK1_Mask (0x1 << 0)
486 #define TAS2562_DigitalInputPinPullDown_WKPulldownPDMCK1_Disabled (0x0 << 0)
487 #define TAS2562_DigitalInputPinPullDown_WKPulldownPDMCK1_Enabled (0x1 << 0)
489 /* Misc IRQ */
490 #define TAS2562_MiscIRQ TAS2562_REG(0X0, 0x32)
491 #define TAS2562_MiscIRQ_IRQZREQD_Mask (0x1 << 7)
492 #define TAS2562_MiscIRQ_IRQZREQD_ActiveHigh (0x0 << 7)
493 #define TAS2562_MiscIRQ_IRQZREQD_ActiveLow (0x1 << 7)
494 #define TAS2562_MiscIRQ_IRQZBITBANG_Mask (0x1 << 0)
495 #define TAS2562_MiscIRQ_IRQZBITBANG_IRQZInputBuf0 (0x0 << 0)
496 #define TAS2562_MiscIRQ_IRQZBITBANG_IRQZInputBuf1 (0x1 << 0)
499 /* Clock Configuration */
500 #define TAS2562_ClockConfiguration TAS2562_REG(0X0, 0x38)
501 #define TAS2562_ClockConfiguration_SBCLKtoFS52_Mask (0xf << 2)
502 #define TAS2562_ClockConfiguration_SBCLKtoFS52_16 (0x0 << 2)
503 #define TAS2562_ClockConfiguration_SBCLKtoFS52_24 (0x1 << 2)
504 #define TAS2562_ClockConfiguration_SBCLKtoFS52_32 (0x2 << 2)
505 #define TAS2562_ClockConfiguration_SBCLKtoFS52_48 (0x3 << 2)
506 #define TAS2562_ClockConfiguration_SBCLKtoFS52_64 (0x4 << 2)
507 #define TAS2562_ClockConfiguration_SBCLKtoFS52_96 (0x5 << 2)
508 #define TAS2562_ClockConfiguration_SBCLKtoFS52_128 (0x6 << 2)
509 #define TAS2562_ClockConfiguration_SBCLKtoFS52_192 (0x7 << 2)
510 #define TAS2562_ClockConfiguration_SBCLKtoFS52_256 (0x8 << 2)
511 #define TAS2562_ClockConfiguration_SBCLKtoFS52_384 (0x9 << 2)
512 #define TAS2562_ClockConfiguration_SBCLKtoFS52_512 (0xa << 2)
513 #define TAS2562_ClockConfiguration_DISCLKRateDetect10_Mask (0x3 << 0)
514 #define TAS2562_ClockConfiguration_DISCLKRateDetect10_Disabled (0x1 << 0)
515 #define TAS2562_ClockConfiguration_DISCLKRateDetect10_Enabled (0x0 << 0)
517 #define TAS2562_ICN_REG TAS2562_REG(2, 0x5c)
519 /* Revision and PG ID */
520 #define TAS2562_RevisionandPGID TAS2562_REG(0X0, 0x7D)
521 #define TAS2562_RevisionandPGID_RevisionID74_Mask (0xf << 4)
522 #define TAS2562_RevisionandPGID_PGID30_Mask (0xf << 0)
524 /* I2C Checksum */
525 #define TAS2562_I2CChecksum TAS2562_REG(0X0, 0x7E)
526 #define TAS2562_I2CChecksum_I2CChecksum70_Mask (0xff << 0)
528 /* Book */
529 #define TAS2562_Book TAS2562_REG(0X0, 0x7F)
530 #define TAS2562_Book_Book70_Mask (0xff << 0)
532 #define TAS2562_POWER_ACTIVE 0
533 #define TAS2562_POWER_MUTE 1
534 #define TAS2562_POWER_SHUTDOWN 2
536 #define ERROR_NONE 0x0000000
537 #define ERROR_PLL_ABSENT 0x0000000
538 #define ERROR_DEVA_I2C_COMM 0x0000000
539 #define ERROR_DEVB_I2C_COMM 0x0000000
540 #define ERROR_PRAM_CRCCHK 0x0000000
541 #define ERROR_YRAM_CRCCHK 0x0000001
542 #define ERROR_OVER_CURRENT 0x0000002
543 #define ERROR_DIE_OVERTEMP 0x0000004
544 #define ERROR_OVER_VOLTAGE 0x0000008
545 #define ERROR_UNDER_VOLTAGE 0x0000010
546 #define ERROR_BROWNOUT 0x0000020
547 #define ERROR_CLASSD_PWR 0x0000040
548 #define ERROR_FAILSAFE 0x4000000
550 #define CHECK_PERIOD 5000 /* 5 second */
552 struct tas2562_register {
553 int book;
554 int page;
555 int reg;
556 };
558 struct tas2562_dai_cfg {
559 unsigned int dai_fmt;
560 unsigned int tdm_delay;
561 };
563 struct tas2562_priv {
564 struct device *dev;
565 struct regmap *regmap;
566 struct mutex dev_lock;
567 struct delayed_work irq_work;
568 struct hrtimer mtimer;
569 #ifdef CONFIG_TAS2562_CODEC
570 struct snd_soc_codec *codec;
571 #endif
572 int mnClkin;
573 int mnClkid;
574 bool mbPowerUp;
575 int mnPowerState;
576 int mnCurrentBook;
577 int mnCurrentPage;
578 int mnLoad;
579 int mnASIFormat;
580 int mnResetGPIO;
581 int mnIRQGPIO;
582 int mnIRQ;
583 bool mbIRQEnable;
584 int mnSamplingRate;
585 int mnFrameSize;
586 int mnPLL;
587 int mnPPG;
588 int mnCh_size;
589 int mnSlot_width;
590 int ch_size;
591 int mnPCMFormat;
592 int (*read)(struct tas2562_priv *pTAS2562,
593 unsigned int reg, unsigned int *pValue);
594 int (*write)(struct tas2562_priv *pTAS2562,
595 unsigned int reg, unsigned int Value);
596 int (*bulk_read)(struct tas2562_priv *pTAS2562,
597 unsigned int reg, unsigned char *pData, unsigned int len);
598 int (*bulk_write)(struct tas2562_priv *pTAS2562,
599 unsigned int reg, unsigned char *pData, unsigned int len);
600 int (*update_bits)(struct tas2562_priv *pTAS2562,
601 unsigned int reg, unsigned int mask, unsigned int value);
602 void (*hw_reset)(struct tas2562_priv *pTAS2562);
603 void (*clearIRQ)(struct tas2562_priv *pTAS2562);
604 void (*enableIRQ)(struct tas2562_priv *pTAS2562, bool enable);
605 /* device is working, but system is suspended */
606 int (*runtime_suspend)(struct tas2562_priv *pTAS2562);
607 int (*runtime_resume)(struct tas2562_priv *pTAS2562);
608 bool mbRuntimeSuspend;
610 unsigned int mnErrCode;
611 #ifdef CONFIG_TAS2562_CODEC
612 struct mutex codec_lock;
613 #endif
615 #ifdef CONFIG_TAS2562_MISC
616 int mnDBGCmd;
617 int mnCurrentReg;
618 struct mutex file_lock;
619 #endif
620 };
622 #endif /* __TAS2562_ */