| author | Tracy Yi <tracy-yi@ti.com> | |
| Fri, 17 Aug 2018 08:04:29 +0000 (16:04 +0800) | ||
| committer | Tracy Yi <tracy-yi@ti.com> | |
| Fri, 17 Aug 2018 08:12:27 +0000 (16:12 +0800) |
Signed-off-by: Tracy Yi <tracy-yi@ti.com>
| Kconfig | [new file with mode: 0644] | patch | blob |
| License text GPLv2.txt | [new file with mode: 0644] | patch | blob |
| Makefile | [new file with mode: 0644] | patch | blob |
| dai_link.readme | [new file with mode: 0644] | patch | blob |
| dts.readme | [new file with mode: 0644] | patch | blob |
| tas2562-codec.c | [new file with mode: 0644] | patch | blob |
| tas2562-codec.h | [new file with mode: 0644] | patch | blob |
| tas2562-misc.c | [new file with mode: 0644] | patch | blob |
| tas2562-misc.h | [new file with mode: 0644] | patch | blob |
| tas2562-regmap.c | [new file with mode: 0644] | patch | blob |
| tas2562.h | [new file with mode: 0644] | patch | blob |
diff --git a/Kconfig b/Kconfig
--- /dev/null
+++ b/Kconfig
@@ -0,0 +1,15 @@
+
+menuconfig SND_SOC_TAS2562
+ tristate "Texas Instruments TAS2562 SmartAmp(R)"
+
+if SND_SOC_TAS2562
+config TAS2562_REGMAP
+ bool "Use of RegMap API"
+
+config TAS2562_CODEC
+ bool "Codec Driver support"
+
+#config TAS2562_MISC
+# bool "Misc Driver support"
+
+endif # SND_SOC_TAS2562
diff --git a/License text GPLv2.txt b/License text GPLv2.txt
--- /dev/null
+++ b/License text GPLv2.txt
@@ -0,0 +1,339 @@
+ GNU GENERAL PUBLIC LICENSE
+ Version 2, June 1991
+
+ Copyright (C) 1989, 1991 Free Software Foundation, Inc.,
+ 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
+ Everyone is permitted to copy and distribute verbatim copies
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diff --git a/Makefile b/Makefile
--- /dev/null
+++ b/Makefile
@@ -0,0 +1,2 @@
+snd-soc-tas2562-objs := tas2562-codec.o tas2562-regmap.o
+obj-$(CONFIG_SND_SOC_TAS2562) += snd-soc-tas2562.o
diff --git a/dai_link.readme b/dai_link.readme
--- /dev/null
+++ b/dai_link.readme
@@ -0,0 +1,28 @@
+example for connecting CPU DAI
+
+#if defined(CONFIG_TAS2562_CODEC)
+ {
+ .name = LPASS_BE_PRI_MI2S_RX,
+ .stream_name = "Primary MI2S Hostless Playback",
+ .cpu_dai_name = "msm-dai-q6-mi2s.0",
+ .platform_name = "msm-pcm-routing",
+ .codec_name = "tas2562.3-0041",
+ .codec_dai_name = "tas2562 ASI",
+ .no_pcm = 1,
+ .be_id = MSM_BACKEND_DAI_PRI_MI2S_RX,
+ .be_hw_params_fixup = msm_be_prim_mi2s_hw_params_fixup,
+ .ops = &msm8974_prim_mi2s_be_ops,
+ },
+ {
+ .name = LPASS_BE_PRI_MI2S_TX,
+ .stream_name = "Primary MI2S Hostless Capture",
+ .cpu_dai_name = "msm-dai-q6-mi2s.0",
+ .platform_name = "msm-pcm-routing",
+ .codec_name = "tas2562.3-0041",
+ .codec_dai_name = "tas2562 ASI",
+ .no_pcm = 1,
+ .be_id = MSM_BACKEND_DAI_PRI_MI2S_TX,
+ .be_hw_params_fixup = msm_be_prim_mi2s_hw_params_fixup,
+ .ops = &msm8974_prim_mi2s_be_ops,
+ },
+#endif
diff --git a/dts.readme b/dts.readme
--- /dev/null
+++ b/dts.readme
@@ -0,0 +1,13 @@
+example for dts:
+ tas2562@4c {
+ compatible = "ti,tas2562";
+ reg = <0x4c>;
+ ti,reset-gpio = <&msmgpio 13 0>;
+ ti,irq-gpio = <&msmgpio 59 0>;
+ ti,asi-format = <0>; /* 0, i2S; 1, DSP; */
+ ti,left-slot = <0>; /* <left slot number> */
+ ti,right-slot = <1>; /* <right slot number> */
+ ti,imon-slot-no = <0>; /* <current sense slot number> */
+ ti,vmon-slot-no = <2>; /* <current voltage slot number> */
+ status = "ok";
+ };
diff --git a/tas2562-codec.c b/tas2562-codec.c
--- /dev/null
+++ b/tas2562-codec.c
@@ -0,0 +1,638 @@
+/*
+** =============================================================================
+** Copyright (c) 2016 Texas Instruments Inc.
+**
+** This program is free software; you can redistribute it and/or modify it under
+** the terms of the GNU General Public License as published by the Free Software
+** Foundation; version 2.
+**
+** This program is distributed in the hope that it will be useful, but WITHOUT
+** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+** FOR A PARTICULAR PURPOSE.See the GNU General Public License for more details.
+**
+** File:
+** tas2562-codec.c
+**
+** Description:
+** ALSA SoC driver for Texas Instruments TAS2562 High Performance 4W Smart
+** Amplifier
+**
+** =============================================================================
+*/
+
+#ifdef CONFIG_TAS2562_CODEC
+#define DEBUG
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/pm.h>
+#include <linux/i2c.h>
+#include <linux/gpio.h>
+#include <linux/regulator/consumer.h>
+#include <linux/firmware.h>
+#include <linux/regmap.h>
+#include <linux/of.h>
+#include <linux/of_gpio.h>
+#include <linux/slab.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/pcm_params.h>
+#include <sound/soc.h>
+#include <sound/initval.h>
+#include <sound/tlv.h>
+
+#include "tas2562.h"
+
+
+#define TAS2562_MDELAY 0xFFFFFFFE
+/* #define KCONTROL_CODEC */
+static char const *iv_enable_text[] = {"Off", "On"};
+static int tas2562iv_enable;
+static const struct soc_enum tas2562_enum[] = {
+ SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(iv_enable_text), iv_enable_text),
+};
+
+static unsigned int tas2562_codec_read(struct snd_soc_codec *codec,
+ unsigned int reg)
+{
+ struct tas2562_priv *pTAS2562 = snd_soc_codec_get_drvdata(codec);
+ int nResult = 0;
+ unsigned int value = 0;
+
+ mutex_lock(&pTAS2562->dev_lock);
+
+ nResult = regmap_read(pTAS2562->regmap, reg, &value);
+
+ if (nResult < 0)
+ dev_err(pTAS2562->dev, "%s, ERROR, reg=0x%x, E=%d\n",
+ __func__, reg, nResult);
+ else
+ dev_dbg(pTAS2562->dev, "%s, reg: 0x%x, value: 0x%x\n",
+ __func__, reg, value);
+
+ mutex_unlock(&pTAS2562->dev_lock);
+
+ if (nResult >= 0)
+ return value;
+ else
+ return nResult;
+}
+
+static int tas2562iv_put(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
+
+ if (codec == NULL) {
+ pr_err("%s: codec is NULL \n", __func__);
+ return 0;
+ }
+
+ tas2562iv_enable = ucontrol->value.integer.value[0];
+
+ if (tas2562iv_enable) {
+ pr_debug("%s: tas2562iv_enable \n", __func__);
+ snd_soc_update_bits(codec, TAS2562_PowerControl,
+ TAS2562_PowerControl_OperationalMode10_Mask |
+ TAS2562_PowerControl_ISNSPower_Mask |
+ TAS2562_PowerControl_VSNSPower_Mask,
+ TAS2562_PowerControl_OperationalMode10_Active |
+ TAS2562_PowerControl_VSNSPower_Active |
+ TAS2562_PowerControl_ISNSPower_Active);
+ } else {
+ pr_debug("%s: tas2562iv_disable \n", __func__);
+ snd_soc_update_bits(codec, TAS2562_PowerControl,
+ TAS2562_PowerControl_OperationalMode10_Mask |
+ TAS2562_PowerControl_ISNSPower_Mask |
+ TAS2562_PowerControl_VSNSPower_Mask,
+ TAS2562_PowerControl_OperationalMode10_Active |
+ TAS2562_PowerControl_VSNSPower_PoweredDown |
+ TAS2562_PowerControl_ISNSPower_PoweredDown);
+ }
+
+ pr_debug("%s: tas2562iv_enable = %d\n", __func__, tas2562iv_enable);
+
+ return 0;
+}
+
+static int tas2562iv_get(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ int value;
+ ucontrol->value.integer.value[0] = tas2562iv_enable;
+ value=gpio_get_value(37);
+ pr_debug("%s: tas2562iv_enable = %d\n", __func__, tas2562iv_enable);
+ pr_debug("%s: gpio37 value = %d\n", __func__, value);
+ return 0;
+}
+static const struct snd_kcontrol_new tas2562_controls[] = {
+SOC_ENUM_EXT("TAS2562 IVSENSE ENABLE", tas2562_enum[0],
+ tas2562iv_get, tas2562iv_put),
+};
+
+static int tas2562_codec_write(struct snd_soc_codec *codec, unsigned int reg,
+ unsigned int value)
+{
+ struct tas2562_priv *pTAS2562 = snd_soc_codec_get_drvdata(codec);
+
+ int nResult = 0;
+
+ mutex_lock(&pTAS2562->dev_lock);
+
+ nResult = regmap_write(pTAS2562->regmap, reg, value);
+ if (nResult < 0)
+ dev_err(pTAS2562->dev, "%s, ERROR, reg=0x%x, E=%d\n",
+ __func__, reg, nResult);
+ else
+ dev_dbg(pTAS2562->dev, "%s, reg: 0x%x, 0x%x\n",
+ __func__, reg, value);
+
+ mutex_unlock(&pTAS2562->dev_lock);
+
+ return nResult;
+
+}
+
+
+static int tas2562_codec_suspend(struct snd_soc_codec *codec)
+{
+ struct tas2562_priv *pTAS2562 = snd_soc_codec_get_drvdata(codec);
+ int ret = 0;
+
+ mutex_lock(&pTAS2562->codec_lock);
+
+ dev_dbg(pTAS2562->dev, "%s\n", __func__);
+ pTAS2562->runtime_suspend(pTAS2562);
+
+ mutex_unlock(&pTAS2562->codec_lock);
+ return ret;
+}
+
+static int tas2562_codec_resume(struct snd_soc_codec *codec)
+{
+ struct tas2562_priv *pTAS2562 = snd_soc_codec_get_drvdata(codec);
+ int ret = 0;
+
+ mutex_lock(&pTAS2562->codec_lock);
+
+ dev_dbg(pTAS2562->dev, "%s\n", __func__);
+ pTAS2562->runtime_resume(pTAS2562);
+
+ mutex_unlock(&pTAS2562->codec_lock);
+ return ret;
+}
+
+static const struct snd_kcontrol_new tas2562_asi_controls[] = {
+ SOC_DAPM_SINGLE("Left", TAS2562_TDMConfigurationReg2,
+ 4, 1, 0),
+ SOC_DAPM_SINGLE("Right", TAS2562_TDMConfigurationReg2,
+ 4, 2, 0),
+ SOC_DAPM_SINGLE("LeftRightDiv2", TAS2562_TDMConfigurationReg2,
+ 4, 3, 0),
+};
+
+
+static int tas2562_dac_event(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *kcontrol, int event)
+{
+ struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
+
+ switch (event) {
+ case SND_SOC_DAPM_POST_PMU:
+ snd_soc_update_bits(codec, TAS2562_PowerControl,
+ TAS2562_PowerControl_OperationalMode10_Mask |
+ TAS2562_PowerControl_ISNSPower_Mask |
+ TAS2562_PowerControl_VSNSPower_Mask,
+ TAS2562_PowerControl_OperationalMode10_Active |
+ TAS2562_PowerControl_VSNSPower_Active |
+ TAS2562_PowerControl_ISNSPower_Active);
+ break;
+ case SND_SOC_DAPM_PRE_PMD:
+ snd_soc_update_bits(codec, TAS2562_PowerControl,
+ TAS2562_PowerControl_OperationalMode10_Mask,
+ TAS2562_PowerControl_OperationalMode10_Shutdown);
+ break;
+
+ }
+ return 0;
+
+}
+
+static const struct snd_soc_dapm_widget tas2562_dapm_widgets[] = {
+ SND_SOC_DAPM_AIF_IN("ASI1", "ASI1 Playback", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("Voltage Sense", "ASI1 Capture", 1, TAS2562_PowerControl, 2, 1),
+ SND_SOC_DAPM_AIF_OUT("Current Sense", "ASI1 Capture", 0, TAS2562_PowerControl, 3, 1),
+ SND_SOC_DAPM_MIXER("ASI1 Sel",
+ TAS2562_TDMConfigurationReg2, 4, 0,
+ &tas2562_asi_controls[0],
+ ARRAY_SIZE(tas2562_asi_controls)),
+ SND_SOC_DAPM_DAC_E("DAC", NULL, SND_SOC_NOPM, 0, 0, tas2562_dac_event,
+ SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
+ SND_SOC_DAPM_OUTPUT("OUT"),
+ SND_SOC_DAPM_SIGGEN("VMON"),
+ SND_SOC_DAPM_SIGGEN("IMON")
+};
+
+static const struct snd_soc_dapm_route tas2562_audio_map[] = {
+ {"ASI1 Sel", "Left", "ASI1"},
+ {"ASI1 Sel", "Right", "ASI1"},
+ {"ASI1 Sel", "LeftRightDiv2", "ASI1"},
+ {"DAC", NULL, "ASI1 Sel"},
+ {"OUT", NULL, "DAC"},
+ /*{"VMON", NULL, "Voltage Sense"},
+ {"IMON", NULL, "Current Sense"},*/
+ {"Voltage Sense", NULL, "VMON"},
+ {"Current Sense", NULL, "IMON"},
+};
+
+
+static int tas2562_mute(struct snd_soc_dai *dai, int mute)
+{
+ struct snd_soc_codec *codec = dai->codec;
+ struct tas2562_priv *pTAS2562 = snd_soc_codec_get_drvdata(codec);
+
+ mutex_lock(&pTAS2562->codec_lock);
+ if (mute) {
+ snd_soc_update_bits(codec, TAS2562_PowerControl,
+ TAS2562_PowerControl_OperationalMode10_Mask,
+ TAS2562_PowerControl_OperationalMode10_Mute);
+ } else {
+ snd_soc_update_bits(codec, TAS2562_PowerControl,
+ TAS2562_PowerControl_OperationalMode10_Mask,
+ TAS2562_PowerControl_OperationalMode10_Active);
+ }
+ mutex_unlock(&pTAS2562->codec_lock);
+ return 0;
+}
+
+static int tas2562_slot_config(struct snd_soc_codec *codec, struct tas2562_priv *pTAS2562, int blr_clk_ratio)
+{
+ int ret = 0;
+ snd_soc_update_bits(codec,
+ TAS2562_TDMConfigurationReg5, 0xff, 0x42);
+
+ snd_soc_update_bits(codec,
+ TAS2562_TDMConfigurationReg6, 0xff, 0x40);
+
+ return ret;
+}
+
+//Added/Mofified 060356-PP
+//To avoid implicit decleration
+
+static int tas2562_set_slot(struct snd_soc_codec *codec, int slot_width)
+{
+ int ret = 0;
+ struct tas2562_priv *pTAS2562 = snd_soc_codec_get_drvdata(codec);
+
+ switch (slot_width) {
+ case 16:
+ ret = snd_soc_update_bits(codec,
+ TAS2562_TDMConfigurationReg2,
+ TAS2562_TDMConfigurationReg2_RXSLEN10_Mask,
+ TAS2562_TDMConfigurationReg2_RXSLEN10_16Bits);
+ break;
+
+ case 24:
+ ret = snd_soc_update_bits(codec,
+ TAS2562_TDMConfigurationReg2,
+ TAS2562_TDMConfigurationReg2_RXSLEN10_Mask,
+ TAS2562_TDMConfigurationReg2_RXSLEN10_24Bits);
+ break;
+
+ case 32:
+ ret = snd_soc_update_bits(codec,
+ TAS2562_TDMConfigurationReg2,
+ TAS2562_TDMConfigurationReg2_RXSLEN10_Mask,
+ TAS2562_TDMConfigurationReg2_RXSLEN10_32Bits);
+ break;
+
+ case 0:
+ /* Do not change slot width */
+ break;
+
+ default:
+ dev_dbg(pTAS2562->dev, "slot width not supported");
+ ret = -EINVAL;
+ }
+
+ if (ret >= 0)
+ pTAS2562->mnSlot_width = slot_width;
+
+ return ret;
+}
+
+static int tas2562_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *params,
+ struct snd_soc_dai *dai)
+{
+ struct snd_soc_codec *codec = dai->codec;
+ struct tas2562_priv *pTAS2562 = snd_soc_codec_get_drvdata(codec);
+ int blr_clk_ratio;
+ int ret = 0;
+ int slot_width_tmp = 16;
+
+ dev_dbg(pTAS2562->dev, "%s, format: %d\n", __func__,
+ params_format(params));
+
+ switch (params_format(params)) {
+ case SNDRV_PCM_FORMAT_S16_LE:
+ snd_soc_update_bits(codec,
+ TAS2562_TDMConfigurationReg2,
+ TAS2562_TDMConfigurationReg2_RXWLEN32_Mask,
+ TAS2562_TDMConfigurationReg2_RXWLEN32_16Bits);
+ pTAS2562->ch_size = 16;
+ if (pTAS2562->mnSlot_width == 0)
+ slot_width_tmp = 16;
+ break;
+ case SNDRV_PCM_FMTBIT_S24_LE:
+ snd_soc_update_bits(codec,
+ TAS2562_TDMConfigurationReg2,
+ TAS2562_TDMConfigurationReg2_RXWLEN32_Mask,
+ TAS2562_TDMConfigurationReg2_RXWLEN32_24Bits);
+ pTAS2562->ch_size = 24;
+ if (pTAS2562->mnSlot_width == 0)
+ slot_width_tmp = 32;
+ break;
+ case SNDRV_PCM_FMTBIT_S32_LE:
+ snd_soc_update_bits(codec,
+ TAS2562_TDMConfigurationReg2,
+ TAS2562_TDMConfigurationReg2_RXWLEN32_Mask,
+ TAS2562_TDMConfigurationReg2_RXWLEN32_32Bits);
+ pTAS2562->ch_size = 32;
+ if (pTAS2562->mnSlot_width == 0)
+ slot_width_tmp = 32;
+ break;
+
+ }
+
+ /* If machine driver did not call set slot width */
+ if (pTAS2562->mnSlot_width == 0)
+ tas2562_set_slot(codec, slot_width_tmp);
+
+ blr_clk_ratio = params_channels(params) * pTAS2562->ch_size;
+ dev_dbg(pTAS2562->dev, "blr_clk_ratio: %d\n", blr_clk_ratio);
+ tas2562_slot_config(codec, pTAS2562, blr_clk_ratio);
+
+ dev_dbg(pTAS2562->dev, "%s, sample rate: %d\n", __func__,
+ params_rate(params));
+ switch (params_rate(params)) {
+ case 48000:
+ snd_soc_update_bits(codec,
+ TAS2562_TDMConfigurationReg0,
+ TAS2562_TDMConfigurationReg0_SAMPRATERAMP_Mask,
+ TAS2562_TDMConfigurationReg0_SAMPRATERAMP_48KHz);
+ snd_soc_update_bits(codec,
+ TAS2562_TDMConfigurationReg0,
+ TAS2562_TDMConfigurationReg0_SAMPRATE31_Mask,
+ TAS2562_TDMConfigurationReg0_SAMPRATE31_44_1_48kHz);
+ break;
+ case 44100:
+ snd_soc_update_bits(codec,
+ TAS2562_TDMConfigurationReg0,
+ TAS2562_TDMConfigurationReg0_SAMPRATERAMP_Mask,
+ TAS2562_TDMConfigurationReg0_SAMPRATERAMP_44_1KHz);
+ snd_soc_update_bits(codec,
+ TAS2562_TDMConfigurationReg0,
+ TAS2562_TDMConfigurationReg0_SAMPRATE31_Mask,
+ TAS2562_TDMConfigurationReg0_SAMPRATE31_44_1_48kHz);
+ break;
+ case 96000:
+ snd_soc_update_bits(codec,
+ TAS2562_TDMConfigurationReg0,
+ TAS2562_TDMConfigurationReg0_SAMPRATERAMP_Mask,
+ TAS2562_TDMConfigurationReg0_SAMPRATERAMP_48KHz);
+ snd_soc_update_bits(codec,
+ TAS2562_TDMConfigurationReg0,
+ TAS2562_TDMConfigurationReg0_SAMPRATE31_Mask,
+ TAS2562_TDMConfigurationReg0_SAMPRATE31_88_2_96kHz);
+ break;
+ case 88200:
+ snd_soc_update_bits(codec,
+ TAS2562_TDMConfigurationReg0,
+ TAS2562_TDMConfigurationReg0_SAMPRATERAMP_Mask,
+ TAS2562_TDMConfigurationReg0_SAMPRATERAMP_44_1KHz);
+ snd_soc_update_bits(codec,
+ TAS2562_TDMConfigurationReg0,
+ TAS2562_TDMConfigurationReg0_SAMPRATE31_Mask,
+ TAS2562_TDMConfigurationReg0_SAMPRATE31_88_2_96kHz);
+ break;
+ case 19200:
+ snd_soc_update_bits(codec,
+ TAS2562_TDMConfigurationReg0,
+ TAS2562_TDMConfigurationReg0_SAMPRATERAMP_Mask,
+ TAS2562_TDMConfigurationReg0_SAMPRATERAMP_48KHz);
+ snd_soc_update_bits(codec,
+ TAS2562_TDMConfigurationReg0,
+ TAS2562_TDMConfigurationReg0_SAMPRATE31_Mask,
+ TAS2562_TDMConfigurationReg0_SAMPRATE31_176_4_192kHz);
+ break;
+ case 17640:
+ snd_soc_update_bits(codec,
+ TAS2562_TDMConfigurationReg0,
+ TAS2562_TDMConfigurationReg0_SAMPRATERAMP_Mask,
+ TAS2562_TDMConfigurationReg0_SAMPRATERAMP_44_1KHz);
+ snd_soc_update_bits(codec,
+ TAS2562_TDMConfigurationReg0,
+ TAS2562_TDMConfigurationReg0_SAMPRATE31_Mask,
+ TAS2562_TDMConfigurationReg0_SAMPRATE31_176_4_192kHz);
+ break;
+ default:
+ dev_dbg(pTAS2562->dev, "%s, unsupported sample rate\n", __func__);
+
+ }
+ return ret;
+}
+
+static int tas2562_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
+{
+ u8 tdm_rx_start_slot = 0, asi_cfg_1 = 0;
+ struct snd_soc_codec *codec = dai->codec;
+ struct tas2562_priv *pTAS2562 = snd_soc_codec_get_drvdata(codec);
+ int ret = 0;
+
+ dev_dbg(pTAS2562->dev, "%s, format=0x%x\n", __func__, fmt);
+
+ switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
+ case SND_SOC_DAIFMT_CBS_CFS:
+ asi_cfg_1 = 0x00;
+ break;
+ default:
+ dev_err(pTAS2562->dev, "ASI format master is not found\n");
+ ret = -EINVAL;
+ }
+
+ switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
+ case SND_SOC_DAIFMT_NB_NF:
+ dev_dbg(pTAS2562->dev, "INV format: NBNF\n");
+ asi_cfg_1 |= TAS2562_TDMConfigurationReg1_RXEDGE_Rising;
+ break;
+ case SND_SOC_DAIFMT_IB_NF:
+ dev_dbg(pTAS2562->dev, "INV format: IBNF\n");
+ asi_cfg_1 |= TAS2562_TDMConfigurationReg1_RXEDGE_Falling;
+ break;
+ default:
+ dev_err(pTAS2562->dev, "ASI format Inverse is not found\n");
+ ret = -EINVAL;
+ }
+
+ snd_soc_update_bits(codec, TAS2562_TDMConfigurationReg1,
+ TAS2562_TDMConfigurationReg1_RXEDGE_Mask,
+ asi_cfg_1);
+
+ switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
+ case (SND_SOC_DAIFMT_I2S):
+ tdm_rx_start_slot = 1;
+ break;
+ case (SND_SOC_DAIFMT_DSP_A):
+ case (SND_SOC_DAIFMT_DSP_B):
+ tdm_rx_start_slot = 1;
+ break;
+ case (SND_SOC_DAIFMT_LEFT_J):
+ tdm_rx_start_slot = 0;
+ break;
+ default:
+ dev_err(pTAS2562->dev, "DAI Format is not found, fmt=0x%x\n", fmt);
+ ret = -EINVAL;
+ break;
+ }
+
+ snd_soc_update_bits(codec, TAS2562_TDMConfigurationReg1,
+ TAS2562_TDMConfigurationReg1_RXOFFSET51_Mask,
+ (tdm_rx_start_slot << TAS2562_TDMConfigurationReg1_RXOFFSET51_Shift));
+ return ret;
+}
+
+static int tas2562_set_dai_tdm_slot(struct snd_soc_dai *dai,
+ unsigned int tx_mask, unsigned int rx_mask,
+ int slots, int slot_width)
+{
+ int ret = 0;
+ struct snd_soc_codec *codec = dai->codec;
+ struct tas2562_priv *pTAS2562 = snd_soc_codec_get_drvdata(codec);
+
+ dev_dbg(pTAS2562->dev, "%s, tx_mask:%d, rx_mask:%d, slots:%d, slot_width:%d",
+ __func__, tx_mask, rx_mask, slots, slot_width);
+
+ ret = tas2562_set_slot(codec, slot_width);
+
+ return ret;
+}
+
+static struct snd_soc_dai_ops tas2562_dai_ops = {
+ .digital_mute = tas2562_mute,
+ .hw_params = tas2562_hw_params,
+ .set_fmt = tas2562_set_dai_fmt,
+ .set_tdm_slot = tas2562_set_dai_tdm_slot,
+};
+
+#define TAS2562_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
+ SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
+
+#define TAS2562_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 \
+ SNDRV_PCM_RATE_88200 |\
+ SNDRV_PCM_RATE_96000 |\
+ SNDRV_PCM_RATE_176400 |\
+ SNDRV_PCM_RATE_192000\
+ )
+
+static struct snd_soc_dai_driver tas2562_dai_driver[] = {
+ {
+ .name = "tas2562 ASI1",
+ .id = 0,
+ .playback = {
+ .stream_name = "ASI1 Playback",
+ .channels_min = 2,
+ .channels_max = 2,
+ .rates = SNDRV_PCM_RATE_8000_192000,
+ .formats = TAS2562_FORMATS,
+ },
+ .capture = {
+ .stream_name = "ASI1 Capture",
+ .channels_min = 0,
+ .channels_max = 2,
+ .rates = SNDRV_PCM_RATE_8000_192000,
+ .formats = TAS2562_FORMATS,
+ },
+ .ops = &tas2562_dai_ops,
+ .symmetric_rates = 1,
+ },
+};
+
+static int tas2562_codec_probe(struct snd_soc_codec *codec)
+{
+ int ret;
+ struct tas2562_priv *pTAS2562 = snd_soc_codec_get_drvdata(codec);
+
+ ret = snd_soc_add_codec_controls(codec, tas2562_controls,
+ ARRAY_SIZE(tas2562_controls));
+ if (ret < 0) {
+ pr_err("%s: add_codec_controls failed, err %d\n",
+ __func__, ret);
+ return ret;
+ }
+
+
+ dev_err(pTAS2562->dev, "%s\n", __func__);
+
+ return 0;
+}
+
+static int tas2562_codec_remove(struct snd_soc_codec *codec)
+{
+ return 0;
+}
+
+/*static DECLARE_TLV_DB_SCALE(dac_tlv, 0, 100, 0);*/
+static DECLARE_TLV_DB_SCALE(tas2562_digital_tlv, 1100, 50, 0);
+static DECLARE_TLV_DB_SCALE(tas2562_playback_volume, -12750, 50, 0);
+
+static const struct snd_kcontrol_new tas2562_snd_controls[] = {
+ SOC_SINGLE_TLV("Amp Output Level", TAS2562_PlaybackConfigurationReg0,
+ 0, 0x16, 0,
+ tas2562_digital_tlv),
+ SOC_SINGLE_TLV("Playback Volume", TAS2562_PlaybackConfigurationReg2,
+ 0, TAS2562_PlaybackConfigurationReg2_DVCPCM70_Mask, 1,
+ tas2562_playback_volume),
+};
+
+static struct snd_soc_codec_driver soc_codec_driver_tas2562 = {
+ .probe = tas2562_codec_probe,
+ .remove = tas2562_codec_remove,
+ .read = tas2562_codec_read,
+ .write = tas2562_codec_write,
+ .suspend = tas2562_codec_suspend,
+ .resume = tas2562_codec_resume,
+ .component_driver = {
+ .controls = tas2562_snd_controls,
+ .num_controls = ARRAY_SIZE(tas2562_snd_controls),
+ .dapm_widgets = tas2562_dapm_widgets,
+ .num_dapm_widgets = ARRAY_SIZE(tas2562_dapm_widgets),
+ .dapm_routes = tas2562_audio_map,
+ .num_dapm_routes = ARRAY_SIZE(tas2562_audio_map),
+ },
+};
+
+int tas2562_register_codec(struct tas2562_priv *pTAS2562)
+{
+ int nResult = 0;
+
+ dev_info(pTAS2562->dev, "%s, enter\n", __func__);
+ nResult = snd_soc_register_codec(pTAS2562->dev,
+ &soc_codec_driver_tas2562,
+ tas2562_dai_driver, ARRAY_SIZE(tas2562_dai_driver));
+ return nResult;
+}
+
+int tas2562_deregister_codec(struct tas2562_priv *pTAS2562)
+{
+ snd_soc_unregister_codec(pTAS2562->dev);
+
+ return 0;
+}
+
+MODULE_AUTHOR("Texas Instruments Inc.");
+MODULE_DESCRIPTION("TAS2562 ALSA SOC Smart Amplifier driver");
+MODULE_LICENSE("GPL v2");
+#endif /* CONFIG_TAS2562_CODEC */
diff --git a/tas2562-codec.h b/tas2562-codec.h
--- /dev/null
+++ b/tas2562-codec.h
@@ -0,0 +1,31 @@
+/*
+** =============================================================================
+** Copyright (c) 2016 Texas Instruments Inc.
+**
+** This program is free software; you can redistribute it and/or modify it under
+** the terms of the GNU General Public License as published by the Free Software
+** Foundation; version 2.
+**
+** This program is distributed in the hope that it will be useful, but WITHOUT
+** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+** FOR A PARTICULAR PURPOSE.See the GNU General Public License for more details.
+**
+** File:
+** tas2562-codec.h
+**
+** Description:
+** header file for tas2562-codec.c
+**
+** =============================================================================
+*/
+
+#ifndef _TAS2562_CODEC_H
+#define _TAS2562_CODEC_H
+
+#include "tas2562.h"
+
+int tas2562_register_codec(struct tas2562_priv *pTAS2562);
+int tas2562_deregister_codec(struct tas2562_priv *pTAS2562);
+int tas2562_LoadConfig(struct tas2562_priv *pTAS2562, bool bPowerOn);
+
+#endif /* _TAS2562_CODEC_H */
diff --git a/tas2562-misc.c b/tas2562-misc.c
--- /dev/null
+++ b/tas2562-misc.c
@@ -0,0 +1,246 @@
+/*
+** =============================================================================
+** Copyright (c) 2016 Texas Instruments Inc.
+**
+** This program is free software; you can redistribute it and/or modify it under
+** the terms of the GNU General Public License as published by the Free Software
+** Foundation; version 2.
+**
+** This program is distributed in the hope that it will be useful, but WITHOUT
+** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+** FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
+** File:
+** tas2562-misc.c
+**
+** Description:
+** misc driver for Texas Instruments TAS2562 High Performance 4W Smart Amplifier
+**
+** =============================================================================
+*/
+
+#define DEBUG
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/pm.h>
+#include <linux/i2c.h>
+#include <linux/gpio.h>
+#include <linux/regulator/consumer.h>
+#include <linux/firmware.h>
+#include <linux/regmap.h>
+#include <linux/of.h>
+#include <linux/of_gpio.h>
+#include <linux/slab.h>
+#include <linux/syscalls.h>
+#include <linux/fcntl.h>
+#include <linux/miscdevice.h>
+#include <linux/uaccess.h>
+
+#include "tas2562.h"
+#include "tas2562-misc.h"
+#include <linux/dma-mapping.h>
+
+static int g_logEnable = 1;
+static struct tas2562_priv *g_tas2562;
+
+static int tas2562_file_open(struct inode *inode, struct file *file)
+{
+ struct tas2562_priv *pTAS2562 = g_tas2562;
+
+ if (!try_module_get(THIS_MODULE))
+ return -ENODEV;
+
+ file->private_data = (void *)pTAS2562;
+
+ if (g_logEnable)
+ dev_info(pTAS2562->dev, "%s\n", __func__);
+ return 0;
+}
+
+static int tas2562_file_release(struct inode *inode, struct file *file)
+{
+ struct tas2562_priv *pTAS2562 = (struct tas2562_priv *)file->private_data;
+
+ if (g_logEnable)
+ dev_info(pTAS2562->dev, "%s\n", __func__);
+
+ file->private_data = (void *)NULL;
+ module_put(THIS_MODULE);
+
+ return 0;
+}
+
+static ssize_t tas2562_file_read(struct file *file, char *buf, size_t count, loff_t *ppos)
+{
+ struct tas2562_priv *pTAS2562 = (struct tas2562_priv *)file->private_data;
+ int ret = 0;
+ unsigned int nValue = 0;
+ unsigned char value = 0;
+ unsigned char *p_kBuf = NULL;
+
+ mutex_lock(&pTAS2562->file_lock);
+
+ switch (pTAS2562->mnDBGCmd) {
+ case TIAUDIO_CMD_REG_READ:
+ {
+ if (g_logEnable)
+ dev_info(pTAS2562->dev,
+ "TIAUDIO_CMD_REG_READ: current_reg = 0x%x, count=%d\n",
+ pTAS2562->mnCurrentReg, (int)count);
+ if (count == 1) {
+ ret = pTAS2562->read(pTAS2562, pTAS2562->mnCurrentReg, &nValue);
+ if (ret < 0) {
+ dev_err(pTAS2562->dev, "dev read fail %d\n", ret);
+ break;
+ }
+
+ value = (u8)nValue;
+ if (g_logEnable)
+ dev_info(pTAS2562->dev, "TIAUDIO_CMD_REG_READ: nValue=0x%x, value=0x%x\n",
+ nValue, value);
+ ret = copy_to_user(buf, &value, 1);
+ if (ret != 0) {
+ /* Failed to copy all the data, exit */
+ dev_err(pTAS2562->dev, "copy to user fail %d\n", ret);
+ }
+ } else if (count > 1) {
+ p_kBuf = kzalloc(count, GFP_KERNEL);
+ if (p_kBuf != NULL) {
+ ret = pTAS2562->bulk_read(pTAS2562, pTAS2562->mnCurrentReg, p_kBuf, count);
+ if (ret < 0) {
+ dev_err(pTAS2562->dev, "dev bulk read fail %d\n", ret);
+ } else {
+ ret = copy_to_user(buf, p_kBuf, count);
+ if (ret != 0) {
+ /* Failed to copy all the data, exit */
+ dev_err(pTAS2562->dev, "copy to user fail %d\n", ret);
+ }
+ }
+
+ kfree(p_kBuf);
+ } else {
+ dev_err(pTAS2562->dev, "read no mem\n");
+ }
+ }
+ }
+ break;
+ }
+ pTAS2562->mnDBGCmd = 0;
+
+ mutex_unlock(&pTAS2562->file_lock);
+ return count;
+}
+
+static ssize_t tas2562_file_write(struct file *file, const char *buf, size_t count, loff_t *ppos)
+{
+ struct tas2562_priv *pTAS2562 = (struct tas2562_priv *)file->private_data;
+ int ret = 0;
+ unsigned char *p_kBuf = NULL;
+ unsigned int reg = 0;
+ unsigned int len = 0;
+
+ mutex_lock(&pTAS2562->file_lock);
+
+ p_kBuf = kzalloc(count, GFP_KERNEL);
+ if (p_kBuf == NULL) {
+ dev_err(pTAS2562->dev, "write no mem\n");
+ goto err;
+ }
+
+ ret = copy_from_user(p_kBuf, buf, count);
+ if (ret != 0) {
+ dev_err(pTAS2562->dev, "copy_from_user failed.\n");
+ goto err;
+ }
+
+ pTAS2562->mnDBGCmd = p_kBuf[0];
+ switch (pTAS2562->mnDBGCmd) {
+ case TIAUDIO_CMD_REG_WITE:
+ if (count > 5) {
+ reg = ((unsigned int)p_kBuf[1] << 24) +
+ ((unsigned int)p_kBuf[2] << 16) +
+ ((unsigned int)p_kBuf[3] << 8) +
+ (unsigned int)p_kBuf[4];
+ len = count - 5;
+ if (len == 1) {
+ ret = pTAS2562->write(pTAS2562, reg, p_kBuf[5]);
+ if (g_logEnable)
+ dev_info(pTAS2562->dev,
+ "TIAUDIO_CMD_REG_WITE, Reg=0x%x, Val=0x%x\n",
+ reg, p_kBuf[5]);
+ } else {
+ ret = pTAS2562->bulk_write(pTAS2562, reg, &p_kBuf[5], len);
+ }
+ } else {
+ dev_err(pTAS2562->dev, "%s, write len fail, count=%d.\n",
+ __func__, (int)count);
+ }
+ pTAS2562->mnDBGCmd = 0;
+ break;
+
+ case TIAUDIO_CMD_REG_READ:
+ if (count == 5) {
+ pTAS2562->mnCurrentReg = ((unsigned int)p_kBuf[1] << 24) +
+ ((unsigned int)p_kBuf[2] << 16) +
+ ((unsigned int)p_kBuf[3] << 8) +
+ (unsigned int)p_kBuf[4];
+ if (g_logEnable) {
+ dev_info(pTAS2562->dev,
+ "TIAUDIO_CMD_REG_READ, whole=0x%x\n",
+ pTAS2562->mnCurrentReg);
+ }
+ } else {
+ dev_err(pTAS2562->dev, "read len fail.\n");
+ }
+ break;
+ }
+err:
+ if (p_kBuf != NULL)
+ kfree(p_kBuf);
+
+ mutex_unlock(&pTAS2562->file_lock);
+
+ return count;
+}
+
+static const struct file_operations fops = {
+ .owner = THIS_MODULE,
+ .read = tas2562_file_read,
+ .write = tas2562_file_write,
+ .unlocked_ioctl = NULL,
+ .open = tas2562_file_open,
+ .release = tas2562_file_release,
+};
+
+#define MODULE_NAME "tas2562"
+static struct miscdevice tas2562_misc = {
+ .minor = MISC_DYNAMIC_MINOR,
+ .name = MODULE_NAME,
+ .fops = &fops,
+};
+
+int tas2562_register_misc(struct tas2562_priv *pTAS2562)
+{
+ int ret = 0;
+
+ g_tas2562 = pTAS2562;
+ ret = misc_register(&tas2562_misc);
+ if (ret) {
+ dev_err(pTAS2562->dev, "TAS2562 misc fail: %d\n", ret);
+ }
+
+ dev_info(pTAS2562->dev, "%s, leave\n", __func__);
+
+ return ret;
+}
+
+int tas2562_deregister_misc(struct tas2562_priv *pTAS2562)
+{
+ misc_deregister(&tas2562_misc);
+ return 0;
+}
+
+MODULE_AUTHOR("Texas Instruments Inc.");
+MODULE_DESCRIPTION("TAS2562 Misc Smart Amplifier driver");
+MODULE_LICENSE("GPL v2");
diff --git a/tas2562-misc.h b/tas2562-misc.h
--- /dev/null
+++ b/tas2562-misc.h
@@ -0,0 +1,37 @@
+/*
+** =============================================================================
+** Copyright (c) 2016 Texas Instruments Inc.
+**
+** This program is free software; you can redistribute it and/or modify it under
+** the terms of the GNU General Public License as published by the Free Software
+** Foundation; version 2.
+**
+** This program is distributed in the hope that it will be useful, but WITHOUT
+** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+** FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
+**
+** File:
+** tas2562-misc.h
+**
+** Description:
+** header file for tas2562-misc.c
+**
+** =============================================================================
+*/
+
+#ifndef _TAS2562_MISC_H
+#define _TAS2562_MISC_H
+
+#define TIAUDIO_CMD_REG_WITE 1
+#define TIAUDIO_CMD_REG_READ 2
+#define TIAUDIO_CMD_DEBUG_ON 3
+#define TIAUDIO_CMD_CALIBRATION 7
+#define TIAUDIO_CMD_SAMPLERATE 8
+#define TIAUDIO_CMD_BITRATE 9
+#define TIAUDIO_CMD_DACVOLUME 10
+#define TIAUDIO_CMD_SPEAKER 11
+
+int tas2562_register_misc(struct tas2562_priv *pTAS2562);
+int tas2562_deregister_misc(struct tas2562_priv *pTAS2562);
+
+#endif /* _TAS2562_MISC_H */
diff --git a/tas2562-regmap.c b/tas2562-regmap.c
--- /dev/null
+++ b/tas2562-regmap.c
@@ -0,0 +1,833 @@
+/*
+ * ALSA SoC Texas Instruments TAS2562 High Performance 4W Smart Amplifier
+ *
+ * Copyright (C) 2016 Texas Instruments, Inc.
+ *
+ * Author: saiprasad
+ *
+ * This package is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
+ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+ *
+ */
+#ifdef CONFIG_TAS2562_REGMAP
+
+#define DEBUG
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/err.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/pm.h>
+#include <linux/i2c.h>
+#include <linux/gpio.h>
+#include <linux/regulator/consumer.h>
+#include <linux/firmware.h>
+#include <linux/regmap.h>
+#include <linux/of.h>
+#include <linux/of_gpio.h>
+#include <linux/slab.h>
+#include <sound/soc.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+
+#include "tas2562.h"
+#include "tas2562-codec.h"
+//Added/Modified 060356-PP
+#include "tas2562-misc.h"
+
+static int tas2562_change_book_page(struct tas2562_priv *pTAS2562,
+ int book, int page)
+{
+ int nResult = 0;
+
+ if ((pTAS2562->mnCurrentBook == book)
+ && (pTAS2562->mnCurrentPage == page))
+ goto end;
+
+ if (pTAS2562->mnCurrentBook != book) {
+ nResult = regmap_write(pTAS2562->regmap, TAS2562_BOOKCTL_PAGE, 0);
+ if (nResult < 0) {
+ dev_err(pTAS2562->dev, "%s, ERROR, L=%d, E=%d\n",
+ __func__, __LINE__, nResult);
+ goto end;
+ }
+ pTAS2562->mnCurrentPage = 0;
+ nResult = regmap_write(pTAS2562->regmap, TAS2562_BOOKCTL_REG, book);
+ if (nResult < 0) {
+ dev_err(pTAS2562->dev, "%s, ERROR, L=%d, E=%d\n",
+ __func__, __LINE__, nResult);
+ goto end;
+ }
+ pTAS2562->mnCurrentBook = book;
+ }
+
+ if (pTAS2562->mnCurrentPage != page) {
+ nResult = regmap_write(pTAS2562->regmap, TAS2562_BOOKCTL_PAGE, page);
+ if (nResult < 0) {
+ dev_err(pTAS2562->dev, "%s, ERROR, L=%d, E=%d\n",
+ __func__, __LINE__, nResult);
+ goto end;
+ }
+ pTAS2562->mnCurrentPage = page;
+ }
+
+end:
+ return nResult;
+}
+
+static int tas2562_dev_read(struct tas2562_priv *pTAS2562,
+ unsigned int reg, unsigned int *pValue)
+{
+ int nResult = 0;
+
+ mutex_lock(&pTAS2562->dev_lock);
+
+ nResult = tas2562_change_book_page(pTAS2562,
+ TAS2562_BOOK_ID(reg), TAS2562_PAGE_ID(reg));
+ if (nResult < 0)
+ goto end;
+
+ nResult = regmap_read(pTAS2562->regmap, TAS2562_PAGE_REG(reg), pValue);
+ if (nResult < 0)
+ dev_err(pTAS2562->dev, "%s, ERROR, L=%d, E=%d\n",
+ __func__, __LINE__, nResult);
+ else
+ dev_dbg(pTAS2562->dev, "%s: BOOK:PAGE:REG %u:%u:%u\n", __func__,
+ TAS2562_BOOK_ID(reg), TAS2562_PAGE_ID(reg),
+ TAS2562_PAGE_REG(reg));
+
+end:
+ mutex_unlock(&pTAS2562->dev_lock);
+ return nResult;
+}
+
+static int tas2562_dev_write(struct tas2562_priv *pTAS2562,
+ unsigned int reg, unsigned int value)
+{
+ int nResult = 0;
+
+ mutex_lock(&pTAS2562->dev_lock);
+
+ nResult = tas2562_change_book_page(pTAS2562,
+ TAS2562_BOOK_ID(reg), TAS2562_PAGE_ID(reg));
+ if (nResult < 0)
+ goto end;
+
+ nResult = regmap_write(pTAS2562->regmap, TAS2562_PAGE_REG(reg),
+ value);
+ if (nResult < 0)
+ dev_err(pTAS2562->dev, "%s, ERROR, L=%d, E=%d\n",
+ __func__, __LINE__, nResult);
+ else
+ dev_dbg(pTAS2562->dev, "%s: BOOK:PAGE:REG %u:%u:%u, VAL: 0x%02x\n",
+ __func__, TAS2562_BOOK_ID(reg), TAS2562_PAGE_ID(reg),
+ TAS2562_PAGE_REG(reg), value);
+
+end:
+ mutex_unlock(&pTAS2562->dev_lock);
+ return nResult;
+}
+
+static int tas2562_dev_bulk_write(struct tas2562_priv *pTAS2562,
+ unsigned int reg, unsigned char *pData, unsigned int nLength)
+{
+ int nResult = 0;
+
+ mutex_lock(&pTAS2562->dev_lock);
+
+ nResult = tas2562_change_book_page(pTAS2562,
+ TAS2562_BOOK_ID(reg), TAS2562_PAGE_ID(reg));
+ if (nResult < 0)
+ goto end;
+
+ nResult = regmap_bulk_write(pTAS2562->regmap,
+ TAS2562_PAGE_REG(reg), pData, nLength);
+ if (nResult < 0)
+ dev_err(pTAS2562->dev, "%s, ERROR, L=%d, E=%d\n",
+ __func__, __LINE__, nResult);
+ else
+ dev_dbg(pTAS2562->dev, "%s: BOOK:PAGE:REG %u:%u:%u, len: 0x%02x\n",
+ __func__, TAS2562_BOOK_ID(reg), TAS2562_PAGE_ID(reg),
+ TAS2562_PAGE_REG(reg), nLength);
+
+end:
+ mutex_unlock(&pTAS2562->dev_lock);
+ return nResult;
+}
+
+static int tas2562_dev_bulk_read(struct tas2562_priv *pTAS2562,
+ unsigned int reg, unsigned char *pData, unsigned int nLength)
+{
+ int nResult = 0;
+
+ mutex_lock(&pTAS2562->dev_lock);
+
+ nResult = tas2562_change_book_page(pTAS2562,
+ TAS2562_BOOK_ID(reg), TAS2562_PAGE_ID(reg));
+ if (nResult < 0)
+ goto end;
+
+ nResult = regmap_bulk_read(pTAS2562->regmap,
+ TAS2562_PAGE_REG(reg), pData, nLength);
+ if (nResult < 0)
+ dev_err(pTAS2562->dev, "%s, ERROR, L=%d, E=%d\n",
+ __func__, __LINE__, nResult);
+ else
+ dev_dbg(pTAS2562->dev, "%s: BOOK:PAGE:REG %u:%u:%u, len: 0x%02x\n",
+ __func__, TAS2562_BOOK_ID(reg), TAS2562_PAGE_ID(reg),
+ TAS2562_PAGE_REG(reg), nLength);
+end:
+ mutex_unlock(&pTAS2562->dev_lock);
+ return nResult;
+}
+
+static int tas2562_dev_update_bits(struct tas2562_priv *pTAS2562,
+ unsigned int reg, unsigned int mask, unsigned int value)
+{
+ int nResult = 0;
+
+ mutex_lock(&pTAS2562->dev_lock);
+ nResult = tas2562_change_book_page(pTAS2562,
+ TAS2562_BOOK_ID(reg), TAS2562_PAGE_ID(reg));
+ if (nResult < 0)
+ goto end;
+
+ nResult = regmap_update_bits(pTAS2562->regmap,
+ TAS2562_PAGE_REG(reg), mask, value);
+ if (nResult < 0)
+ dev_err(pTAS2562->dev, "%s, ERROR, L=%d, E=%d\n",
+ __func__, __LINE__, nResult);
+ else
+ dev_dbg(pTAS2562->dev, "%s: BOOK:PAGE:REG %u:%u:%u, mask: 0x%x, val=0x%x\n",
+ __func__, TAS2562_BOOK_ID(reg), TAS2562_PAGE_ID(reg),
+ TAS2562_PAGE_REG(reg), mask, value);
+end:
+ mutex_unlock(&pTAS2562->dev_lock);
+ return nResult;
+}
+
+static const struct reg_default tas2562_reg_defaults[] = {
+ { TAS2562_Page, 0x00 },
+ { TAS2562_SoftwareReset, 0x00 },
+ { TAS2562_PowerControl, 0x0e },
+ { TAS2562_PlaybackConfigurationReg0, 0x10 },
+ { TAS2562_PlaybackConfigurationReg1, 0x01 },
+ { TAS2562_PlaybackConfigurationReg2, 0x00 },
+ { TAS2562_MiscConfigurationReg0, 0x07 },
+ { TAS2562_TDMConfigurationReg1, 0x02 },
+ { TAS2562_TDMConfigurationReg2, 0x0a },
+ { TAS2562_TDMConfigurationReg3, 0x10 },
+ { TAS2562_InterruptMaskReg0, 0xfc },
+ { TAS2562_InterruptMaskReg1, 0xb1 },
+ { TAS2562_InterruptConfiguration, 0x05 },
+ { TAS2562_MiscIRQ, 0x81 },
+ { TAS2562_ClockConfiguration, 0x0c },
+
+};
+
+static bool tas2562_volatile(struct device *dev, unsigned int reg)
+{
+ switch (reg) {
+ case TAS2562_Page: /* regmap implementation requires this */
+ case TAS2562_SoftwareReset: /* always clears after write */
+ case TAS2562_BrownOutPreventionReg0:/* has a self clearing bit */
+ case TAS2562_LiveInterruptReg0:
+ case TAS2562_LiveInterruptReg1:
+ case TAS2562_LatchedInterruptReg0:/* Sticky interrupt flags */
+ case TAS2562_LatchedInterruptReg1:/* Sticky interrupt flags */
+ case TAS2562_VBATMSB:
+ case TAS2562_VBATLSB:
+ case TAS2562_TEMPMSB:
+ case TAS2562_TEMPLSB:
+ return true;
+ }
+ return false;
+}
+
+static bool tas2562_writeable(struct device *dev, unsigned int reg)
+{
+ switch (reg) {
+ case TAS2562_LiveInterruptReg0:
+ case TAS2562_LiveInterruptReg1:
+ case TAS2562_LatchedInterruptReg0:
+ case TAS2562_LatchedInterruptReg1:
+ case TAS2562_VBATMSB:
+ case TAS2562_VBATLSB:
+ case TAS2562_TEMPMSB:
+ case TAS2562_TEMPLSB:
+ case TAS2562_TDMClockdetectionmonitor:
+ case TAS2562_RevisionandPGID:
+ return false;
+ }
+ return true;
+}
+static const struct regmap_config tas2562_i2c_regmap = {
+ .reg_bits = 8,
+ .val_bits = 8,
+ .writeable_reg = tas2562_writeable,
+ .volatile_reg = tas2562_volatile,
+ .reg_defaults = tas2562_reg_defaults,
+ .num_reg_defaults = ARRAY_SIZE(tas2562_reg_defaults),
+ .cache_type = REGCACHE_RBTREE,
+ .max_register = 1 * 128,
+};
+
+
+static void tas2562_hw_reset(struct tas2562_priv *pTAS2562)
+{
+ if (gpio_is_valid(pTAS2562->mnResetGPIO)) {
+ gpio_direction_output(pTAS2562->mnResetGPIO, 0);
+ msleep(5);
+ gpio_direction_output(pTAS2562->mnResetGPIO, 1);
+ msleep(2);
+ }
+
+ pTAS2562->mnCurrentBook = -1;
+ pTAS2562->mnCurrentPage = -1;
+}
+
+void tas2562_enableIRQ(struct tas2562_priv *pTAS2562, bool enable)
+{
+ if (enable) {
+ if (pTAS2562->mbIRQEnable)
+ return;
+
+ if (gpio_is_valid(pTAS2562->mnIRQGPIO))
+ enable_irq(pTAS2562->mnIRQ);
+
+ schedule_delayed_work(&pTAS2562->irq_work, msecs_to_jiffies(10));
+ pTAS2562->mbIRQEnable = true;
+ } else {
+ if (!pTAS2562->mbIRQEnable)
+ return;
+
+ if (gpio_is_valid(pTAS2562->mnIRQGPIO))
+ disable_irq_nosync(pTAS2562->mnIRQ);
+ pTAS2562->mbIRQEnable = false;
+ }
+}
+
+static void irq_work_routine(struct work_struct *work)
+{
+ struct tas2562_priv *pTAS2562 =
+ container_of(work, struct tas2562_priv, irq_work.work);
+ unsigned int nDevInt1Status = 0, nDevInt2Status = 0;
+// int nCounter = 2;
+ int nResult = 0;
+
+#ifdef CONFIG_TAS2562_CODEC
+ mutex_lock(&pTAS2562->codec_lock);
+#endif
+
+#ifdef CONFIG_TAS2562_MISC
+ mutex_lock(&pTAS2562->file_lock);
+#endif
+ if (pTAS2562->mbRuntimeSuspend) {
+ dev_info(pTAS2562->dev, "%s, Runtime Suspended\n", __func__);
+ goto end;
+ }
+/*
+ if (!pTAS2562->mbPowerUp) {
+ dev_info(pTAS2562->dev, "%s, device not powered\n", __func__);
+ goto end;
+ }
+*/
+#if 1
+ nResult = tas2562_dev_write(pTAS2562, TAS2562_InterruptMaskReg0, 0x00);
+ if (nResult < 0)
+ goto reload;
+
+ nResult = tas2562_dev_write(pTAS2562, TAS2562_InterruptMaskReg1, 0x00);
+ if (nResult < 0)
+ goto reload;
+ nResult = tas2562_dev_read(pTAS2562, TAS2562_LiveInterruptReg0, &nDevInt1Status);
+ if (nResult >= 0)
+ nResult = tas2562_dev_read(pTAS2562, TAS2562_LiveInterruptReg1, &nDevInt2Status);
+ else
+ goto reload;
+
+ if (((nDevInt1Status & 0xff) != 0) || ((nDevInt2Status & 0x8f) != 0)) {
+ /*in case of INT_OC, INT_UV, INT_OT, INT_BO, INT_CL, INT_CLK1, INT_CLK2*/
+ dev_dbg(pTAS2562->dev, "IRQ critical Error : 0x%x, 0x%x\n",
+ nDevInt1Status, nDevInt2Status);
+
+ if (nDevInt1Status & 0x02) {
+ pTAS2562->mnErrCode |= ERROR_OVER_CURRENT;
+ dev_err(pTAS2562->dev, "SPK over current!\n");
+ } else
+ pTAS2562->mnErrCode &= ~ERROR_OVER_CURRENT;
+
+ if (nDevInt1Status & 0x10) {
+ pTAS2562->mnErrCode |= ERROR_UNDER_VOLTAGE;
+ dev_err(pTAS2562->dev, "VBAT below limiter inflection point!\n");
+ } else
+ pTAS2562->mnErrCode &= ~ERROR_UNDER_VOLTAGE;
+
+ if (nDevInt1Status & 0x04) {
+ pTAS2562->mnErrCode |= ERROR_CLK_HALT;
+ dev_err(pTAS2562->dev, "TDM clock error!\n");
+ } else
+ pTAS2562->mnErrCode &= ~ERROR_CLK_HALT;
+
+ if (nDevInt1Status & 0x01) {
+ pTAS2562->mnErrCode |= ERROR_DIE_OVERTEMP;
+ dev_err(pTAS2562->dev, "die over temperature!\n");
+ } else
+ pTAS2562->mnErrCode &= ~ERROR_DIE_OVERTEMP;
+
+ if (nDevInt1Status & 0x80) {
+ pTAS2562->mnErrCode |= ERROR_BROWNOUT;
+ dev_err(pTAS2562->dev, "limiter mute!\n");
+ } else
+ pTAS2562->mnErrCode &= ~ERROR_BROWNOUT;
+
+ if (nDevInt1Status & 0x40) {
+ pTAS2562->mnErrCode |= ERROR_BROWNOUT;
+ dev_err(pTAS2562->dev, "limiter infinite hold!\n");
+ } else
+ pTAS2562->mnErrCode &= ~ERROR_BROWNOUT;
+ if (nDevInt1Status & 0x20) {
+ pTAS2562->mnErrCode |= ERROR_BROWNOUT;
+ dev_err(pTAS2562->dev, "limiter max attenuation!\n");
+ } else
+ pTAS2562->mnErrCode &= ~ERROR_BROWNOUT;
+ if (nDevInt1Status & 0x04) {
+ pTAS2562->mnErrCode |= ERROR_BROWNOUT;
+ dev_err(pTAS2562->dev, "limiter active!\n");
+ } else
+ pTAS2562->mnErrCode &= ~ERROR_BROWNOUT;
+ if (nDevInt2Status & 0x80) {
+ pTAS2562->mnErrCode |= ERROR_CLK_DET1;
+ dev_err(pTAS2562->dev, "PDM audio data invalid!\n");
+ } else
+ pTAS2562->mnErrCode &= ~ERROR_CLK_DET1;
+
+ if (nDevInt2Status & 0x08) {
+ pTAS2562->mnErrCode |= ERROR_CLK_DET2;
+ dev_err(pTAS2562->dev, "VBAT OVLO flag!\n");
+ } else
+ pTAS2562->mnErrCode &= ~ERROR_CLK_DET2;
+
+ if (nDevInt2Status & 0x04) {
+ pTAS2562->mnErrCode |= ERROR_CLK_DET2;
+ dev_err(pTAS2562->dev, "VBAT UVLO flag!\n");
+ } else
+ pTAS2562->mnErrCode &= ~ERROR_CLK_DET2;
+
+ if (nDevInt2Status & 0x02) {
+ pTAS2562->mnErrCode |= ERROR_CLK_DET2;
+ dev_err(pTAS2562->dev, "VBAT brown out flag!\n");
+ } else
+ pTAS2562->mnErrCode &= ~ERROR_CLK_DET2;
+
+ if (nDevInt2Status & 0x01) {
+ pTAS2562->mnErrCode |= ERROR_CLK_DET2;
+ dev_err(pTAS2562->dev, "PDM clock error!\n");
+ } else
+ pTAS2562->mnErrCode &= ~ERROR_CLK_DET2;
+ goto reload;
+ } else {
+#if 0
+ dev_dbg(pTAS2562->dev, "IRQ status : 0x%x, 0x%x\n",
+ nDevInt1Status, nDevInt2Status);
+ nCounter = 2;
+
+ while (nCounter > 0) {
+ nResult = tas2562_dev_read(pTAS2562,
+ TAS2562_POWER_UP_FLAG_REG, &nDevInt1Status);
+ if (nResult < 0)
+ goto reload;
+
+ if ((nDevInt1Status & 0xc0) == 0xc0)
+ break;
+
+ nCounter--;
+ if (nCounter > 0) {
+ /* in case check pow status just after power on TAS2562 */
+ dev_dbg(pTAS2562->dev, "PowSts B: 0x%x, check again after 10ms\n",
+ nDevInt1Status);
+ msleep(20);
+ }
+ }
+
+ if ((nDevInt1Status & 0xc0) != 0xc0) {
+ dev_err(pTAS2562->dev, "%s, Critical ERROR B[%d]_P[%d]_R[%d]= 0x%x\n",
+ __func__,
+ TAS2562_BOOK_ID(TAS2562_POWER_UP_FLAG_REG),
+ TAS2562_PAGE_ID(TAS2562_POWER_UP_FLAG_REG),
+ TAS2562_PAGE_REG(TAS2562_POWER_UP_FLAG_REG),
+ nDevInt1Status);
+ pTAS2562->mnErrCode |= ERROR_CLASSD_PWR;
+ goto reload;
+ }
+ pTAS2562->mnErrCode &= ~ERROR_CLASSD_PWR;
+#endif
+ }
+
+ nResult = tas2562_dev_write(pTAS2562, TAS2562_InterruptMaskReg0, 0xff);
+ if (nResult < 0)
+ goto reload;
+
+ nResult = tas2562_dev_write(pTAS2562, TAS2562_InterruptMaskReg1, 0xff);
+ if (nResult < 0)
+ goto reload;
+
+ goto end;
+
+reload:
+ /* hardware reset and reload */
+ //tas2562_LoadConfig(pTAS2562, true);
+#endif
+
+end:
+/*
+ if (!hrtimer_active(&pTAS2562->mtimer)) {
+ dev_dbg(pTAS2562->dev, "%s, start timer\n", __func__);
+ hrtimer_start(&pTAS2562->mtimer,
+ ns_to_ktime((u64)CHECK_PERIOD * NSEC_PER_MSEC),
+ HRTIMER_MODE_REL);
+ }
+*/
+
+#ifdef CONFIG_TAS2562_MISC
+ mutex_unlock(&pTAS2562->file_lock);
+#endif
+
+#ifdef CONFIG_TAS2562_CODEC
+ mutex_unlock(&pTAS2562->codec_lock);
+#endif
+}
+
+static enum hrtimer_restart timer_func(struct hrtimer *timer)
+{
+ struct tas2562_priv *pTAS2562 = container_of(timer,
+ struct tas2562_priv, mtimer);
+
+ if (pTAS2562->mbPowerUp) {
+ if (!delayed_work_pending(&pTAS2562->irq_work))
+ schedule_delayed_work(&pTAS2562->irq_work,
+ msecs_to_jiffies(20));
+ }
+
+ return HRTIMER_NORESTART;
+}
+static inline void irqd_set(struct irq_data *d, unsigned int mask)
+{
+ //Debug Addded/Modified 060356-PP
+ //__irqd_to_state(d) |= mask;
+}
+
+static void irq_state_set_masked(struct irq_desc *desc)
+{
+ irqd_set(&desc->irq_data, IRQD_IRQ_MASKED);
+}
+
+static void irq_state_set_disabled(struct irq_desc *desc)
+{
+ irqd_set(&desc->irq_data, IRQD_IRQ_DISABLED);
+}
+
+static void irq_shutdown(struct irq_desc *desc)
+{
+ irq_state_set_disabled(desc);
+ desc->depth = 1;
+ if (desc->irq_data.chip->irq_shutdown)
+ desc->irq_data.chip->irq_shutdown(&desc->irq_data);
+ else if (desc->irq_data.chip->irq_disable)
+ desc->irq_data.chip->irq_disable(&desc->irq_data);
+ else
+ desc->irq_data.chip->irq_mask(&desc->irq_data);
+ irq_domain_deactivate_irq(&desc->irq_data);
+ irq_state_set_masked(desc);
+}
+
+static irqreturn_t tas2562_irq_handler(int irq, void *dev_id)
+{
+ struct tas2562_priv *pTAS2562 = (struct tas2562_priv *)dev_id;
+ struct irq_desc *desc = irq_to_desc(irq);
+
+#if 1
+ /* get IRQ status after 100 ms */
+ if (!delayed_work_pending(&pTAS2562->irq_work))
+ schedule_delayed_work(&pTAS2562->irq_work,
+ msecs_to_jiffies(100));
+#endif
+ /* avoid interrupt storm, mask corresponding gic interrupt controller bit*/
+ irq_shutdown(desc);
+ return IRQ_HANDLED;
+}
+
+static int tas2562_runtime_suspend(struct tas2562_priv *pTAS2562)
+{
+ dev_dbg(pTAS2562->dev, "%s\n", __func__);
+
+ pTAS2562->mbRuntimeSuspend = true;
+
+ if (hrtimer_active(&pTAS2562->mtimer)) {
+ dev_dbg(pTAS2562->dev, "cancel die temp timer\n");
+ hrtimer_cancel(&pTAS2562->mtimer);
+ }
+
+ if (delayed_work_pending(&pTAS2562->irq_work)) {
+ dev_dbg(pTAS2562->dev, "cancel IRQ work\n");
+ cancel_delayed_work_sync(&pTAS2562->irq_work);
+ }
+
+ return 0;
+}
+
+static int tas2562_runtime_resume(struct tas2562_priv *pTAS2562)
+{
+ dev_dbg(pTAS2562->dev, "%s\n", __func__);
+
+ if (pTAS2562->mbPowerUp) {
+/* if (!hrtimer_active(&pTAS2562->mtimer)) {
+ dev_dbg(pTAS2562->dev, "%s, start check timer\n", __func__);
+ hrtimer_start(&pTAS2562->mtimer,
+ ns_to_ktime((u64)CHECK_PERIOD * NSEC_PER_MSEC),
+ HRTIMER_MODE_REL);
+ }
+*/
+ }
+
+ pTAS2562->mbRuntimeSuspend = false;
+
+ return 0;
+}
+
+static int tas2562_parse_dt(struct device *dev, struct tas2562_priv *pTAS2562)
+{
+ struct device_node *np = dev->of_node;
+ int rc = 0, ret = 0;
+
+ u32 debounceInfo[2] = { 0, 0 };
+ rc = of_property_read_u32(np, "ti,asi-format", &pTAS2562->mnASIFormat);
+ if (rc) {
+ dev_err(pTAS2562->dev, "Looking up %s property in node %s failed %d\n",
+ "ti,asi-format", np->full_name, rc);
+ } else {
+ dev_dbg(pTAS2562->dev, "ti,asi-format=%d",
+ pTAS2562->mnASIFormat);
+ }
+
+ pTAS2562->mnResetGPIO = of_get_named_gpio(np, "ti,reset-gpio", 0);
+ if (!gpio_is_valid(pTAS2562->mnResetGPIO)) {
+ dev_err(pTAS2562->dev, "Looking up %s property in node %s failed %d\n",
+ "ti,reset-gpio", np->full_name, pTAS2562->mnResetGPIO);
+ } else {
+ dev_dbg(pTAS2562->dev, "ti,reset-gpio=%d",
+ pTAS2562->mnResetGPIO);
+ }
+
+ of_property_read_u32_array(np, "debounce",
+ debounceInfo, ARRAY_SIZE(debounceInfo));
+ gpio_set_debounce(37, debounceInfo[1]);
+ pTAS2562->mnIRQGPIO = of_get_named_gpio(np, "ti,irq-gpio", 0);
+ if (!gpio_is_valid(pTAS2562->mnIRQGPIO)) {
+ dev_err(pTAS2562->dev, "Looking up %s property in node %s failed %d\n",
+ "ti,irq-gpio", np->full_name, pTAS2562->mnIRQGPIO);
+ } else {
+ dev_dbg(pTAS2562->dev, "ti,irq-gpio=%d", pTAS2562->mnIRQGPIO);
+ }
+
+ return ret;
+}
+
+static int tas2562_i2c_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct tas2562_priv *pTAS2562;
+ int nResult;
+
+ //struct pinctrl *pinctrl;
+ //struct pinctrl_state *pin_state;
+ dev_info(&client->dev, "%s enter\n", __func__);
+
+ pTAS2562 = devm_kzalloc(&client->dev,
+ sizeof(struct tas2562_priv), GFP_KERNEL);
+ if (pTAS2562 == NULL) {
+ nResult = -ENOMEM;
+ goto end;
+ }
+
+ pTAS2562->dev = &client->dev;
+ i2c_set_clientdata(client, pTAS2562);
+ dev_set_drvdata(&client->dev, pTAS2562);
+
+ pTAS2562->regmap = devm_regmap_init_i2c(client, &tas2562_i2c_regmap);
+ if (IS_ERR(pTAS2562->regmap)) {
+ nResult = PTR_ERR(pTAS2562->regmap);
+ dev_err(&client->dev, "Failed to allocate register map: %d\n",
+ nResult);
+ goto end;
+ }
+#if 0
+pinctrl = devm_pinctrl_get(&client->dev);
+if (IS_ERR(pinctrl)) {
+ dev_err(&client->dev,
+ "Unable to acquire pinctrl: Error = %lu",
+ (unsigned long)pinctrl);
+} else {
+ /* Configure GPIO interrupt pin */
+ pin_state = pinctrl_lookup_state(pinctrl, "ti_int");
+ pinctrl_select_state(pinctrl, pin_state);
+}
+#endif
+/* TODO */
+ if (client->dev.of_node)
+ tas2562_parse_dt(&client->dev, pTAS2562);
+
+ if (gpio_is_valid(pTAS2562->mnResetGPIO)) {
+ nResult = gpio_request(pTAS2562->mnResetGPIO, "TAS2562_RESET");
+ if (nResult) {
+ dev_err(pTAS2562->dev, "%s: Failed to request gpio %d\n",
+ __func__, pTAS2562->mnResetGPIO);
+ nResult = -EINVAL;
+ goto free_gpio;
+ }
+ }
+#if 0
+ if (gpio_is_valid(pTAS2562->mnIRQGPIO)) {
+ nResult = gpio_request(pTAS2562->mnIRQGPIO, "TAS2562-IRQ");
+ if (nResult < 0) {
+ dev_err(pTAS2562->dev, "%s: GPIO %d request error\n",
+ __func__, pTAS2562->mnIRQGPIO);
+ goto free_gpio;
+ }
+ gpio_direction_input(pTAS2562->mnIRQGPIO);
+#endif
+if (gpio_is_valid(pTAS2562->mnIRQGPIO)) {
+ nResult = devm_gpio_request_one(&client->dev, pTAS2562->mnIRQGPIO,
+ GPIOF_DIR_IN, "TAS2562_INT");
+
+ if (nResult < 0) {
+ dev_err(pTAS2562->dev, "%s: GPIO %d request error\n",
+ __func__, pTAS2562->mnIRQGPIO);
+ goto free_gpio;
+ }
+
+ pTAS2562->mnIRQ = gpio_to_irq(pTAS2562->mnIRQGPIO);
+ dev_dbg(pTAS2562->dev, "irq = %d\n", pTAS2562->mnIRQ);
+ nResult =devm_request_threaded_irq(&client->dev, pTAS2562->mnIRQ,
+ NULL, tas2562_irq_handler, IRQF_TRIGGER_FALLING|IRQF_ONESHOT,
+ client->name, pTAS2562);
+ if (nResult < 0) {
+ dev_err(pTAS2562->dev,
+ "request_irq failed, %d\n", nResult);
+ goto free_gpio;
+ }
+ //disable_irq_nosync(pTAS2562->mnIRQ);
+ enable_irq(pTAS2562->mnIRQ);
+ INIT_DELAYED_WORK(&pTAS2562->irq_work, irq_work_routine);
+ }
+
+ pTAS2562->read = tas2562_dev_read;
+ pTAS2562->write = tas2562_dev_write;
+ pTAS2562->bulk_read = tas2562_dev_bulk_read;
+ pTAS2562->bulk_write = tas2562_dev_bulk_write;
+ pTAS2562->update_bits = tas2562_dev_update_bits;
+ pTAS2562->hw_reset = tas2562_hw_reset;
+ pTAS2562->enableIRQ = tas2562_enableIRQ;
+ //pTAS2562->clearIRQ = tas2562_clearIRQ;
+ pTAS2562->runtime_suspend = tas2562_runtime_suspend;
+ pTAS2562->runtime_resume = tas2562_runtime_resume;
+ mutex_init(&pTAS2562->dev_lock);
+ if (nResult < 0)
+ goto destroy_mutex;
+
+ nResult = tas2562_dev_write(pTAS2562, TAS2562_InterruptConfiguration, 0x00);
+ if (nResult < 0)
+ pr_err("Write TAS2562_InterruptConfiguration failed\n");
+#ifdef CONFIG_TAS2562_CODEC
+ mutex_init(&pTAS2562->codec_lock);
+ tas2562_register_codec(pTAS2562);
+#endif
+
+#ifdef CONFIG_TAS2562_MISC
+ mutex_init(&pTAS2562->file_lock);
+ tas2562_register_misc(pTAS2562);
+#endif
+
+ hrtimer_init(&pTAS2562->mtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
+ pTAS2562->mtimer.function = timer_func;
+
+destroy_mutex:
+ if (nResult < 0)
+ mutex_destroy(&pTAS2562->dev_lock);
+
+free_gpio:
+ if (nResult < 0) {
+ if (gpio_is_valid(pTAS2562->mnResetGPIO))
+ gpio_free(pTAS2562->mnResetGPIO);
+ if (gpio_is_valid(pTAS2562->mnIRQGPIO))
+ gpio_free(pTAS2562->mnIRQGPIO);
+ }
+
+end:
+ return nResult;
+}
+
+static int tas2562_i2c_remove(struct i2c_client *client)
+{
+ struct tas2562_priv *pTAS2562 = i2c_get_clientdata(client);
+
+ dev_info(pTAS2562->dev, "%s\n", __func__);
+
+#ifdef CONFIG_TAS2562_CODEC
+ tas2562_deregister_codec(pTAS2562);
+ mutex_destroy(&pTAS2562->codec_lock);
+#endif
+
+#ifdef CONFIG_TAS2562_MISC
+ tas2562_deregister_misc(pTAS2562);
+ mutex_destroy(&pTAS2562->file_lock);
+#endif
+
+ if (gpio_is_valid(pTAS2562->mnResetGPIO))
+ gpio_free(pTAS2562->mnResetGPIO);
+ if (gpio_is_valid(pTAS2562->mnIRQGPIO))
+ gpio_free(pTAS2562->mnIRQGPIO);
+
+ return 0;
+}
+
+
+static const struct i2c_device_id tas2562_i2c_id[] = {
+ { "tas2562", 0},
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, tas2562_i2c_id);
+
+#if defined(CONFIG_OF)
+static const struct of_device_id tas2562_of_match[] = {
+ { .compatible = "ti,tas2562" },
+ {},
+};
+MODULE_DEVICE_TABLE(of, tas2562_of_match);
+#endif
+
+
+static struct i2c_driver tas2562_i2c_driver = {
+ .driver = {
+ .name = "tas2562",
+ .owner = THIS_MODULE,
+#if defined(CONFIG_OF)
+ .of_match_table = of_match_ptr(tas2562_of_match),
+#endif
+ },
+ .probe = tas2562_i2c_probe,
+ .remove = tas2562_i2c_remove,
+ .id_table = tas2562_i2c_id,
+};
+
+module_i2c_driver(tas2562_i2c_driver);
+
+MODULE_AUTHOR("Texas Instruments Inc.");
+MODULE_DESCRIPTION("TAS2562 I2C Smart Amplifier driver");
+MODULE_LICENSE("GPL v2");
+#endif
diff --git a/tas2562.h b/tas2562.h
--- /dev/null
+++ b/tas2562.h
@@ -0,0 +1,770 @@
+
+#ifndef __TAS2562_
+#define __TAS2562_
+
+
+/* Book Control Register (available in page0 of each book) */
+#define TAS2562_BOOKCTL_PAGE 0
+#define TAS2562_BOOKCTL_REG 127
+
+#define TAS2562_REG(page, reg) ((page * 128) + reg)
+
+ /* Page */
+#define TAS2562_Page TAS2562_REG(0X0, 0x00)
+#define TAS2562_Page_Page_Mask (0xff << 0)
+
+
+#define TAS2562_BOOK_ID(reg) (reg / (256 * 128))
+
+#define TAS2562_PAGE_ID(reg) ((reg % (256 * 128)) / 128)
+
+#define TAS2562_BOOK_REG(reg) (reg % (256 * 128))
+
+#define TAS2562_PAGE_REG(reg) ((reg % (256 * 128)) % 128)
+
+
+ /* Software Reset */
+#define TAS2562_SoftwareReset TAS2562_REG(0X0, 0x01)
+#define TAS2562_SoftwareReset_SoftwareReset_Mask (0x1 << 0),
+#define TAS2562_SoftwareReset_SoftwareReset_DontReset (0x0 << 0)
+#define TAS2562_SoftwareReset_SoftwareReset_Reset (0x1 << 0)
+
+ /* Power Control */
+#define TAS2562_PowerControl TAS2562_REG(0X0, 0x02)
+#define TAS2562_PowerControl_ISNSPower_Mask (0x1 << 3)
+#define TAS2562_PowerControl_ISNSPower_Active (0x0 << 3)
+#define TAS2562_PowerControl_ISNSPower_PoweredDown (0x1 << 3)
+#define TAS2562_PowerControl_VSNSPower_Mask (0x1 << 2)
+#define TAS2562_PowerControl_VSNSPower_Active (0x0 << 2)
+#define TAS2562_PowerControl_VSNSPower_PoweredDown (0x1 << 2)
+#define TAS2562_PowerControl_OperationalMode10_Mask (0x3 << 0)
+#define TAS2562_PowerControl_OperationalMode10_Active (0x0 << 0)
+#define TAS2562_PowerControl_OperationalMode10_Mute (0x1 << 0)
+#define TAS2562_PowerControl_OperationalMode10_Shutdown (0x2 << 0)
+
+ /* data format */
+#define TAS2562_DATAFORMAT_SHIFT 2
+#define TAS2562_DATAFORMAT_I2S 0x0
+#define TAS2562_DATAFORMAT_DSP 0x1
+#define TAS2562_DATAFORMAT_RIGHT_J 0x2
+#define TAS2562_DATAFORMAT_LEFT_J 0x3
+
+#define TAS2562_DAI_FMT_MASK (0x7 << TAS2562_DATAFORMAT_SHIFT)
+
+ /* Playback Configuration Reg0 */
+#define TAS2562_PlaybackConfigurationReg0 TAS2562_REG(0X0, 0x03)
+#define TAS2562_PlaybackConfigurationReg0_PDMPinMapping_Mask (0x1 << 7)
+#define TAS2562_PlaybackConfigurationReg0_PDMPinMapping_Pdm0 (0x0 << 7)
+#define TAS2562_PlaybackConfigurationReg0_PDMPinMapping_Pdm1 (0x1 << 7)
+#define TAS2562_PlaybackConfigurationReg0_PlaybackPDMSource_Mask (0x1 << 6)
+#define TAS2562_PlaybackConfigurationReg0_PlaybackSource_Mask (0x1 << 5)
+#define TAS2562_PlaybackConfigurationReg0_PlaybackSource_Pcm (0x0 << 5)
+#define TAS2562_PlaybackConfigurationReg0_PlaybackSource_Pdm (0x1 << 5)
+#define TAS2562_PlaybackConfigurationReg0_AmplifierLevel40_Mask (0x1f << 0)
+
+ /* Playback Configuration Reg1 */
+#define TAS2562_PlaybackConfigurationReg1 TAS2562_REG(0X0, 0x04)
+#define TAS2562_PlaybackConfigurationReg1_HPFFrequency20_Mask (0x7 << 0)
+#define TAS2562_PlaybackConfigurationReg1_HPFFrequency20_2 (0x1 << 0)
+#define TAS2562_PlaybackConfigurationReg1_HPFFrequency20_50 (0x2 << 0)
+#define TAS2562_PlaybackConfigurationReg1_HPFFrequency20_100 (0x3 << 0)
+#define TAS2562_PlaybackConfigurationReg1_HPFFrequency20_200 (0x4 << 0)
+#define TAS2562_PlaybackConfigurationReg1_HPFFrequency20_400 (0x5 << 0)
+#define TAS2562_PlaybackConfigurationReg1_HPFFrequency20_800 (0x6 << 0)
+#define TAS2562_PlaybackConfigurationReg1_HPFFrequency20_Bypass (0x0 << 0)
+
+ /* Playback Configuration Reg2 */
+#define TAS2562_PlaybackConfigurationReg2 TAS2562_REG(0X0, 0x05)
+#define TAS2562_PlaybackConfigurationReg2_DVCPCM70_Mask (0xff << 0)
+
+ /* Playback Configuration Reg3 */
+#define TAS2562_PlaybackConfigurationReg3 TAS2562_REG(0X0, 0x06)
+#define TAS2562_PlaybackConfigurationReg3_DVCPDM70_Mask (0xff << 0)
+
+ /* Misc Configuration Reg0 */
+#define TAS2562_MiscConfigurationReg0 TAS2562_REG(0X0, 0x04)
+#define TAS2562_MiscConfigurationReg0_DVCRampRate76_Mask (0x3 << 6)
+#define TAS2562_MiscConfigurationReg0_DVCRampRate76_0_5dbPer1Sample (0x0 << 6)
+#define TAS2562_MiscConfigurationReg0_DVCRampRate76_0_5dbPer4Sample (0x1 << 6)
+#define TAS2562_MiscConfigurationReg0_DVCRampRate76_0_5dbPer8Sample (0x2 << 6)
+#define TAS2562_MiscConfigurationReg0_DVCRampRate76_VolRampDisabled (0x3 << 6)
+#define TAS2562_MiscConfigurationReg0_OCERetry_Mask (0x1 << 5)
+#define TAS2562_MiscConfigurationReg0_OCERetry_DoNotRetry (0x0 << 5)
+#define TAS2562_MiscConfigurationReg0_OCERetry_Retry (0x1 << 5)
+#define TAS2562_MiscConfigurationReg0_OTERetry_Mask (0x1 << 4)
+#define TAS2562_MiscConfigurationReg0_OTERetry_DoNotRetry (0x0 << 4)
+#define TAS2562_MiscConfigurationReg0_OTERetry_Retry (0x1 << 4)
+#define TAS2562_MiscConfigurationReg0_IRQZPull_Mask (0x1 << 3)
+#define TAS2562_MiscConfigurationReg0_IRQZPull_Disabled (0x0 << 3)
+#define TAS2562_MiscConfigurationReg0_IRQZPull_Enabled (0x1 << 3)
+#define TAS2562_MiscConfigurationReg0_AMPSS_Mask (0x1 << 2)
+#define TAS2562_MiscConfigurationReg0_AMPSS_Disabled (0x0 << 2)
+#define TAS2562_MiscConfigurationReg0_AMPSS_Enabled (0x1 << 2)
+
+ /* PDM Input Reg0 */
+#define TAS2562_PDMInputReg0 TAS2562_REG(0X0, 0x08)
+#define TAS2562_PDMInputReg0_ClassDSYNC_Mask (0x1 << 6)
+#define TAS2562_PDMInputReg0_ClassDSYNC_AsyncMode (0x0 << 6)
+#define TAS2562_PDMInputReg0_ClassDSYNC_Retry (0x1 << 6),
+#define TAS2562_PDMInputReg0_PDMRATESW54_Mask (0x3 << 4)
+#define TAS2562_PDMInputReg0_PDMRATED132_Mask (0x3 << 2)
+#define TAS2562_PDMInputReg0_PDMRATED132_2_543_38MHz (0x0 << 2)
+#define TAS2562_PDMInputReg0_PDMRATED132_5_086_76MHz (0x1 << 2)
+#define TAS2562_PDMInputReg0_PDMRATED010_Mask (0x3 << 0)
+#define TAS2562_PDMInputReg0_PDMRATED010_2_543_38MHz (0x0 << 0)
+#define TAS2562_PDMInputReg0_PDMRATED010_5_086_76MHz (0x1 << 0)
+
+ /* PDM Configuration Reg1 */
+#define TAS2562_PDMConfigurationReg1 TAS2562_REG(0X0, 0x09)
+#define TAS2562_PDMConfigurationReg1_PDMEDGED1_Mask (0x1 << 7)
+#define TAS2562_PDMConfigurationReg1_PDMEDGED1_Rising (0x0 << 7)
+#define TAS2562_PDMConfigurationReg1_PDMEDGED1_Falling (0x1 << 7)
+#define TAS2562_PDMConfigurationReg1_PDMEDGED0_Mask (0x1 << 6)
+#define TAS2562_PDMConfigurationReg1_PDMEDGED0_Rising (0x0 << 6)
+#define TAS2562_PDMConfigurationReg1_PDMEDGED0_Falling (0x1 << 6)
+#define TAS2562_PDMConfigurationReg1_PDMSLVD1_Mask (0x1 << 5)
+#define TAS2562_PDMConfigurationReg1_PDMSLVD1_Slave (0x0 << 5)
+#define TAS2562_PDMConfigurationReg1_PDMSLVD1_Master (0x1 << 5)
+#define TAS2562_PDMConfigurationReg1_PDMSLVD0_Mask (0x1 << 4)
+#define TAS2562_PDMConfigurationReg1_PDMSLVD0_Slave (0x0 << 4)
+#define TAS2562_PDMConfigurationReg1_PDMSLVD0_Master (0x1 << 4)
+#define TAS2562_PDMConfigurationReg1_PDMCLKD1_Mask (0x1 << 3)
+#define TAS2562_PDMConfigurationReg1_PDMCLKD1_Pdmck0 (0x0 << 3)
+#define TAS2562_PDMConfigurationReg1_PDMCLKD1_Pdmck1 (0x1 << 3)
+#define TAS2562_PDMConfigurationReg1_PDMCLKD0_Mask (0x1 << 2)
+#define TAS2562_PDMConfigurationReg1_PDMCLKD0_Pdmck0 (0x0 << 2)
+#define TAS2562_PDMConfigurationReg1_PDMCLKD0_Pdmck1 (0x1 << 2)
+#define TAS2562_PDMConfigurationReg1_PDMGATED1_Mask (0x1 << 1)
+#define TAS2562_PDMConfigurationReg1_PDMGATED1_GatedOff (0x0 << 1)
+#define TAS2562_PDMConfigurationReg1_PDMGATED1_Active (0x1 << 1)
+#define TAS2562_PDMConfigurationReg1_PDMGATED0_Mask (0x1 << 0)
+#define TAS2562_PDMConfigurationReg1_PDMGATED0_GatedOff (0x0 << 0)
+#define TAS2562_PDMConfigurationReg1_PDMGATED0_Active (0x1 << 0)
+
+ /* TDM Configuration Reg0 */
+#define TAS2562_TDMConfigurationReg0 TAS2562_REG(0X0, 0x06)
+#define TAS2562_TDMConfigurationReg0_SAMPRATERAMP_Mask (0x1 << 5)
+#define TAS2562_TDMConfigurationReg0_SAMPRATERAMP_48KHz (0x0 << 5)
+#define TAS2562_TDMConfigurationReg0_SAMPRATERAMP_44_1KHz (0x1 << 5)
+#define TAS2562_TDMConfigurationReg0_DETECTSAMPRATE_Mask (0x1 << 4)
+#define TAS2562_TDMConfigurationReg0_DETECTSAMPRATE_Disabled (0x1 << 4)
+#define TAS2562_TDMConfigurationReg0_DETECTSAMPRATE_Enabled (0x0 << 4)
+#define TAS2562_TDMConfigurationReg0_SAMPRATE31_Mask (0x7 << 1)
+#define TAS2562_TDMConfigurationReg0_SAMPRATE31_44_1_48kHz (0x4 << 1)
+#define TAS2562_TDMConfigurationReg0_SAMPRATE31_88_2_96kHz (0x5 << 1)
+#define TAS2562_TDMConfigurationReg0_SAMPRATE31_176_4_192kHz (0x6 << 1)
+#define TAS2562_TDMConfigurationReg0_FRAMESTART_Mask (0x1 << 0)
+#define TAS2562_TDMConfigurationReg0_FRAMESTART_LowToHigh (0x0 << 0)
+#define TAS2562_TDMConfigurationReg0_FRAMESTART_HighToLow (0x1 << 0)
+
+ /* TDM Configuration Reg1 */
+#define TAS2562_TDMConfigurationReg1 TAS2562_REG(0X0, 0x07)
+#define TAS2562_TDMConfigurationReg1_RXJUSTIFY_Mask (0x1 << 6)
+#define TAS2562_TDMConfigurationReg1_RXJUSTIFY_Left (0x0 << 6)
+#define TAS2562_TDMConfigurationReg1_RXJUSTIFY_Right (0x1 << 6)
+#define TAS2562_TDMConfigurationReg1_RXOFFSET51_Mask (0x1f << 1)
+#define TAS2562_TDMConfigurationReg1_RXOFFSET51_Shift (1)
+#define TAS2562_TDMConfigurationReg1_RXEDGE_Mask (0x1 << 0)
+#define TAS2562_TDMConfigurationReg1_RXEDGE_Rising (0x0 << 0)
+#define TAS2562_TDMConfigurationReg1_RXEDGE_Falling (0x1 << 0)
+
+ /* TDM Configuration Reg2 */
+#define TAS2562_TDMConfigurationReg2 TAS2562_REG(0X0, 0x08)
+#define TAS2562_TDMConfigurationReg2_RXSCFG54_Mask (0x3 << 4)
+#define TAS2562_TDMConfigurationReg2_RXSCFG54_Mono_I2C (0x0 << 4),
+#define TAS2562_TDMConfigurationReg2_RXSCFG54_Mono_Left (0x1 << 4),
+#define TAS2562_TDMConfigurationReg2_RXSCFG54_Mono_Right (0x2 << 4)
+#define TAS2562_TDMConfigurationReg2_RXSCFG54_Stereo_DownMix (0x3 << 4)
+#define TAS2562_TDMConfigurationReg2_RXWLEN32_Mask (0x3 << 2)
+#define TAS2562_TDMConfigurationReg2_RXWLEN32_16Bits (0x0 << 2)
+#define TAS2562_TDMConfigurationReg2_RXWLEN32_20Bits (0x1 << 2)
+#define TAS2562_TDMConfigurationReg2_RXWLEN32_24Bits (0x2 << 2)
+#define TAS2562_TDMConfigurationReg2_RXWLEN32_32Bits (0x3 << 2)
+#define TAS2562_TDMConfigurationReg2_RXSLEN10_Mask (0x3 << 0)
+#define TAS2562_TDMConfigurationReg2_RXSLEN10_16Bits (0x0 << 0)
+#define TAS2562_TDMConfigurationReg2_RXSLEN10_24Bits (0x1 << 0)
+#define TAS2562_TDMConfigurationReg2_RXSLEN10_32Bits (0x2 << 0)
+
+ /* TDM Configuration Reg3 */
+#define TAS2562_TDMConfigurationReg3 TAS2562_REG(0X0, 0x09)
+#define TAS2562_TDMConfigurationReg3_RXSLOTRight74_Mask (0xf << 4)
+#define TAS2562_TDMConfigurationReg3_RXSLOTLeft30_Mask (0xf << 0)
+
+ /* TDM Configuration Reg4 */
+#define TAS2562_TDMConfigurationReg4 TAS2562_REG(0X0, 0x0A)
+#define TAS2562_TDMConfigurationReg4_TXKEEPER_Mask (0x1 << 5)
+#define TAS2562_TDMConfigurationReg4_TXKEEPER_Disable (0x0 << 5)
+#define TAS2562_TDMConfigurationReg4_TXKEEPER_Enable (0x1 << 5)
+#define TAS2562_TDMConfigurationReg4_TXFILL_Mask (0x1 << 4)
+#define TAS2562_TDMConfigurationReg4_TXFILL_Transmit0 (0x0 << 4)
+#define TAS2562_TDMConfigurationReg4_TXFILL_TransmitHiz (0x1 << 4)
+#define TAS2562_TDMConfigurationReg4_TXOFFSET31_Mask (0x7 << 1)
+#define TAS2562_TDMConfigurationReg4_TXEDGE_Mask (0x1 << 0)
+#define TAS2562_TDMConfigurationReg4_TXEDGE_Rising (0x0 << 0)
+#define TAS2562_TDMConfigurationReg4_TXEDGE_Falling (0x1 << 0)
+
+ /* TDM Configuration Reg5 */
+#define TAS2562_TDMConfigurationReg5 TAS2562_REG(0X0, 0x0B)
+#define TAS2562_TDMConfigurationReg5_VSNSTX_Mask (0x1 << 6)
+#define TAS2562_TDMConfigurationReg5_VSNSTX_Disable (0x0 << 6),
+#define TAS2562_TDMConfigurationReg5_VSNSTX_Enable (0x1 << 6),
+#define TAS2562_TDMConfigurationReg5_VSNSSLOT50_Mask (0x3f << 0)
+
+ /* TDM Configuration Reg6 */
+#define TAS2562_TDMConfigurationReg6 TAS2562_REG(0X0, 0x0C)
+#define TAS2562_TDMConfigurationReg6_ISNSTX_Mask (0x1 << 6)
+#define TAS2562_TDMConfigurationReg6_ISNSTX_Disable (0x0 << 6),
+#define TAS2562_TDMConfigurationReg6_ISNSTX_Enable (0x1 << 6),
+#define TAS2562_TDMConfigurationReg6_ISNSSLOT50_Mask (0x3f << 0)
+
+ /* TDM Configuration Reg7 */
+#define TAS2562_TDMConfigurationReg7 TAS2562_REG(0X0, 0x11)
+#define TAS2562_TDMConfigurationReg7_PDMTX_Mask (0x1 << 6)
+#define TAS2562_TDMConfigurationReg7_PDMTX_Disable (0x0 << 6)
+#define TAS2562_TDMConfigurationReg7_PDMTX_Enable (0x1 << 6)
+#define TAS2562_TDMConfigurationReg7_PDMSLOT50_Mask (0x3f << 0)
+
+ /* TDM Configuration Reg8 */
+#define TAS2562_TDMConfigurationReg8 TAS2562_REG(0X0, 0x12)
+#define TAS2562_TDMConfigurationReg8_VBATSLEN_Mask (0x1 << 7)
+#define TAS2562_TDMConfigurationReg8_VBATSLEN_8Bits (0x0 << 7)
+#define TAS2562_TDMConfigurationReg8_VBATSLEN_16Bits (0x1 << 7)
+#define TAS2562_TDMConfigurationReg8_VBATTX_Mask (0x1 << 6)
+#define TAS2562_TDMConfigurationReg8_VBATTX_Disable (0x0 << 6)
+#define TAS2562_TDMConfigurationReg8_VBATTX_Enable (0x1 << 6)
+#define TAS2562_TDMConfigurationReg8_VBATSLOT50_Mask (0x3f << 0)
+
+ /* TDM Configuration Reg9 */
+#define TAS2562_TDMConfigurationReg9 TAS2562_REG(0X0, 0x13)
+#define TAS2562_TDMConfigurationReg9_TEMPTX_Mask (0x1 << 6)
+#define TAS2562_TDMConfigurationReg9_TEMPTX_Disable (0x0 << 6)
+#define TAS2562_TDMConfigurationReg9_TEMPTX_Enable (0x1 << 6)
+#define TAS2562_TDMConfigurationReg9_TEMPSLOT50_Mask (0x3f << 0)
+
+ /* TDM Configuration Reg10 */
+#define TAS2562_TDMConfigurationReg10 TAS2562_REG(0X0, 0x14)
+#define TAS2562_TDMConfigurationReg10_GAINTX_Mask (0x1 << 6)
+#define TAS2562_TDMConfigurationReg10_GAINTX_Disable (0x0 << 6)
+#define TAS2562_TDMConfigurationReg10_GAINTX_Enable (0x1 << 6)
+#define TAS2562_TDMConfigurationReg10_GAINSLOT50_Mask (0x3f << 0)
+
+ /* Limiter Configuration Reg0 */
+#define TAS2562_LimiterConfigurationReg0 TAS2562_REG(0X0, 0x15)
+#define TAS2562_LimiterConfigurationReg0_LIMATKST54_Mask (0x3 << 4)
+#define TAS2562_LimiterConfigurationReg0_LIMATKST54_1 (0x2 << 4)
+#define TAS2562_LimiterConfigurationReg0_LIMATKST54_2 (0x3 << 4)
+#define TAS2562_LimiterConfigurationReg0_LIMATKST54_0_25 (0x0 << 4)
+#define TAS2562_LimiterConfigurationReg0_LIMATKST54_0_5 (0x1 << 4)
+#define TAS2562_LimiterConfigurationReg0_LIMATKRT31_Mask (0x7 << 1)
+#define TAS2562_LimiterConfigurationReg0_LIMATKRT31_5 (0x0 << 1)
+#define TAS2562_LimiterConfigurationReg0_LIMATKRT31_10 (0x1 << 1)
+#define TAS2562_LimiterConfigurationReg0_LIMATKRT31_20 (0x2 << 1)
+#define TAS2562_LimiterConfigurationReg0_LIMATKRT31_40 (0x3 << 1)
+#define TAS2562_LimiterConfigurationReg0_LIMATKRT31_80 (0x4 << 1)
+#define TAS2562_LimiterConfigurationReg0_LIMATKRT31_160 (0x5 << 1)
+#define TAS2562_LimiterConfigurationReg0_LIMATKRT31_320 (0x6 << 1)
+#define TAS2562_LimiterConfigurationReg0_LIMATKRT31_640 (0x7 << 1)
+#define TAS2562_LimiterConfigurationReg0_LIMEN_Mask (0x1 << 0)
+#define TAS2562_LimiterConfigurationReg0_LIMEN_Disabled (0x0 << 0)
+#define TAS2562_LimiterConfigurationReg0_LIMEN_Enabled (0x1 << 0)
+
+ /* Limiter Configuration Reg1 */
+#define TAS2562_LimiterConfigurationReg1 TAS2562_REG(0X0, 0x16)
+#define TAS2562_LimiterConfigurationReg1_LIMRLSST76_Mask (0x3 << 6)
+#define TAS2562_LimiterConfigurationReg1_LIMRLSST76_1 (0x2 << 6)
+#define TAS2562_LimiterConfigurationReg1_LIMRLSST76_2 (0x3 << 6)
+#define TAS2562_LimiterConfigurationReg1_LIMRLSST76_0_25 (0x0 << 6)
+#define TAS2562_LimiterConfigurationReg1_LIMRLSST76_0_5 (0x1 << 6)
+#define TAS2562_LimiterConfigurationReg1_LIMRLSRT53_Mask (0x7 << 3)
+#define TAS2562_LimiterConfigurationReg1_LIMRLSRT53_10 (0x0 << 3)
+#define TAS2562_LimiterConfigurationReg1_LIMRLSRT53_50 (0x1 << 3)
+#define TAS2562_LimiterConfigurationReg1_LIMRLSRT53_100 (0x2 << 3)
+#define TAS2562_LimiterConfigurationReg1_LIMRLSRT53_250 (0x3 << 3)
+#define TAS2562_LimiterConfigurationReg1_LIMRLSRT53_500 (0x4 << 3)
+#define TAS2562_LimiterConfigurationReg1_LIMRLSRT53_750 (0x5 << 3)
+#define TAS2562_LimiterConfigurationReg1_LIMRLSRT53_1000 (0x6 << 3)
+#define TAS2562_LimiterConfigurationReg1_LIMRLSRT53_1500 (0x7 << 3)
+#define TAS2562_LimiterConfigurationReg1_LIMHLDTM20_Mask (0x7 << 0)
+#define TAS2562_LimiterConfigurationReg1_LIMHLDTM20_0 (0x0 << 0)
+#define TAS2562_LimiterConfigurationReg1_LIMHLDTM20_10 (0x1 << 0)
+#define TAS2562_LimiterConfigurationReg1_LIMHLDTM20_25 (0x2 << 0)
+#define TAS2562_LimiterConfigurationReg1_LIMHLDTM20_50 (0x3 << 0)
+#define TAS2562_LimiterConfigurationReg1_LIMHLDTM20_100 (0x4 << 0)
+#define TAS2562_LimiterConfigurationReg1_LIMHLDTM20_250 (0x5 << 0)
+#define TAS2562_LimiterConfigurationReg1_LIMHLDTM20_500 (0x6 << 0)
+#define TAS2562_LimiterConfigurationReg1_LIMHLDTM20_1000 (0x7 << 0)
+
+ /* Limiter Configuration Reg2 */
+#define TAS2562_LimiterConfigurationReg2 TAS2562_REG(0X0, 0x17)
+#define TAS2562_LimiterConfigurationReg2_LIMMAXATN40_Mask (0x1f << 0)
+
+ /* Limiter Configuration Reg3 */
+#define TAS2562_LimiterConfigurationReg3 TAS2562_REG(0X0, 0x18)
+#define TAS2562_LimiterConfigurationReg3_LIMTHMAX60_Mask (0x7f << 0)
+
+ /* Limiter Configuration Reg4 */
+#define TAS2562_LimiterConfigurationReg4 TAS2562_REG(0X0, 0x19)
+#define TAS2562_LimiterConfigurationReg4_LIMTHMIN60_Mask (0x7f << 0)
+
+ /* Limiter Configuration Reg5 */
+#define TAS2562_LimiterConfigurationReg5 TAS2562_REG(0X0, 0x1A)
+#define TAS2562_LimiterConfigurationReg5_LIMINFPOINT_Mask (0x7f << 0)
+
+ /* Brown Out Prevention Reg0 */
+#define TAS2562_BrownOutPreventionReg0 TAS2562_REG(0X0, 0x1B)
+#define TAS2562_BrownOutPreventionReg0_LIMSLOPE54_Mask (0x3 << 4)
+#define TAS2562_BrownOutPreventionReg0_LIMSLOPE54_1 (0x0 << 4)
+#define TAS2562_BrownOutPreventionReg0_LIMSLOPE54_2 (0x2 << 4)
+#define TAS2562_BrownOutPreventionReg0_LIMSLOPE54_4 (0x3 << 4)
+#define TAS2562_BrownOutPreventionReg0_LIMSLOPE54_1_5 (0x1 << 4)
+#define TAS2562_BrownOutPreventionReg0_BOPHLDCLR_Mask (0x1 << 3)
+#define TAS2562_BrownOutPreventionReg0_BOPHLDCLR_DontClear (0x0 << 3)
+#define TAS2562_BrownOutPreventionReg0_BOPHLDCLR_Clear (0x1 << 3)
+#define TAS2562_BrownOutPreventionReg0_BOPINFHLD_Mask (0x1 << 2)
+#define TAS2562_BrownOutPreventionReg0_BOPINFHLD_UseHoldTime (0x0 << 2)
+#define TAS2562_BrownOutPreventionReg0_BOPINFHLD_HoldUntilCleared (0x1 << 2)
+#define TAS2562_BrownOutPreventionReg0_BOPMUTE_Mask (0x1 << 1)
+#define TAS2562_BrownOutPreventionReg0_BOPMUTE_DoNotMute (0x0 << 1)
+#define TAS2562_BrownOutPreventionReg0_BOPMUTE_Mute (0x1 << 1)
+#define TAS2562_BrownOutPreventionReg0_BOPEN_Mask (0x1 << 0)
+#define TAS2562_BrownOutPreventionReg0_BOPEN_Disabled (0x0 << 0)
+#define TAS2562_BrownOutPreventionReg0_BOPEN_Enabled (0x1 << 0)
+
+ /* Brown Out Prevention Reg1 */
+#define TAS2562_BrownOutPreventionReg1 TAS2562_REG(0X0, 0x1C)
+#define TAS2562_BrownOutPreventionReg1_BOPTH70_Mask (0xff << 0)
+
+ /* Brown Out Prevention Reg2 */
+#define TAS2562_BrownOutPreventionReg2 TAS2562_REG(0X0, 0x1D)
+#define TAS2562_BrownOutPreventionReg2_BOPATKRT75_Mask (0x7 << 5)
+#define TAS2562_BrownOutPreventionReg2_BOPATKRT75_5 (0x0 << 5)
+#define TAS2562_BrownOutPreventionReg2_BOPATKRT75_10 (0x1 << 5)
+#define TAS2562_BrownOutPreventionReg2_BOPATKRT75_20 (0x2 << 5)
+#define TAS2562_BrownOutPreventionReg2_BOPATKRT75_40 (0x3 << 5)
+#define TAS2562_BrownOutPreventionReg2_BOPATKRT75_80 (0x4 << 5)
+#define TAS2562_BrownOutPreventionReg2_BOPATKRT75_160 (0x5 << 5)
+#define TAS2562_BrownOutPreventionReg2_BOPATKRT75_320 (0x6 << 5)
+#define TAS2562_BrownOutPreventionReg2_BOPATKRT75_640 (0x7 << 5)
+#define TAS2562_BrownOutPreventionReg2_BOPATKST43_Mask (0x3 << 3)
+#define TAS2562_BrownOutPreventionReg2_BOPATKST43_1 (0x1 << 3)
+#define TAS2562_BrownOutPreventionReg2_BOPATKST43_2 (0x3 << 3)
+#define TAS2562_BrownOutPreventionReg2_BOPATKST43_0_5 (0x0 << 3)
+#define TAS2562_BrownOutPreventionReg2_BOPATKST43_1_5 (0x2 << 3)
+#define TAS2562_BrownOutPreventionReg2_BOPHLDTM20_Mask (0x7 << 0)
+#define TAS2562_BrownOutPreventionReg2_BOPHLDTM20_0 (0x0 << 0)
+#define TAS2562_BrownOutPreventionReg2_BOPHLDTM20_10 (0x1 << 0)
+#define TAS2562_BrownOutPreventionReg2_BOPHLDTM20_25 (0x2 << 0)
+#define TAS2562_BrownOutPreventionReg2_BOPHLDTM20_50 (0x3 << 0)
+#define TAS2562_BrownOutPreventionReg2_BOPHLDTM20_100 (0x4 << 0)
+#define TAS2562_BrownOutPreventionReg2_BOPHLDTM20_250 (0x5 << 0)
+#define TAS2562_BrownOutPreventionReg2_BOPHLDTM20_500 (0x6 << 0)
+#define TAS2562_BrownOutPreventionReg2_BOPHLDTM20_1000 (0x7 << 0)
+
+ /* ICLA Reg0 */
+#define TAS2562_ICLAReg0 TAS2562_REG(0X0, 0x1E)
+#define TAS2562_ICLAReg0_ICLAUSEMAX_Mask (0x1 << 7)
+#define TAS2562_ICLAReg0_ICLAUSEMAX_Min (0x0 << 7)
+#define TAS2562_ICLAReg0_ICLAUSEMAX_Max (0x1 << 7)
+#define TAS2562_ICLAReg0_ICLASLOT61_Mask (0x3f << 1)
+#define TAS2562_ICLAReg0_ICLAEN_Mask (0x1 << 0)
+#define TAS2562_ICLAReg0_ICLAEN_Disabled (0x0 << 0)
+#define TAS2562_ICLAReg0_ICLAEN_Enabled (0x1 << 0)
+
+ /* ICLA Reg1 */
+#define TAS2562_ICLAReg1 TAS2562_REG(0X0, 0x1F)
+#define TAS2562_ICLAReg1_ICLASEN_Mask (0xff << 0)
+#define TAS2562_ICLAReg1_ICLASLOT_7_Disable (0x0 << 7)
+#define TAS2562_ICLAReg1_ICLASLOT_7_Enable (0x1 << 7)
+#define TAS2562_ICLAReg1_ICLASLOT_6_Disable (0x0 << 6)
+#define TAS2562_ICLAReg1_ICLASLOT_6_Enable (0x1 << 6)
+#define TAS2562_ICLAReg1_ICLASLOT_5_Disable (0x0 << 5)
+#define TAS2562_ICLAReg1_ICLASLOT_5_Enable (0x1 << 5)
+#define TAS2562_ICLAReg1_ICLASLOT_4_Disable (0x0 << 4)
+#define TAS2562_ICLAReg1_ICLASLOT_4_Enable (0x1 << 4)
+#define TAS2562_ICLAReg1_ICLASLOT_3_Disable (0x0 << 3)
+#define TAS2562_ICLAReg1_ICLASLOT_3_Enable (0x1 << 3)
+#define TAS2562_ICLAReg1_ICLASLOT_2_Disable (0x0 << 2)
+#define TAS2562_ICLAReg1_ICLASLOT_2_Enable (0x1 << 2)
+#define TAS2562_ICLAReg1_ICLASLOT_1_Disable (0x0 << 1)
+#define TAS2562_ICLAReg1_ICLASLOT_1_Enable (0x1 << 1)
+#define TAS2562_ICLAReg1_ICLASLOT_0_Disable (0x0 << 0)
+#define TAS2562_ICLAReg1_ICLASLOT_0_Enable (0x1 << 0)
+
+ /* Interrupt Mask Reg0 */
+#define TAS2562_InterruptMaskReg0 TAS2562_REG(0X0, 0x20)
+#define TAS2562_InterruptMaskReg0_LIMMUTEINTMASK_Mask (0x1 << 7)
+#define TAS2562_InterruptMaskReg0_LIMMUTEINTMASK_Unmask (0x0 << 7)
+#define TAS2562_InterruptMaskReg0_LIMMUTEINTMASK_Disable (0x1 << 7)
+#define TAS2562_InterruptMaskReg0_LIMINFHLDINTMASK_Mask (0x1 << 6)
+#define TAS2562_InterruptMaskReg0_LIMINFHLDINTMASK_Unmask (0x0 << 6)
+#define TAS2562_InterruptMaskReg0_LIMINFHLDINTMASK_Disable (0x1 << 6)
+#define TAS2562_InterruptMaskReg0_LIMMAXATNINTMASK_Mask (0x1 << 5)
+#define TAS2562_InterruptMaskReg0_LIMMAXATNINTMASK_Unmask (0x0 << 5)
+#define TAS2562_InterruptMaskReg0_LIMMAXATNINTMASK_Disable (0x1 << 5)
+#define TAS2562_InterruptMaskReg0_VBATLessthanINFINTMASK_Mask (0x1 << 4)
+#define TAS2562_InterruptMaskReg0_VBATLessthanINFINTMASK_Unmask (0x0 << 4)
+#define TAS2562_InterruptMaskReg0_VBATLessthanINFINTMASK_Disable (0x1 << 4)
+#define TAS2562_InterruptMaskReg0_LIMActiveFlagINTMASK_Mask (0x1 << 3)
+#define TAS2562_InterruptMaskReg0_LIMActiveFlagINTMASK_Unmask (0x0 << 3)
+#define TAS2562_InterruptMaskReg0_LIMActiveFlagINTMASK_Disable (0x1 << 3)
+#define TAS2562_InterruptMaskReg0_TDMClockErrorINTMASK_Mask (0x1 << 2)
+#define TAS2562_InterruptMaskReg0_TDMClockErrorINTMASK_Unmask (0x0 << 2)
+#define TAS2562_InterruptMaskReg0_TDMClockErrorINTMASK_Disable (0x1 << 2)
+#define TAS2562_InterruptMaskReg0_OCEINTMASK_Mask (0x1 << 1)
+#define TAS2562_InterruptMaskReg0_OCEINTMASK_Unmask (0x0 << 1)
+#define TAS2562_InterruptMaskReg0_OCEINTMASK_Disable (0x1 << 1)
+#define TAS2562_InterruptMaskReg0_OTEINTMASK_Mask (0x1 << 0)
+#define TAS2562_InterruptMaskReg0_OTEINTMASK_Unmask (0x0 << 0)
+#define TAS2562_InterruptMaskReg0_OTEINTMASK_Disable (0x1 << 0)
+
+ /* Interrupt Mask Reg1 */
+#define TAS2562_InterruptMaskReg1 TAS2562_REG(0X0, 0x21)
+#define TAS2562_InterruptMaskReg1_PDMAUDDATAINVALIDINTMASK_Mask (0x1 << 7)
+#define TAS2562_InterruptMaskReg1_PDMAUDDATAINVALIDINTMASK_Unmask (0x0 << 7)
+#define TAS2562_InterruptMaskReg1_PDMAUDDATAINVALIDINTMASK_Disable (0x1 << 7)
+#define TAS2562_InterruptMaskReg1_VBATOVLOINTMASK_Mask (0x1 << 3)
+#define TAS2562_InterruptMaskReg1_VBATOVLOINTMASK_Unmask (0x0 << 3)
+#define TAS2562_InterruptMaskReg1_VBATOVLOINTMASK_Disable (0x1 << 3)
+#define TAS2562_InterruptMaskReg1_VBATUVLOINTMASK_Mask (0x1 << 2)
+#define TAS2562_InterruptMaskReg1_VBATUVLOINTMASK_Unmask (0x0 << 2)
+#define TAS2562_InterruptMaskReg1_VBATUVLOINTMASK_Disable (0x1 << 2)
+#define TAS2562_InterruptMaskReg1_BrownOutFlagINTMASK_Mask (0x1 << 1)
+#define TAS2562_InterruptMaskReg1_BrownOutFlagINTMASK_Unmask (0x0 << 1)
+#define TAS2562_InterruptMaskReg1_BrownOutFlagINTMASK_Disable (0x1 << 1)
+#define TAS2562_InterruptMaskReg1_PDMClockErrorINTMASK_Mask (0x1 << 0)
+#define TAS2562_InterruptMaskReg1_PDMClockErrorINTMASK_Unmask (0x0 << 0)
+#define TAS2562_InterruptMaskReg1_PDMClockErrorINTMASK_Disable (0x1 << 0)
+
+ /* Live-Interrupt Reg0 */
+#define TAS2562_LiveInterruptReg0 TAS2562_REG(0X0, 0x22)
+#define TAS2562_LiveInterruptReg0_LIMMUTE_Mask (0x1 << 7)
+#define TAS2562_LiveInterruptReg0_LIMMUTE_NoInterrupt (0x0 << 7)
+#define TAS2562_LiveInterruptReg0_LIMMUTE_Interrupt (0x1 << 7)
+#define TAS2562_LiveInterruptReg0_LIMINFHLD_Mask (0x1 << 6)
+#define TAS2562_LiveInterruptReg0_LIMINFHLD_NoInterrupt (0x0 << 6)
+#define TAS2562_LiveInterruptReg0_LIMINFHLD_Interrupt (0x1 << 6)
+#define TAS2562_LiveInterruptReg0_LIMMAXATN_Mask (0x1 << 5)
+#define TAS2562_LiveInterruptReg0_LIMMAXATN_NoInterrupt (0x0 << 5)
+#define TAS2562_LiveInterruptReg0_LIMMAXATN_Interrupt (0x1 << 5)
+#define TAS2562_LiveInterruptReg0_VBATLessthanINF_Mask (0x1 << 4)
+#define TAS2562_LiveInterruptReg0_VBATLessthanINF_NoInterrupt (0x0 << 4)
+#define TAS2562_LiveInterruptReg0_VBATLessthanINF_Interrupt (0x1 << 4)
+#define TAS2562_LiveInterruptReg0_LIMActiveFlag_Mask (0x1 << 3)
+#define TAS2562_LiveInterruptReg0_LIMActiveFlag_NoInterrupt (0x0 << 3)
+#define TAS2562_LiveInterruptReg0_LIMActiveFlag_Interrupt (0x1 << 3)
+#define TAS2562_LiveInterruptReg0_TDMClockError_Mask (0x1 << 2)
+#define TAS2562_LiveInterruptReg0_TDMClockError_NoInterrupt (0x0 << 2)
+#define TAS2562_LiveInterruptReg0_TDMClockError_Interrupt (0x1 << 2)
+#define TAS2562_LiveInterruptReg0_OCEFlag_Mask (0x1 << 1)
+#define TAS2562_LiveInterruptReg0_OCEFlag_NoInterrupt (0x0 << 1)
+#define TAS2562_LiveInterruptReg0_OCEFlag_Interrupt (0x1 << 1)
+#define TAS2562_LiveInterruptReg0_OTEFlag_Mask (0x1 << 0)
+#define TAS2562_LiveInterruptReg0_OTEFlag_NoInterrupt (0x0 << 0)
+#define TAS2562_LiveInterruptReg0_OTEFlag_Interrupt (0x1 << 0)
+
+ /* Live-Interrupt Reg1 */
+#define TAS2562_LiveInterruptReg1 TAS2562_REG(0X0, 0x23)
+#define TAS2562_LiveInterruptReg1_PDMAUDDATAINVALID_Mask (0x1 << 7)
+#define TAS2562_LiveInterruptReg1_PDMAUDDATAINVALID_NoInterrupt (0x0 << 7)
+#define TAS2562_LiveInterruptReg1_PDMAUDDATAINVALID_Interrupt (0x1 << 7)
+#define TAS2562_LiveInterruptReg1_VBATOVLO_Mask (0x1 << 3)
+#define TAS2562_LiveInterruptReg1_VBATOVLO_NoInterrupt (0x0 << 3)
+#define TAS2562_LiveInterruptReg1_VBATOVLO_Interrupt (0x1 << 3)
+#define TAS2562_LiveInterruptReg1_VBATUVLO_Mask (0x1 << 2)
+#define TAS2562_LiveInterruptReg1_VBATUVLO_NoInterrupt (0x0 << 2)
+#define TAS2562_LiveInterruptReg1_VBATUVLO_Interrupt (0x1 << 2)
+#define TAS2562_LiveInterruptReg1_BrownOutFlag_Mask (0x1 << 1)
+#define TAS2562_LiveInterruptReg1_BrownOutFlag_NoInterrupt (0x0 << 1)
+#define TAS2562_LiveInterruptReg1_BrownOutFlag_Interrupt (0x1 << 1)
+#define TAS2562_LiveInterruptReg1_PDMClockError_Mask (0x1 << 0)
+#define TAS2562_LiveInterruptReg1_PDMClockError_NoInterrupt (0x0 << 0)
+#define TAS2562_LiveInterruptReg1_PDMClockError_Interrupt (0x1 << 0)
+
+ /* Latched-Interrupt Reg0 */
+#define TAS2562_LatchedInterruptReg0 TAS2562_REG(0X0, 0x24)
+#define TAS2562_LatchedInterruptReg0_LIMMUTESticky_Mask (0x1 << 7)
+#define TAS2562_LatchedInterruptReg0_LIMMUTESticky_NoInterrupt (0x0 << 7)
+#define TAS2562_LatchedInterruptReg0_LIMMUTESticky_Interrupt (0x1 << 7)
+#define TAS2562_LatchedInterruptReg0_LIMINFHLDSticky_Mask (0x1 << 6)
+#define TAS2562_LatchedInterruptReg0_LIMINFHLDSticky_NoInterrupt (0x0 << 6)
+#define TAS2562_LatchedInterruptReg0_LIMINFHLDSticky_Interrupt (0x1 << 6)
+#define TAS2562_LatchedInterruptReg0_LIMMAXATNSticky_Mask (0x1 << 5)
+#define TAS2562_LatchedInterruptReg0_LIMMAXATNSticky_NoInterrupt (0x0 << 5)
+#define TAS2562_LatchedInterruptReg0_LIMMAXATNSticky_Interrupt (0x1 << 5)
+#define TAS2562_LatchedInterruptReg0_VBATLessthanINFSticky_Mask (0x1 << 4)
+#define TAS2562_LatchedInterruptReg0_VBATLessthanINFSticky_NoInterrupt \
+ (0x0 << 4)
+#define TAS2562_LatchedInterruptReg0_VBATLessthanINFSticky_Interrupt (0x1 << 4)
+#define TAS2562_LatchedInterruptReg0_LIMActiveFlagSticky_Mask (0x1 << 3)
+#define TAS2562_LatchedInterruptReg0_LIMActiveFlagSticky_NoInterrupt (0x0 << 3)
+#define TAS2562_LatchedInterruptReg0_LIMActiveFlagSticky_Interrupt (0x1 << 3)
+#define TAS2562_LatchedInterruptReg0_TDMClockErrorSticky_Mask (0x1 << 2)
+#define TAS2562_LatchedInterruptReg0_TDMClockErrorSticky_NoInterrupt (0x0 << 2)
+#define TAS2562_LatchedInterruptReg0_TDMClockErrorSticky_Interrupt (0x1 << 2)
+#define TAS2562_LatchedInterruptReg0_OCEFlagSticky_Mask (0x1 << 1)
+#define TAS2562_LatchedInterruptReg0_OCEFlagSticky_NoInterrupt (0x0 << 1)
+#define TAS2562_LatchedInterruptReg0_OCEFlagSticky_Interrupt (0x1 << 1)
+#define TAS2562_LatchedInterruptReg0_OTEFlagSticky_Mask (0x1 << 0)
+#define TAS2562_LatchedInterruptReg0_OTEFlagSticky_NoInterrupt (0x0 << 0)
+#define TAS2562_LatchedInterruptReg0_OTEFlagSticky_Interrupt (0x1 << 0)
+
+ /* Latched-Interrupt Reg1 */
+#define TAS2562_LatchedInterruptReg1 TAS2562_REG(0X0, 0x25)
+#define TAS2562_LatchedInterruptReg1_PDMAUDDATAINVALIDSticky_Mask (0x1 << 7)
+#define TAS2562_LatchedInterruptReg1_PDMAUDDATAINVALIDSticky_NoInterrupt \
+ (0x0 << 7)
+#define TAS2562_LatchedInterruptReg1_PDMAUDDATAINVALIDSticky_Interrupt \
+ (0x1 << 7)
+#define TAS2562_LatchedInterruptReg1_VBATOVLOSticky_Mask (0x1 << 3)
+#define TAS2562_LatchedInterruptReg1_VBATOVLOSticky_NoInterrupt (0x0 << 3)
+#define TAS2562_LatchedInterruptReg1_VBATOVLOSticky_Interrupt (0x1 << 3)
+#define TAS2562_LatchedInterruptReg1_VBATUVLOSticky_Mask (0x1 << 2)
+#define TAS2562_LatchedInterruptReg1_VBATUVLOSticky_NoInterrupt (0x0 << 2)
+#define TAS2562_LatchedInterruptReg1_VBATUVLOSticky_Interrupt (0x1 << 2)
+#define TAS2562_LatchedInterruptReg1_BrownOutFlagSticky_Mask (0x1 << 1)
+#define TAS2562_LatchedInterruptReg1_BrownOutFlagSticky_NoInterrupt (0x0 << 1)
+#define TAS2562_LatchedInterruptReg1_BrownOutFlagSticky_Interrupt (0x1 << 1)
+#define TAS2562_LatchedInterruptReg1_PDMClockErrorSticky_Mask (0x1 << 0)
+#define TAS2562_LatchedInterruptReg1_PDMClockErrorSticky_NoInterrupt (0x0 << 0)
+#define TAS2562_LatchedInterruptReg1_PDMClockErrorSticky_Interrupt (0x1 << 0)
+
+ /* VBAT MSB */
+#define TAS2562_VBATMSB TAS2562_REG(0X0, 0x27)
+#define TAS2562_VBATMSB_VBATMSB70_Mask (0xff << 0)
+
+ /* VBAT LSB */
+#define TAS2562_VBATLSB TAS2562_REG(0X0, 0x28)
+#define TAS2562_VBATLSB_VBATLSB74_Mask (0xf << 4)
+
+ /* TEMP MSB */
+#define TAS2562_TEMPMSB TAS2562_REG(0X0, 0x29)
+#define TAS2562_TEMPMSB_TEMPMSB70_Mask (0xff << 0)
+
+ /* TEMP LSB */
+#define TAS2562_TEMPLSB TAS2562_REG(0X0, 0x2A)
+#define TAS2562_TEMPLSB_TEMPLSB74_Mask (0xf << 4)
+
+ /* SDZ Config */
+#define TAS2562_SDZCONFIG TAS2562_REG(0X0, 0x2F)
+#define TAS2562_SDZCONFIG_ICLANONZEROMIN_Mask (0x1 << 4)
+#define TAS2562_SDZCONFIG_ICLANONZEROMIN_Disable (0x0 << 4)
+#define TAS2562_SDZCONFIG_ICLANONZEROMIN_Enable (0x1 << 4)
+#define TAS2562_SDZCONFIG_SDZMODECONF_Mask (0x3 << 2)
+#define TAS2562_SDZCONFIG_SDZMODECONF_ForcedShutdownAfterTimeout (0x0 << 2)
+#define TAS2562_SDZCONFIG_SDZMODECONF_ForceShutdown (0x1 << 2)
+#define TAS2562_SDZCONFIG_SDZMODECONF_NormalShutdown (0x2 << 2)
+#define TAS2562_SDZCONFIG_SDZMODETIMEOUT_Mask (0x3 << 0)
+#define TAS2562_SDZCONFIG_SDZMODETIMEOUT_2ms (0x0 << 0)
+#define TAS2562_SDZCONFIG_SDZMODETIMEOUT_4ms (0x1 << 0)
+#define TAS2562_SDZCONFIG_SDZMODETIMEOUT_6ms (0x2 << 0)
+#define TAS2562_SDZCONFIG_SDZMODETIMEOUT_23p8ms (0x3 << 0)
+
+
+ /* Interrupt Configuration */
+#define TAS2562_InterruptConfiguration TAS2562_REG(0X0, 0x30)
+#define TAS2562_InterruptConfiguration_INTTHRUSW_Mask (0x1 << 2),
+#define TAS2562_InterruptConfiguration_INTTHRUSW_IntOnIRQZ (0x0 << 2)
+#define TAS2562_InterruptConfiguration_INTTHRUSW_IntFor2ms (0x1 << 2)
+#define TAS2562_InterruptConfiguration_PININTConfig10_Mask (0x3 << 0)
+#define TAS2562_InterruptConfiguration_PININTConfig10_AssertOnLiveInterrupts \
+ (0x0 << 0)
+#define \
+TAS2562_InterruptConfiguration_PININTConfig10_AssertOnLatchedInterrupts \
+ (0x1 << 0)
+#define \
+TAS2562_InterruptConfiguration_PININTConfig10_Assert2msOnLiveInterrupts \
+ (0x2 << 0)
+#define \
+TAS2562_InterruptConfiguration_PININTConfig10_Assert2msOnLatchedInterrupts \
+ (0x3 << 0)
+
+ /* Digital Input Pin Pull Down */
+#define TAS2562_DigitalInputPinPullDown TAS2562_REG(0X0, 0x31)
+#define TAS2562_DigitalInputPinPullDown_WKPulldownSDOUT_Mask (0x1 << 7)
+#define TAS2562_DigitalInputPinPullDown_WKPulldownSDOUT_Disabled (0x0 << 7)
+#define TAS2562_DigitalInputPinPullDown_WKPulldownSDOUT_Enabled (0x1 << 7)
+#define TAS2562_DigitalInputPinPullDown_WKPulldownSDIN_Mask (0x1 << 6)
+#define TAS2562_DigitalInputPinPullDown_WKPulldownSDIN_Disabled (0x0 << 6)
+#define TAS2562_DigitalInputPinPullDown_WKPulldownSDIN_Enabled (0x1 << 6)
+#define TAS2562_DigitalInputPinPullDown_WKPulldownFSYNC_Mask (0x1 << 5)
+#define TAS2562_DigitalInputPinPullDown_WKPulldownFSYNC_Disabled (0x0 << 5)
+#define TAS2562_DigitalInputPinPullDown_WKPulldownFSYNC_Enabled (0x1 << 5)
+#define TAS2562_DigitalInputPinPullDown_WKPulldownSBCLK_Mask (0x1 << 4)
+#define TAS2562_DigitalInputPinPullDown_WKPulldownSBCLK_Disabled (0x0 << 4)
+#define TAS2562_DigitalInputPinPullDown_WKPulldownSBCLK_Enabled (0x1 << 4)
+#define TAS2562_DigitalInputPinPullDown_WKPulldownPDMD0_Mask (0x1 << 3)
+#define TAS2562_DigitalInputPinPullDown_WKPulldownPDMD0_Disabled (0x0 << 3)
+#define TAS2562_DigitalInputPinPullDown_WKPulldownPDMD0_Enabled (0x1 << 3)
+#define TAS2562_DigitalInputPinPullDown_WKPulldownPDMD1_Mask (0x1 << 2)
+#define TAS2562_DigitalInputPinPullDown_WKPulldownPDMD1_Disabled (0x0 << 2)
+#define TAS2562_DigitalInputPinPullDown_WKPulldownPDMD1_Enabled (0x1 << 2)
+#define TAS2562_DigitalInputPinPullDown_WKPulldownPDMCK0_Mask (0x1 << 1)
+#define TAS2562_DigitalInputPinPullDown_WKPulldownPDMCK0_Disabled (0x0 << 1)
+#define TAS2562_DigitalInputPinPullDown_WKPulldownPDMCK0_Enabled (0x1 << 1)
+#define TAS2562_DigitalInputPinPullDown_WKPulldownPDMCK1_Mask (0x1 << 0)
+#define TAS2562_DigitalInputPinPullDown_WKPulldownPDMCK1_Disabled (0x0 << 0)
+#define TAS2562_DigitalInputPinPullDown_WKPulldownPDMCK1_Enabled (0x1 << 0)
+
+ /* Misc IRQ */
+#define TAS2562_MiscIRQ TAS2562_REG(0X0, 0x32)
+#define TAS2562_MiscIRQ_IRQZREQD_Mask (0x1 << 7)
+#define TAS2562_MiscIRQ_IRQZREQD_ActiveHigh (0x0 << 7)
+#define TAS2562_MiscIRQ_IRQZREQD_ActiveLow (0x1 << 7)
+#define TAS2562_MiscIRQ_IRQZBITBANG_Mask (0x1 << 0)
+#define TAS2562_MiscIRQ_IRQZBITBANG_IRQZInputBuf0 (0x0 << 0)
+#define TAS2562_MiscIRQ_IRQZBITBANG_IRQZInputBuf1 (0x1 << 0)
+
+
+ /* Clock Configuration */
+#define TAS2562_ClockConfiguration TAS2562_REG(0X0, 0x38)
+#define TAS2562_ClockConfiguration_SBCLKtoFS52_Mask (0xf << 2)
+#define TAS2562_ClockConfiguration_SBCLKtoFS52_16 (0x0 << 2)
+#define TAS2562_ClockConfiguration_SBCLKtoFS52_24 (0x1 << 2)
+#define TAS2562_ClockConfiguration_SBCLKtoFS52_32 (0x2 << 2)
+#define TAS2562_ClockConfiguration_SBCLKtoFS52_48 (0x3 << 2)
+#define TAS2562_ClockConfiguration_SBCLKtoFS52_64 (0x4 << 2)
+#define TAS2562_ClockConfiguration_SBCLKtoFS52_96 (0x5 << 2)
+#define TAS2562_ClockConfiguration_SBCLKtoFS52_128 (0x6 << 2)
+#define TAS2562_ClockConfiguration_SBCLKtoFS52_192 (0x7 << 2)
+#define TAS2562_ClockConfiguration_SBCLKtoFS52_256 (0x8 << 2)
+#define TAS2562_ClockConfiguration_SBCLKtoFS52_384 (0x9 << 2)
+#define TAS2562_ClockConfiguration_SBCLKtoFS52_512 (0xa << 2)
+#define TAS2562_ClockConfiguration_DISCLKRateDetect10_Mask (0x3 << 0)
+#define TAS2562_ClockConfiguration_DISCLKRateDetect10_Disabled (0x1 << 0)
+#define TAS2562_ClockConfiguration_DISCLKRateDetect10_Enabled (0x0 << 0)
+
+
+#define TAS2562_BDIVSelection_BCLKMaster TAS2562_REG(0X0, 0x3D)
+#define TAS2562_BDIVSelection_BCLKMaster_ClockSource10_Mask (0x3 << 0)
+#define TAS2562_BDIVSelection_BCLKMaster_ClockSource10_NDIV2Output (0x0 << 0)
+#define TAS2562_BDIVSelection_BCLKMaster_ClockSource10_NDIV1Output (0x1 << 0)
+#define TAS2562_BDIVSelection_BCLKMaster_ClockSource10_MCLKOutput (0x2 << 0)
+#define TAS2562_BDIVSelection_BCLKMaster_ClockSource10_PDMCLK1PAD (0x3 << 0)
+
+#define TAS2562_BDIVSelection_HOLDSARUPDATE TAS2562_REG(0X0, 0x41)
+#define TAS2562_BDIVSelection_HOLDSARUPDATE10_Mask (0x1 << 0)
+#define TAS2562_BDIVSelection_HOLDSARUPDATE10_Disabled (0x0 << 0)
+#define TAS2562_BDIVSelection_HOLDSARUPDATE10_Enabled (0x1 << 0)
+
+
+ /* TDM Clock detection monitor */
+#define TAS2562_TDMClockdetectionmonitor TAS2562_REG(0X0, 0x77)
+#define TAS2562_TDMClockdetectionmonitor_SBCLKtoFSYNC63_Mask (0xf << 3)
+#define TAS2562_TDMClockdetectionmonitor_SBCLKtoFSYNC63_16 (0x0 << 3)
+#define TAS2562_TDMClockdetectionmonitor_SBCLKtoFSYNC63_24 (0x1 << 3)
+#define TAS2562_TDMClockdetectionmonitor_SBCLKtoFSYNC63_32 (0x2 << 3)
+#define TAS2562_TDMClockdetectionmonitor_SBCLKtoFSYNC63_48 (0x3 << 3)
+#define TAS2562_TDMClockdetectionmonitor_SBCLKtoFSYNC63_64 (0x4 << 3)
+#define TAS2562_TDMClockdetectionmonitor_SBCLKtoFSYNC63_96 (0x5 << 3)
+#define TAS2562_TDMClockdetectionmonitor_SBCLKtoFSYNC63_128 (0x6 << 3)
+#define TAS2562_TDMClockdetectionmonitor_SBCLKtoFSYNC63_192 (0x7 << 3)
+#define TAS2562_TDMClockdetectionmonitor_SBCLKtoFSYNC63_256 (0x8 << 3)
+#define TAS2562_TDMClockdetectionmonitor_SBCLKtoFSYNC63_384 (0x9 << 3)
+#define TAS2562_TDMClockdetectionmonitor_SBCLKtoFSYNC63_512 (0xf << 3)
+#define TAS2562_TDMClockdetectionmonitor_DetectedSampleRate20_Mask (0x7 << 0),
+#define TAS2562_TDMClockdetectionmonitor_DetectedSampleRate20_8khz (0x0 << 0)
+#define TAS2562_TDMClockdetectionmonitor_DetectedSampleRate20_16khz (0x1 << 0)
+#define TAS2562_TDMClockdetectionmonitor_DetectedSampleRate20_32khz (0x2 << 0)
+#define TAS2562_TDMClockdetectionmonitor_DetectedSampleRate20_48khz (0x3 << 0)
+#define TAS2562_TDMClockdetectionmonitor_DetectedSampleRate20_96khz (0x4 << 0)
+#define TAS2562_TDMClockdetectionmonitor_DetectedSampleRate20_192khz (0x5 << 0)
+
+ /* Revision and PG ID */
+#define TAS2562_RevisionandPGID TAS2562_REG(0X0, 0x7D)
+#define TAS2562_RevisionandPGID_RevisionID74_Mask (0xf << 4)
+#define TAS2562_RevisionandPGID_PGID30_Mask (0xf << 0)
+
+ /* I2C Checksum */
+#define TAS2562_I2CChecksum TAS2562_REG(0X0, 0x7E)
+#define TAS2562_I2CChecksum_I2CChecksum70_Mask (0xff << 0)
+
+ /* Book */
+#define TAS2562_Book TAS2562_REG(0X0, 0x7F)
+#define TAS2562_Book_Book70_Mask (0xff << 0)
+
+
+#define TAS2562_RegisterCount 55
+
+#define ERROR_NONE 0x0000000
+#define ERROR_PLL_ABSENT 0x0000000
+#define ERROR_DEVA_I2C_COMM 0x0000000
+#define ERROR_DEVB_I2C_COMM 0x0000000
+#define ERROR_PRAM_CRCCHK 0x0000000
+#define ERROR_YRAM_CRCCHK 0x0000001
+#define ERROR_CLK_DET2 0x0000002
+#define ERROR_CLK_DET1 0x0000004
+#define ERROR_CLK_LOST 0x0000008
+#define ERROR_BROWNOUT 0x0000010
+#define ERROR_DIE_OVERTEMP 0x0000020
+#define ERROR_CLK_HALT 0x0000040
+#define ERROR_UNDER_VOLTAGE 0x0000080
+#define ERROR_OVER_CURRENT 0x0000100
+#define ERROR_CLASSD_PWR 0x0000200
+#define ERROR_FAILSAFE 0x4000000
+
+struct tas2562_register {
+int book;
+int page;
+int reg;
+};
+
+struct tas2562_dai_cfg {
+unsigned int dai_fmt;
+unsigned int tdm_delay;
+};
+
+struct tas2562_priv {
+struct device *dev;
+struct regmap *regmap;
+struct mutex dev_lock;
+struct delayed_work irq_work;
+struct hrtimer mtimer;
+int mnClkin;
+int mnClkid;
+bool mbPowerUp;
+int mnCurrentBook;
+int mnCurrentPage;
+int mnLoad;
+int mnASIFormat;
+int mnResetGPIO;
+int mnIRQGPIO;
+int mnIRQ;
+bool mbIRQEnable;
+int mnSamplingRate;
+int mnFrameSize;
+int mnPLL;
+int mnPPG;
+//Added 060356-PP
+int mnSlot_width;
+int ch_size;
+int (*read)(struct tas2562_priv *pTAS2562,
+ unsigned int reg, unsigned int *pValue);
+int (*write)(struct tas2562_priv *pTAS2562,
+ unsigned int reg, unsigned int Value);
+int (*bulk_read)(struct tas2562_priv *pTAS2562,
+ unsigned int reg, unsigned char *pData, unsigned int len);
+int (*bulk_write)(struct tas2562_priv *pTAS2562,
+ unsigned int reg, unsigned char *pData, unsigned int len);
+int (*update_bits)(struct tas2562_priv *pTAS2562,
+ unsigned int reg, unsigned int mask, unsigned int value);
+void (*hw_reset)(struct tas2562_priv *pTAS2562);
+void (*clearIRQ)(struct tas2562_priv *pTAS2562);
+void (*enableIRQ)(struct tas2562_priv *pTAS2562, bool enable);
+ /* device is working, but system is suspended */
+int (*runtime_suspend)(struct tas2562_priv *pTAS2562);
+int (*runtime_resume)(struct tas2562_priv *pTAS2562);
+bool mbRuntimeSuspend;
+
+unsigned int mnErrCode;
+#ifdef CONFIG_TAS2562_CODEC
+struct mutex codec_lock;
+#endif
+
+#ifdef CONFIG_TAS2562_MISC
+int mnDBGCmd;
+int mnCurrentReg;
+struct mutex file_lock;
+#endif
+};
+
+#endif /* __TAS2562_ */