2 #ifndef __TAS2563_
3 #define __TAS2563_
5 #define TAS2563_YRAM_BOOK1 140
7 #define TAS2563_YRAM1_PAGE 42
8 #define TAS2563_YRAM1_START_REG 88
9 #define TAS2563_YRAM1_END_REG 127
11 #define TAS2563_YRAM2_START_PAGE 43
12 #define TAS2563_YRAM2_END_PAGE 49
13 #define TAS2563_YRAM2_START_REG 8
14 #define TAS2563_YRAM2_END_REG 127
16 #define TAS2563_YRAM3_PAGE 50
17 #define TAS2563_YRAM3_START_REG 8
18 #define TAS2563_YRAM3_END_REG 27
20 /* should not include B0_P53_R44-R47 */
21 #define TAS2563_YRAM_BOOK2 0
22 #define TAS2563_YRAM4_START_PAGE 50
23 #define TAS2563_YRAM4_END_PAGE 60
24 #define TAS2563_YRAM4_START_REG 8
25 #define TAS2563_YRAM4_END_REG 127
27 #define TAS2563_YRAM5_PAGE 61
28 #define TAS2563_YRAM5_START_REG 8
29 #define TAS2563_YRAM5_END_REG 27
31 struct TYCRC {
32 unsigned char mnOffset;
33 unsigned char mnLen;
34 };
37 /* Book Control Register (available in page0 of each book) */
38 #define TAS2563_BOOKCTL_PAGE 0
39 #define TAS2563_BOOKCTL_REG 127
41 #define TAS2563_REG(book, page, reg) ((((unsigned int)book * 256 * 128) + \
42 ((unsigned int)page * 128)) + reg)
44 /* Page */
45 #define TAS2563_Page TAS2563_REG(0x0, 0x0, 0x00)
46 #define TAS2563_Page_Page_Mask (0xff << 0)
49 #define TAS2563_BOOK_ID(reg) (reg / (256 * 128))
51 #define TAS2563_PAGE_ID(reg) ((reg % (256 * 128)) / 128)
53 #define TAS2563_BOOK_REG(reg) (reg % (256 * 128))
55 #define TAS2563_PAGE_REG(reg) ((reg % (256 * 128)) % 128)
58 /* Software Reset */
59 #define TAS2563_SoftwareReset TAS2563_REG(0x0, 0X0, 0x01)
60 #define TAS2563_SoftwareReset_SoftwareReset_Mask (0x1 << 0),
61 #define TAS2563_SoftwareReset_SoftwareReset_DontReset (0x0 << 0)
62 #define TAS2563_SoftwareReset_SoftwareReset_Reset (0x1 << 0)
64 /* Power Control */
65 #define TAS2563_PowerControl TAS2563_REG(0x0, 0x0, 0x02)
66 #define TAS2563_PowerControl_ISNSPower_Mask (0x1 << 3)
67 #define TAS2563_PowerControl_ISNSPower_Active (0x0 << 3)
68 #define TAS2563_PowerControl_ISNSPower_PoweredDown (0x1 << 3)
69 #define TAS2563_PowerControl_VSNSPower_Mask (0x1 << 2)
70 #define TAS2563_PowerControl_VSNSPower_Active (0x0 << 2)
71 #define TAS2563_PowerControl_VSNSPower_PoweredDown (0x1 << 2)
72 #define TAS2563_PowerControl_OperationalMode10_Mask (0x3 << 0)
73 #define TAS2563_PowerControl_OperationalMode10_Active (0x0 << 0)
74 #define TAS2563_PowerControl_OperationalMode10_Mute (0x1 << 0)
75 #define TAS2563_PowerControl_OperationalMode10_Shutdown (0x2 << 0)
77 /* data format */
78 #define TAS2563_DATAFORMAT_SHIFT 2
79 #define TAS2563_DATAFORMAT_I2S 0x0
80 #define TAS2563_DATAFORMAT_DSP 0x1
81 #define TAS2563_DATAFORMAT_RIGHT_J 0x2
82 #define TAS2563_DATAFORMAT_LEFT_J 0x3
84 #define TAS2563_DAI_FMT_MASK (0x7 << TAS2563_DATAFORMAT_SHIFT)
86 /* Playback Configuration Reg0 */
87 #define TAS2563_PlaybackConfigurationReg0 TAS2563_REG(0x0, 0x0, 0x03)
88 #define TAS2563_PlaybackConfigurationReg0_PDMPinMapping_Mask (0x1 << 7)
89 #define TAS2563_PlaybackConfigurationReg0_PDMPinMapping_Pdm0 (0x0 << 7)
90 #define TAS2563_PlaybackConfigurationReg0_PDMPinMapping_Pdm1 (0x1 << 7)
91 #define TAS2563_PlaybackConfigurationReg0_PlaybackPDMSource_Mask (0x1 << 6)
92 #define TAS2563_PlaybackConfigurationReg0_PlaybackSource_Mask (0x1 << 5)
93 #define TAS2563_PlaybackConfigurationReg0_PlaybackSource_Pcm (0x0 << 5)
94 #define TAS2563_PlaybackConfigurationReg0_PlaybackSource_Pdm (0x1 << 5)
95 #define TAS2563_PlaybackConfigurationReg0_AmplifierLevel40_Mask (0x1f << 0)
97 /* Misc Configuration Reg0 */
98 #define TAS2563_MiscConfigurationReg0 TAS2563_REG(0x0, 0x0, 0x04)
99 #define TAS2563_MiscConfigurationReg0_DVCRampRate76_Mask (0x3 << 6)
100 #define TAS2563_MiscConfigurationReg0_DVCRampRate76_0_5dbPer1Sample (0x0 << 6)
101 #define TAS2563_MiscConfigurationReg0_DVCRampRate76_0_5dbPer4Sample (0x1 << 6)
102 #define TAS2563_MiscConfigurationReg0_DVCRampRate76_0_5dbPer8Sample (0x2 << 6)
103 #define TAS2563_MiscConfigurationReg0_DVCRampRate76_VolRampDisabled (0x3 << 6)
104 #define TAS2563_MiscConfigurationReg0_OCERetry_Mask (0x1 << 5)
105 #define TAS2563_MiscConfigurationReg0_OCERetry_DoNotRetry (0x0 << 5)
106 #define TAS2563_MiscConfigurationReg0_OCERetry_Retry (0x1 << 5)
107 #define TAS2563_MiscConfigurationReg0_OTERetry_Mask (0x1 << 4)
108 #define TAS2563_MiscConfigurationReg0_OTERetry_DoNotRetry (0x0 << 4)
109 #define TAS2563_MiscConfigurationReg0_OTERetry_Retry (0x1 << 4)
110 #define TAS2563_MiscConfigurationReg0_IRQZPull_Mask (0x1 << 3)
111 #define TAS2563_MiscConfigurationReg0_IRQZPull_Disabled (0x0 << 3)
112 #define TAS2563_MiscConfigurationReg0_IRQZPull_Enabled (0x1 << 3)
113 #define TAS2563_MiscConfigurationReg0_AMPSS_Mask (0x1 << 2)
114 #define TAS2563_MiscConfigurationReg0_AMPSS_Disabled (0x0 << 2)
115 #define TAS2563_MiscConfigurationReg0_AMPSS_Enabled (0x1 << 2)
118 /* TDM Configuration Reg0 */
119 #define TAS2563_TDMConfigurationReg0 TAS2563_REG(0x0, 0x0, 0x06)
120 #define TAS2563_TDMConfigurationReg0_SAMPRATERAMP_Mask (0x1 << 5)
121 #define TAS2563_TDMConfigurationReg0_SAMPRATERAMP_48KHz (0x0 << 5)
122 #define TAS2563_TDMConfigurationReg0_SAMPRATERAMP_44_1KHz (0x1 << 5)
123 #define TAS2563_TDMConfigurationReg0_DETECTSAMPRATE_Mask (0x1 << 4)
124 #define TAS2563_TDMConfigurationReg0_DETECTSAMPRATE_Disabled (0x1 << 4)
125 #define TAS2563_TDMConfigurationReg0_DETECTSAMPRATE_Enabled (0x0 << 4)
126 #define TAS2563_TDMConfigurationReg0_SAMPRATE31_Mask (0x7 << 1)
127 #define TAS2563_TDMConfigurationReg0_SAMPRATE31_44_1_48kHz (0x4 << 1)
128 #define TAS2563_TDMConfigurationReg0_SAMPRATE31_88_2_96kHz (0x5 << 1)
129 #define TAS2563_TDMConfigurationReg0_SAMPRATE31_176_4_192kHz (0x6 << 1)
130 #define TAS2563_TDMConfigurationReg0_FRAMESTART_Mask (0x1 << 0)
131 #define TAS2563_TDMConfigurationReg0_FRAMESTART_LowToHigh (0x0 << 0)
132 #define TAS2563_TDMConfigurationReg0_FRAMESTART_HighToLow (0x1 << 0)
134 /* TDM Configuration Reg1 */
135 #define TAS2563_TDMConfigurationReg1 TAS2563_REG(0x0, 0x0, 0x07)
136 #define TAS2563_TDMConfigurationReg1_RXJUSTIFY_Mask (0x1 << 6)
137 #define TAS2563_TDMConfigurationReg1_RXJUSTIFY_Left (0x0 << 6)
138 #define TAS2563_TDMConfigurationReg1_RXJUSTIFY_Right (0x1 << 6)
139 #define TAS2563_TDMConfigurationReg1_RXOFFSET51_Mask (0x1f << 1)
140 #define TAS2563_TDMConfigurationReg1_RXOFFSET51_Shift (1)
141 #define TAS2563_TDMConfigurationReg1_RXEDGE_Mask (0x1 << 0)
142 #define TAS2563_TDMConfigurationReg1_RXEDGE_Rising (0x0 << 0)
143 #define TAS2563_TDMConfigurationReg1_RXEDGE_Falling (0x1 << 0)
145 /* TDM Configuration Reg2 */
146 #define TAS2563_TDMConfigurationReg2 TAS2563_REG(0x0, 0x0, 0x08)
147 #define TAS2563_TDMConfigurationReg2_RXSCFG54_Mask (0x3 << 4)
148 #define TAS2563_TDMConfigurationReg2_RXSCFG54_Mono_I2C (0x0 << 4)
149 #define TAS2563_TDMConfigurationReg2_RXSCFG54_Mono_Left (0x1 << 4)
150 #define TAS2563_TDMConfigurationReg2_RXSCFG54_Mono_Right (0x2 << 4)
151 #define TAS2563_TDMConfigurationReg2_RXSCFG54_Stereo_DownMix (0x3 << 4)
152 #define TAS2563_TDMConfigurationReg2_RXWLEN32_Mask (0x3 << 2)
153 #define TAS2563_TDMConfigurationReg2_RXWLEN32_16Bits (0x0 << 2)
154 #define TAS2563_TDMConfigurationReg2_RXWLEN32_20Bits (0x1 << 2)
155 #define TAS2563_TDMConfigurationReg2_RXWLEN32_24Bits (0x2 << 2)
156 #define TAS2563_TDMConfigurationReg2_RXWLEN32_32Bits (0x3 << 2)
157 #define TAS2563_TDMConfigurationReg2_RXSLEN10_Mask (0x3 << 0)
158 #define TAS2563_TDMConfigurationReg2_RXSLEN10_16Bits (0x0 << 0)
159 #define TAS2563_TDMConfigurationReg2_RXSLEN10_24Bits (0x1 << 0)
160 #define TAS2563_TDMConfigurationReg2_RXSLEN10_32Bits (0x2 << 0)
162 /* TDM Configuration Reg3 */
163 #define TAS2563_TDMConfigurationReg3 TAS2563_REG(0x0, 0x0, 0x09)
164 #define TAS2563_TDMConfigurationReg3_RXSLOTRight74_Mask (0xf << 4)
165 #define TAS2563_TDMConfigurationReg3_RXSLOTRight74_Shift 4
166 #define TAS2563_TDMConfigurationReg3_RXSLOTLeft30_Mask (0xf << 0)
167 #define TAS2563_TDMConfigurationReg3_RXSLOTLeft30_Shift 0
169 /* TDM Configuration Reg4 */
170 #define TAS2563_TDMConfigurationReg4 TAS2563_REG(0x0, 0x0, 0x0a)
171 #define TAS2563_TDMConfigurationReg4_TXKEEPER_Mask (0x1 << 5)
172 #define TAS2563_TDMConfigurationReg4_TXKEEPER_Disable (0x0 << 5)
173 #define TAS2563_TDMConfigurationReg4_TXKEEPER_Enable (0x1 << 5)
174 #define TAS2563_TDMConfigurationReg4_TXFILL_Mask (0x1 << 4)
175 #define TAS2563_TDMConfigurationReg4_TXFILL_Transmit0 (0x0 << 4)
176 #define TAS2563_TDMConfigurationReg4_TXFILL_TransmitHiz (0x1 << 4)
177 #define TAS2563_TDMConfigurationReg4_TXOFFSET31_Mask (0x7 << 1)
178 #define TAS2563_TDMConfigurationReg4_TXEDGE_Mask (0x1 << 0)
179 #define TAS2563_TDMConfigurationReg4_TXEDGE_Rising (0x0 << 0)
180 #define TAS2563_TDMConfigurationReg4_TXEDGE_Falling (0x1 << 0)
182 /* TDM Configuration Reg5 */
183 #define TAS2563_TDMConfigurationReg5 TAS2563_REG(0x0, 0x0, 0x0b)
184 #define TAS2563_TDMConfigurationReg5_VSNSTX_Mask (0x1 << 6)
185 #define TAS2563_TDMConfigurationReg5_VSNSTX_Disable (0x0 << 6)
186 #define TAS2563_TDMConfigurationReg5_VSNSTX_Enable (0x1 << 6)
187 #define TAS2563_TDMConfigurationReg5_VSNSSLOT50_Mask (0x3f << 0)
189 /* TDM Configuration Reg6 */
190 #define TAS2563_TDMConfigurationReg6 TAS2563_REG(0x0, 0x0, 0xc)
191 #define TAS2563_TDMConfigurationReg6_ISNSTX_Mask (0x1 << 6)
192 #define TAS2563_TDMConfigurationReg6_ISNSTX_Disable (0x0 << 6)
193 #define TAS2563_TDMConfigurationReg6_ISNSTX_Enable (0x1 << 6)
194 #define TAS2563_TDMConfigurationReg6_ISNSSLOT50_Mask (0x3f << 0)
196 /* TDM Configuration Reg7 */
197 #define TAS2563_TDMConfigurationReg7 TAS2563_REG(0x0, 0x0, 0x0d)
198 #define TAS2563_TDMConfigurationReg7_PDMTX_Mask (0x1 << 6)
199 #define TAS2563_TDMConfigurationReg7_PDMTX_Disable (0x0 << 6)
200 #define TAS2563_TDMConfigurationReg7_PDMTX_Enable (0x1 << 6)
201 #define TAS2563_TDMConfigurationReg7_PDMSLOT50_Mask (0x3f << 0)
203 /* TDM Configuration Reg8 */
204 #define TAS2563_TDMConfigurationReg8 TAS2563_REG(0x0, 0x0, 0x0e)
205 #define TAS2563_TDMConfigurationReg8_VBATSLEN_Mask (0x1 << 7)
206 #define TAS2563_TDMConfigurationReg8_VBATSLEN_8Bits (0x0 << 7)
207 #define TAS2563_TDMConfigurationReg8_VBATSLEN_16Bits (0x1 << 7)
208 #define TAS2563_TDMConfigurationReg8_VBATTX_Mask (0x1 << 6)
209 #define TAS2563_TDMConfigurationReg8_VBATTX_Disable (0x0 << 6)
210 #define TAS2563_TDMConfigurationReg8_VBATTX_Enable (0x1 << 6)
211 #define TAS2563_TDMConfigurationReg8_VBATSLOT50_Mask (0x3f << 0)
213 /* TDM Configuration Reg9 */
214 #define TAS2563_TDMConfigurationReg9 TAS2563_REG(0x0, 0x0, 0xf)
215 #define TAS2563_TDMConfigurationReg9_TEMPTX_Mask (0x1 << 6)
216 #define TAS2563_TDMConfigurationReg9_TEMPTX_Disable (0x0 << 6)
217 #define TAS2563_TDMConfigurationReg9_TEMPTX_Enable (0x1 << 6)
218 #define TAS2563_TDMConfigurationReg9_TEMPSLOT50_Mask (0x3f << 0)
220 /* TDM Configuration Reg10 */
221 #define TAS2563_TDMConfigurationReg10 TAS2563_REG(0x0, 0x0, 0x10)
222 #define TAS2563_TDMConfigurationReg10_GAINTX_Mask (0x1 << 6)
223 #define TAS2563_TDMConfigurationReg10_GAINTX_Disable (0x0 << 6)
224 #define TAS2563_TDMConfigurationReg10_GAINTX_Enable (0x1 << 6)
225 #define TAS2563_TDMConfigurationReg10_GAINSLOT50_Mask (0x3f << 0)
227 /* Limiter Configuration Reg0 */
228 #define TAS2563_LimiterConfigurationReg0 TAS2563_REG(0x0, 0x0, 0x12)
229 #define TAS2563_LimiterConfigurationReg0_LIMATKST54_Mask (0x3 << 4)
230 #define TAS2563_LimiterConfigurationReg0_LIMATKST54_1 (0x2 << 4)
231 #define TAS2563_LimiterConfigurationReg0_LIMATKST54_2 (0x3 << 4)
232 #define TAS2563_LimiterConfigurationReg0_LIMATKST54_0_25 (0x0 << 4)
233 #define TAS2563_LimiterConfigurationReg0_LIMATKST54_0_5 (0x1 << 4)
234 #define TAS2563_LimiterConfigurationReg0_LIMATKRT31_Mask (0x7 << 1)
235 #define TAS2563_LimiterConfigurationReg0_LIMATKRT31_5 (0x0 << 1)
236 #define TAS2563_LimiterConfigurationReg0_LIMATKRT31_10 (0x1 << 1)
237 #define TAS2563_LimiterConfigurationReg0_LIMATKRT31_20 (0x2 << 1)
238 #define TAS2563_LimiterConfigurationReg0_LIMATKRT31_40 (0x3 << 1)
239 #define TAS2563_LimiterConfigurationReg0_LIMATKRT31_80 (0x4 << 1)
240 #define TAS2563_LimiterConfigurationReg0_LIMATKRT31_160 (0x5 << 1)
241 #define TAS2563_LimiterConfigurationReg0_LIMATKRT31_320 (0x6 << 1)
242 #define TAS2563_LimiterConfigurationReg0_LIMATKRT31_640 (0x7 << 1)
243 #define TAS2563_LimiterConfigurationReg0_LIMEN_Mask (0x1 << 0)
244 #define TAS2563_LimiterConfigurationReg0_LIMEN_Disabled (0x0 << 0)
245 #define TAS2563_LimiterConfigurationReg0_LIMEN_Enabled (0x1 << 0)
247 /* Limiter Configuration Reg1 */
248 #define TAS2563_LimiterConfigurationReg1 TAS2563_REG(0x0, 0x0, 0x13)
249 #define TAS2563_LimiterConfigurationReg1_LIMRLSST76_Mask (0x3 << 6)
250 #define TAS2563_LimiterConfigurationReg1_LIMRLSST76_1 (0x2 << 6)
251 #define TAS2563_LimiterConfigurationReg1_LIMRLSST76_2 (0x3 << 6)
252 #define TAS2563_LimiterConfigurationReg1_LIMRLSST76_0_25 (0x0 << 6)
253 #define TAS2563_LimiterConfigurationReg1_LIMRLSST76_0_5 (0x1 << 6)
254 #define TAS2563_LimiterConfigurationReg1_LIMRLSRT53_Mask (0x7 << 3)
255 #define TAS2563_LimiterConfigurationReg1_LIMRLSRT53_10 (0x0 << 3)
256 #define TAS2563_LimiterConfigurationReg1_LIMRLSRT53_50 (0x1 << 3)
257 #define TAS2563_LimiterConfigurationReg1_LIMRLSRT53_100 (0x2 << 3)
258 #define TAS2563_LimiterConfigurationReg1_LIMRLSRT53_250 (0x3 << 3)
259 #define TAS2563_LimiterConfigurationReg1_LIMRLSRT53_500 (0x4 << 3)
260 #define TAS2563_LimiterConfigurationReg1_LIMRLSRT53_750 (0x5 << 3)
261 #define TAS2563_LimiterConfigurationReg1_LIMRLSRT53_1000 (0x6 << 3)
262 #define TAS2563_LimiterConfigurationReg1_LIMRLSRT53_1500 (0x7 << 3)
263 #define TAS2563_LimiterConfigurationReg1_LIMHLDTM20_Mask (0x7 << 0)
264 #define TAS2563_LimiterConfigurationReg1_LIMHLDTM20_0 (0x0 << 0)
265 #define TAS2563_LimiterConfigurationReg1_LIMHLDTM20_10 (0x1 << 0)
266 #define TAS2563_LimiterConfigurationReg1_LIMHLDTM20_25 (0x2 << 0)
267 #define TAS2563_LimiterConfigurationReg1_LIMHLDTM20_50 (0x3 << 0)
268 #define TAS2563_LimiterConfigurationReg1_LIMHLDTM20_100 (0x4 << 0)
269 #define TAS2563_LimiterConfigurationReg1_LIMHLDTM20_250 (0x5 << 0)
270 #define TAS2563_LimiterConfigurationReg1_LIMHLDTM20_500 (0x6 << 0)
271 #define TAS2563_LimiterConfigurationReg1_LIMHLDTM20_1000 (0x7 << 0)
273 /* Brown Out Prevention Reg0 */
274 #define TAS2563_BrownOutPreventionReg0 TAS2563_REG(0x0, 0x0, 0x1B)
275 #define TAS2563_BrownOutPreventionReg0_LIMSLOPE54_Mask (0x3 << 4)
276 #define TAS2563_BrownOutPreventionReg0_LIMSLOPE54_1 (0x0 << 4)
277 #define TAS2563_BrownOutPreventionReg0_LIMSLOPE54_2 (0x2 << 4)
278 #define TAS2563_BrownOutPreventionReg0_LIMSLOPE54_4 (0x3 << 4)
279 #define TAS2563_BrownOutPreventionReg0_LIMSLOPE54_1_5 (0x1 << 4)
280 #define TAS2563_BrownOutPreventionReg0_BOPHLDCLR_Mask (0x1 << 3)
281 #define TAS2563_BrownOutPreventionReg0_BOPHLDCLR_DontClear (0x0 << 3)
282 #define TAS2563_BrownOutPreventionReg0_BOPHLDCLR_Clear (0x1 << 3)
283 #define TAS2563_BrownOutPreventionReg0_BOPINFHLD_Mask (0x1 << 2)
284 #define TAS2563_BrownOutPreventionReg0_BOPINFHLD_UseHoldTime (0x0 << 2)
285 #define TAS2563_BrownOutPreventionReg0_BOPINFHLD_HoldUntilCleared (0x1 << 2)
286 #define TAS2563_BrownOutPreventionReg0_BOPMUTE_Mask (0x1 << 1)
287 #define TAS2563_BrownOutPreventionReg0_BOPMUTE_DoNotMute (0x0 << 1)
288 #define TAS2563_BrownOutPreventionReg0_BOPMUTE_Mute (0x1 << 1)
289 #define TAS2563_BrownOutPreventionReg0_BOPEN_Mask (0x1 << 0)
290 #define TAS2563_BrownOutPreventionReg0_BOPEN_Disabled (0x0 << 0)
291 #define TAS2563_BrownOutPreventionReg0_BOPEN_Enabled (0x1 << 0)
293 /* Brown Out Prevention Reg1 */
294 #define TAS2563_BrownOutPreventionReg1 TAS2563_REG(0x0, 0x0, 0x1C)
295 #define TAS2563_BrownOutPreventionReg1_BOPTH70_Mask (0xff << 0)
297 /* Brown Out Prevention Reg2 */
298 #define TAS2563_BrownOutPreventionReg2 TAS2563_REG(0x0, 0x0, 0x1D)
299 #define TAS2563_BrownOutPreventionReg2_BOPATKRT75_Mask (0x7 << 5)
300 #define TAS2563_BrownOutPreventionReg2_BOPATKRT75_5 (0x0 << 5)
301 #define TAS2563_BrownOutPreventionReg2_BOPATKRT75_10 (0x1 << 5)
302 #define TAS2563_BrownOutPreventionReg2_BOPATKRT75_20 (0x2 << 5)
303 #define TAS2563_BrownOutPreventionReg2_BOPATKRT75_40 (0x3 << 5)
304 #define TAS2563_BrownOutPreventionReg2_BOPATKRT75_80 (0x4 << 5)
305 #define TAS2563_BrownOutPreventionReg2_BOPATKRT75_160 (0x5 << 5)
306 #define TAS2563_BrownOutPreventionReg2_BOPATKRT75_320 (0x6 << 5)
307 #define TAS2563_BrownOutPreventionReg2_BOPATKRT75_640 (0x7 << 5)
308 #define TAS2563_BrownOutPreventionReg2_BOPATKST43_Mask (0x3 << 3)
309 #define TAS2563_BrownOutPreventionReg2_BOPATKST43_1 (0x1 << 3)
310 #define TAS2563_BrownOutPreventionReg2_BOPATKST43_2 (0x3 << 3)
311 #define TAS2563_BrownOutPreventionReg2_BOPATKST43_0_5 (0x0 << 3)
312 #define TAS2563_BrownOutPreventionReg2_BOPATKST43_1_5 (0x2 << 3)
313 #define TAS2563_BrownOutPreventionReg2_BOPHLDTM20_Mask (0x7 << 0)
314 #define TAS2563_BrownOutPreventionReg2_BOPHLDTM20_0 (0x0 << 0)
315 #define TAS2563_BrownOutPreventionReg2_BOPHLDTM20_10 (0x1 << 0)
316 #define TAS2563_BrownOutPreventionReg2_BOPHLDTM20_25 (0x2 << 0)
317 #define TAS2563_BrownOutPreventionReg2_BOPHLDTM20_50 (0x3 << 0)
318 #define TAS2563_BrownOutPreventionReg2_BOPHLDTM20_100 (0x4 << 0)
319 #define TAS2563_BrownOutPreventionReg2_BOPHLDTM20_250 (0x5 << 0)
320 #define TAS2563_BrownOutPreventionReg2_BOPHLDTM20_500 (0x6 << 0)
321 #define TAS2563_BrownOutPreventionReg2_BOPHLDTM20_1000 (0x7 << 0)
323 /* ICLA Reg0 */
324 #define TAS2563_ICLAReg0 TAS2563_REG(0x0, 0x0, 0x1E)
325 #define TAS2563_ICLAReg0_ICLAUSEMAX_Mask (0x1 << 7)
326 #define TAS2563_ICLAReg0_ICLAUSEMAX_Min (0x0 << 7)
327 #define TAS2563_ICLAReg0_ICLAUSEMAX_Max (0x1 << 7)
328 #define TAS2563_ICLAReg0_ICLASLOT61_Mask (0x3f << 1)
329 #define TAS2563_ICLAReg0_ICLAEN_Mask (0x1 << 0)
330 #define TAS2563_ICLAReg0_ICLAEN_Disabled (0x0 << 0)
331 #define TAS2563_ICLAReg0_ICLAEN_Enabled (0x1 << 0)
333 /* ICLA Reg1 */
334 #define TAS2563_ICLAReg1 TAS2563_REG(0x0, 0x0, 0x1F)
335 #define TAS2563_ICLAReg1_ICLASEN_Mask (0xff << 0)
336 #define TAS2563_ICLAReg1_ICLASLOT_7_Disable (0x0 << 7)
337 #define TAS2563_ICLAReg1_ICLASLOT_7_Enable (0x1 << 7)
338 #define TAS2563_ICLAReg1_ICLASLOT_6_Disable (0x0 << 6)
339 #define TAS2563_ICLAReg1_ICLASLOT_6_Enable (0x1 << 6)
340 #define TAS2563_ICLAReg1_ICLASLOT_5_Disable (0x0 << 5)
341 #define TAS2563_ICLAReg1_ICLASLOT_5_Enable (0x1 << 5)
342 #define TAS2563_ICLAReg1_ICLASLOT_4_Disable (0x0 << 4)
343 #define TAS2563_ICLAReg1_ICLASLOT_4_Enable (0x1 << 4)
344 #define TAS2563_ICLAReg1_ICLASLOT_3_Disable (0x0 << 3)
345 #define TAS2563_ICLAReg1_ICLASLOT_3_Enable (0x1 << 3)
346 #define TAS2563_ICLAReg1_ICLASLOT_2_Disable (0x0 << 2)
347 #define TAS2563_ICLAReg1_ICLASLOT_2_Enable (0x1 << 2)
348 #define TAS2563_ICLAReg1_ICLASLOT_1_Disable (0x0 << 1)
349 #define TAS2563_ICLAReg1_ICLASLOT_1_Enable (0x1 << 1)
350 #define TAS2563_ICLAReg1_ICLASLOT_0_Disable (0x0 << 0)
351 #define TAS2563_ICLAReg1_ICLASLOT_0_Enable (0x1 << 0)
353 /* Interrupt Mask Reg0 */
354 #define TAS2563_InterruptMaskReg0 TAS2563_REG(0x0, 0x0, 0x1a)
355 #define TAS2563_InterruptMaskReg0_LIMMUTEINTMASK_Mask (0x1 << 7)
356 #define TAS2563_InterruptMaskReg0_LIMMUTEINTMASK_Unmask (0x0 << 7)
357 #define TAS2563_InterruptMaskReg0_LIMMUTEINTMASK_Disable (0x1 << 7)
358 #define TAS2563_InterruptMaskReg0_LIMINFHLDINTMASK_Mask (0x1 << 6)
359 #define TAS2563_InterruptMaskReg0_LIMINFHLDINTMASK_Unmask (0x0 << 6)
360 #define TAS2563_InterruptMaskReg0_LIMINFHLDINTMASK_Disable (0x1 << 6)
361 #define TAS2563_InterruptMaskReg0_LIMMAXATNINTMASK_Mask (0x1 << 5)
362 #define TAS2563_InterruptMaskReg0_LIMMAXATNINTMASK_Unmask (0x0 << 5)
363 #define TAS2563_InterruptMaskReg0_LIMMAXATNINTMASK_Disable (0x1 << 5)
364 #define TAS2563_InterruptMaskReg0_VBATLessthanINFINTMASK_Mask (0x1 << 4)
365 #define TAS2563_InterruptMaskReg0_VBATLessthanINFINTMASK_Unmask (0x0 << 4)
366 #define TAS2563_InterruptMaskReg0_VBATLessthanINFINTMASK_Disable (0x1 << 4)
367 #define TAS2563_InterruptMaskReg0_LIMActiveFlagINTMASK_Mask (0x1 << 3)
368 #define TAS2563_InterruptMaskReg0_LIMActiveFlagINTMASK_Unmask (0x0 << 3)
369 #define TAS2563_InterruptMaskReg0_LIMActiveFlagINTMASK_Disable (0x1 << 3)
370 #define TAS2563_InterruptMaskReg0_TDMClockErrorINTMASK_Mask (0x1 << 2)
371 #define TAS2563_InterruptMaskReg0_TDMClockErrorINTMASK_Unmask (0x0 << 2)
372 #define TAS2563_InterruptMaskReg0_TDMClockErrorINTMASK_Disable (0x1 << 2)
373 #define TAS2563_InterruptMaskReg0_OCEINTMASK_Mask (0x1 << 1)
374 #define TAS2563_InterruptMaskReg0_OCEINTMASK_Unmask (0x0 << 1)
375 #define TAS2563_InterruptMaskReg0_OCEINTMASK_Disable (0x1 << 1)
376 #define TAS2563_InterruptMaskReg0_OTEINTMASK_Mask (0x1 << 0)
377 #define TAS2563_InterruptMaskReg0_OTEINTMASK_Unmask (0x0 << 0)
378 #define TAS2563_InterruptMaskReg0_OTEINTMASK_Disable (0x1 << 0)
379 #define TAS2563_InterruptMaskReg0_Disable 0xff
381 /* Interrupt Mask Reg1 */
382 #define TAS2563_InterruptMaskReg1 TAS2563_REG(0x0, 0x0, 0x1b)
383 #define TAS2563_InterruptMaskReg1_PDMAUDDATAINVALIDINTMASK_Mask (0x1 << 7)
384 #define TAS2563_InterruptMaskReg1_PDMAUDDATAINVALIDINTMASK_Unmask (0x0 << 7)
385 #define TAS2563_InterruptMaskReg1_PDMAUDDATAINVALIDINTMASK_Disable (0x1 << 7)
386 #define TAS2563_InterruptMaskReg1_VBATOVLOINTMASK_Mask (0x1 << 3)
387 #define TAS2563_InterruptMaskReg1_VBATOVLOINTMASK_Unmask (0x0 << 3)
388 #define TAS2563_InterruptMaskReg1_VBATOVLOINTMASK_Disable (0x1 << 3)
389 #define TAS2563_InterruptMaskReg1_VBATUVLOINTMASK_Mask (0x1 << 2)
390 #define TAS2563_InterruptMaskReg1_VBATUVLOINTMASK_Unmask (0x0 << 2)
391 #define TAS2563_InterruptMaskReg1_VBATUVLOINTMASK_Disable (0x1 << 2)
392 #define TAS2563_InterruptMaskReg1_BrownOutFlagINTMASK_Mask (0x1 << 1)
393 #define TAS2563_InterruptMaskReg1_BrownOutFlagINTMASK_Unmask (0x0 << 1)
394 #define TAS2563_InterruptMaskReg1_BrownOutFlagINTMASK_Disable (0x1 << 1)
395 #define TAS2563_InterruptMaskReg1_PDMClockErrorINTMASK_Mask (0x1 << 0)
396 #define TAS2563_InterruptMaskReg1_PDMClockErrorINTMASK_Unmask (0x0 << 0)
397 #define TAS2563_InterruptMaskReg1_PDMClockErrorINTMASK_Disable (0x1 << 0)
398 #define TAS2563_InterruptMaskReg1_Disable 0xff
400 /* Live-Interrupt Reg0 */
401 #define TAS2563_LiveInterruptReg0 TAS2563_REG(0x0, 0x0, 0x1f)
402 #define TAS2563_LiveInterruptReg0_LIMMUTE_Mask (0x1 << 7)
403 #define TAS2563_LiveInterruptReg0_LIMMUTE_NoInterrupt (0x0 << 7)
404 #define TAS2563_LiveInterruptReg0_LIMMUTE_Interrupt (0x1 << 7)
405 #define TAS2563_LiveInterruptReg0_LIMINFHLD_Mask (0x1 << 6)
406 #define TAS2563_LiveInterruptReg0_LIMINFHLD_NoInterrupt (0x0 << 6)
407 #define TAS2563_LiveInterruptReg0_LIMINFHLD_Interrupt (0x1 << 6)
408 #define TAS2563_LiveInterruptReg0_LIMMAXATN_Mask (0x1 << 5)
409 #define TAS2563_LiveInterruptReg0_LIMMAXATN_NoInterrupt (0x0 << 5)
410 #define TAS2563_LiveInterruptReg0_LIMMAXATN_Interrupt (0x1 << 5)
411 #define TAS2563_LiveInterruptReg0_VBATLessthanINF_Mask (0x1 << 4)
412 #define TAS2563_LiveInterruptReg0_VBATLessthanINF_NoInterrupt (0x0 << 4)
413 #define TAS2563_LiveInterruptReg0_VBATLessthanINF_Interrupt (0x1 << 4)
414 #define TAS2563_LiveInterruptReg0_LIMActiveFlag_Mask (0x1 << 3)
415 #define TAS2563_LiveInterruptReg0_LIMActiveFlag_NoInterrupt (0x0 << 3)
416 #define TAS2563_LiveInterruptReg0_LIMActiveFlag_Interrupt (0x1 << 3)
417 #define TAS2563_LiveInterruptReg0_TDMClockError_Mask (0x1 << 2)
418 #define TAS2563_LiveInterruptReg0_TDMClockError_NoInterrupt (0x0 << 2)
419 #define TAS2563_LiveInterruptReg0_TDMClockError_Interrupt (0x1 << 2)
420 #define TAS2563_LiveInterruptReg0_OCEFlag_Mask (0x1 << 1)
421 #define TAS2563_LiveInterruptReg0_OCEFlag_NoInterrupt (0x0 << 1)
422 #define TAS2563_LiveInterruptReg0_OCEFlag_Interrupt (0x1 << 1)
423 #define TAS2563_LiveInterruptReg0_OTEFlag_Mask (0x1 << 0)
424 #define TAS2563_LiveInterruptReg0_OTEFlag_NoInterrupt (0x0 << 0)
425 #define TAS2563_LiveInterruptReg0_OTEFlag_Interrupt (0x1 << 0)
427 /* Live-Interrupt Reg1 */
428 #define TAS2563_LiveInterruptReg1 TAS2563_REG(0x0, 0x0, 0x20)
429 #define TAS2563_LiveInterruptReg1_PDMAUDDATAINVALID_Mask (0x1 << 7)
430 #define TAS2563_LiveInterruptReg1_PDMAUDDATAINVALID_NoInterrupt (0x0 << 7)
431 #define TAS2563_LiveInterruptReg1_PDMAUDDATAINVALID_Interrupt (0x1 << 7)
432 #define TAS2563_LiveInterruptReg1_VBATOVLO_Mask (0x1 << 3)
433 #define TAS2563_LiveInterruptReg1_VBATOVLO_NoInterrupt (0x0 << 3)
434 #define TAS2563_LiveInterruptReg1_VBATOVLO_Interrupt (0x1 << 3)
435 #define TAS2563_LiveInterruptReg1_VBATUVLO_Mask (0x1 << 2)
436 #define TAS2563_LiveInterruptReg1_VBATUVLO_NoInterrupt (0x0 << 2)
437 #define TAS2563_LiveInterruptReg1_VBATUVLO_Interrupt (0x1 << 2)
438 #define TAS2563_LiveInterruptReg1_BrownOutFlag_Mask (0x1 << 1)
439 #define TAS2563_LiveInterruptReg1_BrownOutFlag_NoInterrupt (0x0 << 1)
440 #define TAS2563_LiveInterruptReg1_BrownOutFlag_Interrupt (0x1 << 1)
441 #define TAS2563_LiveInterruptReg1_PDMClockError_Mask (0x1 << 0)
442 #define TAS2563_LiveInterruptReg1_PDMClockError_NoInterrupt (0x0 << 0)
443 #define TAS2563_LiveInterruptReg1_PDMClockError_Interrupt (0x1 << 0)
445 /* Latched-Interrupt Reg0 */
446 #define TAS2563_LatchedInterruptReg0 TAS2563_REG(0x0, 0x0, 0x24)
447 #define TAS2563_LatchedInterruptReg0_LIMMUTESticky_Mask (0x1 << 7)
448 #define TAS2563_LatchedInterruptReg0_LIMMUTESticky_NoInterrupt (0x0 << 7)
449 #define TAS2563_LatchedInterruptReg0_LIMMUTESticky_Interrupt (0x1 << 7)
450 #define TAS2563_LatchedInterruptReg0_LIMINFHLDSticky_Mask (0x1 << 6)
451 #define TAS2563_LatchedInterruptReg0_LIMINFHLDSticky_NoInterrupt (0x0 << 6)
452 #define TAS2563_LatchedInterruptReg0_LIMINFHLDSticky_Interrupt (0x1 << 6)
453 #define TAS2563_LatchedInterruptReg0_LIMMAXATNSticky_Mask (0x1 << 5)
454 #define TAS2563_LatchedInterruptReg0_LIMMAXATNSticky_NoInterrupt (0x0 << 5)
455 #define TAS2563_LatchedInterruptReg0_LIMMAXATNSticky_Interrupt (0x1 << 5)
456 #define TAS2563_LatchedInterruptReg0_VBATLessthanINFSticky_Mask (0x1 << 4)
457 #define TAS2563_LatchedInterruptReg0_VBATLessthanINFSticky_NoInterrupt \
458 (0x0 << 4)
459 #define TAS2563_LatchedInterruptReg0_VBATLessthanINFSticky_Interrupt (0x1 << 4)
460 #define TAS2563_LatchedInterruptReg0_LIMActiveFlagSticky_Mask (0x1 << 3)
461 #define TAS2563_LatchedInterruptReg0_LIMActiveFlagSticky_NoInterrupt (0x0 << 3)
462 #define TAS2563_LatchedInterruptReg0_LIMActiveFlagSticky_Interrupt (0x1 << 3)
463 #define TAS2563_LatchedInterruptReg0_TDMClockErrorSticky_Mask (0x1 << 2)
464 #define TAS2563_LatchedInterruptReg0_TDMClockErrorSticky_NoInterrupt (0x0 << 2)
465 #define TAS2563_LatchedInterruptReg0_TDMClockErrorSticky_Interrupt (0x1 << 2)
466 #define TAS2563_LatchedInterruptReg0_OCEFlagSticky_Mask (0x1 << 1)
467 #define TAS2563_LatchedInterruptReg0_OCEFlagSticky_NoInterrupt (0x0 << 1)
468 #define TAS2563_LatchedInterruptReg0_OCEFlagSticky_Interrupt (0x1 << 1)
469 #define TAS2563_LatchedInterruptReg0_OTEFlagSticky_Mask (0x1 << 0)
470 #define TAS2563_LatchedInterruptReg0_OTEFlagSticky_NoInterrupt (0x0 << 0)
471 #define TAS2563_LatchedInterruptReg0_OTEFlagSticky_Interrupt (0x1 << 0)
473 /* Latched-Interrupt Reg1 */
474 #define TAS2563_LatchedInterruptReg1 TAS2563_REG(0x0, 0x0, 0x25)
475 #define TAS2563_LatchedInterruptReg1_PDMAUDDATAINVALIDSticky_Mask (0x1 << 7)
476 #define TAS2563_LatchedInterruptReg1_PDMAUDDATAINVALIDSticky_NoInterrupt \
477 (0x0 << 7)
478 #define TAS2563_LatchedInterruptReg1_PDMAUDDATAINVALIDSticky_Interrupt \
479 (0x1 << 7)
480 #define TAS2563_LatchedInterruptReg1_VBATOVLOSticky_Mask (0x1 << 3)
481 #define TAS2563_LatchedInterruptReg1_VBATOVLOSticky_NoInterrupt (0x0 << 3)
482 #define TAS2563_LatchedInterruptReg1_VBATOVLOSticky_Interrupt (0x1 << 3)
483 #define TAS2563_LatchedInterruptReg1_VBATUVLOSticky_Mask (0x1 << 2)
484 #define TAS2563_LatchedInterruptReg1_VBATUVLOSticky_NoInterrupt (0x0 << 2)
485 #define TAS2563_LatchedInterruptReg1_VBATUVLOSticky_Interrupt (0x1 << 2)
486 #define TAS2563_LatchedInterruptReg1_BrownOutFlagSticky_Mask (0x1 << 1)
487 #define TAS2563_LatchedInterruptReg1_BrownOutFlagSticky_NoInterrupt (0x0 << 1)
488 #define TAS2563_LatchedInterruptReg1_BrownOutFlagSticky_Interrupt (0x1 << 1)
489 #define TAS2563_LatchedInterruptReg1_PDMClockErrorSticky_Mask (0x1 << 0)
490 #define TAS2563_LatchedInterruptReg1_PDMClockErrorSticky_NoInterrupt (0x0 << 0)
491 #define TAS2563_LatchedInterruptReg1_PDMClockErrorSticky_Interrupt (0x1 << 0)
493 /* VBAT MSB */
494 #define TAS2563_VBATMSB TAS2563_REG(0x0, 0x0, 0x27)
495 #define TAS2563_VBATMSB_VBATMSB70_Mask (0xff << 0)
497 /* VBAT LSB */
498 #define TAS2563_VBATLSB TAS2563_REG(0x0, 0x0, 0x28)
499 #define TAS2563_VBATLSB_VBATLSB74_Mask (0xf << 4)
501 /* TEMP MSB */
502 #define TAS2563_TEMPMSB TAS2563_REG(0x0, 0x0, 0x29)
503 #define TAS2563_TEMPMSB_TEMPMSB70_Mask (0xff << 0)
505 /* TEMP LSB */
506 #define TAS2563_TEMPLSB TAS2563_REG(0x0, 0x0, 0x2A)
507 #define TAS2563_TEMPLSB_TEMPLSB74_Mask (0xf << 4)
509 /* SDZ Config */
510 #define TAS2563_SDZCONFIG TAS2563_REG(0x0, 0x0, 0x2F)
511 #define TAS2563_SDZCONFIG_ICLANONZEROMIN_Mask (0x1 << 4)
512 #define TAS2563_SDZCONFIG_ICLANONZEROMIN_Disable (0x0 << 4)
513 #define TAS2563_SDZCONFIG_ICLANONZEROMIN_Enable (0x1 << 4)
514 #define TAS2563_SDZCONFIG_SDZMODECONF_Mask (0x3 << 2)
515 #define TAS2563_SDZCONFIG_SDZMODECONF_ForcedShutdownAfterTimeout (0x0 << 2)
516 #define TAS2563_SDZCONFIG_SDZMODECONF_ForceShutdown (0x1 << 2)
517 #define TAS2563_SDZCONFIG_SDZMODECONF_NormalShutdown (0x2 << 2)
518 #define TAS2563_SDZCONFIG_SDZMODETIMEOUT_Mask (0x3 << 0)
519 #define TAS2563_SDZCONFIG_SDZMODETIMEOUT_2ms (0x0 << 0)
520 #define TAS2563_SDZCONFIG_SDZMODETIMEOUT_4ms (0x1 << 0)
521 #define TAS2563_SDZCONFIG_SDZMODETIMEOUT_6ms (0x2 << 0)
522 #define TAS2563_SDZCONFIG_SDZMODETIMEOUT_23p8ms (0x3 << 0)
525 /* Interrupt Configuration */
526 #define TAS2563_InterruptConfiguration TAS2563_REG(0x0, 0x0, 0x30)
527 #define TAS2563_InterruptConfiguration_INTTHRUSW_Mask (0x1 << 2),
528 #define TAS2563_InterruptConfiguration_INTTHRUSW_IntOnIRQZ (0x0 << 2)
529 #define TAS2563_InterruptConfiguration_INTTHRUSW_IntFor2ms (0x1 << 2)
530 #define TAS2563_InterruptConfiguration_PININTConfig10_Mask (0x3 << 0)
531 #define TAS2563_InterruptConfiguration_PININTConfig10_AssertOnLiveInterrupts \
532 (0x0 << 0)
533 #define \
534 TAS2563_InterruptConfiguration_PININTConfig10_AssertOnLatchedInterrupts \
535 (0x1 << 0)
536 #define \
537 TAS2563_InterruptConfiguration_PININTConfig10_Assert2msOnLiveInterrupts \
538 (0x2 << 0)
539 #define \
540 TAS2563_InterruptConfiguration_PININTConfig10_Assert2msOnLatchedInterrupts \
541 (0x3 << 0)
543 /* Digital Input Pin Pull Down */
544 #define TAS2563_DigitalInputPinPullDown TAS2563_REG(0x0, 0x0, 0x31)
545 #define TAS2563_DigitalInputPinPullDown_WKPulldownSDOUT_Mask (0x1 << 7)
546 #define TAS2563_DigitalInputPinPullDown_WKPulldownSDOUT_Disabled (0x0 << 7)
547 #define TAS2563_DigitalInputPinPullDown_WKPulldownSDOUT_Enabled (0x1 << 7)
548 #define TAS2563_DigitalInputPinPullDown_WKPulldownSDIN_Mask (0x1 << 6)
549 #define TAS2563_DigitalInputPinPullDown_WKPulldownSDIN_Disabled (0x0 << 6)
550 #define TAS2563_DigitalInputPinPullDown_WKPulldownSDIN_Enabled (0x1 << 6)
551 #define TAS2563_DigitalInputPinPullDown_WKPulldownFSYNC_Mask (0x1 << 5)
552 #define TAS2563_DigitalInputPinPullDown_WKPulldownFSYNC_Disabled (0x0 << 5)
553 #define TAS2563_DigitalInputPinPullDown_WKPulldownFSYNC_Enabled (0x1 << 5)
554 #define TAS2563_DigitalInputPinPullDown_WKPulldownSBCLK_Mask (0x1 << 4)
555 #define TAS2563_DigitalInputPinPullDown_WKPulldownSBCLK_Disabled (0x0 << 4)
556 #define TAS2563_DigitalInputPinPullDown_WKPulldownSBCLK_Enabled (0x1 << 4)
557 #define TAS2563_DigitalInputPinPullDown_WKPulldownPDMD0_Mask (0x1 << 3)
558 #define TAS2563_DigitalInputPinPullDown_WKPulldownPDMD0_Disabled (0x0 << 3)
559 #define TAS2563_DigitalInputPinPullDown_WKPulldownPDMD0_Enabled (0x1 << 3)
560 #define TAS2563_DigitalInputPinPullDown_WKPulldownPDMD1_Mask (0x1 << 2)
561 #define TAS2563_DigitalInputPinPullDown_WKPulldownPDMD1_Disabled (0x0 << 2)
562 #define TAS2563_DigitalInputPinPullDown_WKPulldownPDMD1_Enabled (0x1 << 2)
563 #define TAS2563_DigitalInputPinPullDown_WKPulldownPDMCK0_Mask (0x1 << 1)
564 #define TAS2563_DigitalInputPinPullDown_WKPulldownPDMCK0_Disabled (0x0 << 1)
565 #define TAS2563_DigitalInputPinPullDown_WKPulldownPDMCK0_Enabled (0x1 << 1)
566 #define TAS2563_DigitalInputPinPullDown_WKPulldownPDMCK1_Mask (0x1 << 0)
567 #define TAS2563_DigitalInputPinPullDown_WKPulldownPDMCK1_Disabled (0x0 << 0)
568 #define TAS2563_DigitalInputPinPullDown_WKPulldownPDMCK1_Enabled (0x1 << 0)
570 /* Misc IRQ */
571 #define TAS2563_MiscIRQ TAS2563_REG(0x0, 0x0, 0x32)
572 #define TAS2563_MiscIRQ_IRQZREQD_Mask (0x1 << 7)
573 #define TAS2563_MiscIRQ_IRQZREQD_ActiveHigh (0x0 << 7)
574 #define TAS2563_MiscIRQ_IRQZREQD_ActiveLow (0x1 << 7)
575 #define TAS2563_MiscIRQ_IRQZBITBANG_Mask (0x1 << 0)
576 #define TAS2563_MiscIRQ_IRQZBITBANG_IRQZInputBuf0 (0x0 << 0)
577 #define TAS2563_MiscIRQ_IRQZBITBANG_IRQZInputBuf1 (0x1 << 0)
579 /* Clock Configuration */
580 #define TAS2563_ClockConfiguration TAS2563_REG(0x0, 0x0, 0x38)
581 #define TAS2563_ClockConfiguration_SBCLKtoFS52_Mask (0xf << 2)
582 #define TAS2563_ClockConfiguration_SBCLKtoFS52_16 (0x0 << 2)
583 #define TAS2563_ClockConfiguration_SBCLKtoFS52_24 (0x1 << 2)
584 #define TAS2563_ClockConfiguration_SBCLKtoFS52_32 (0x2 << 2)
585 #define TAS2563_ClockConfiguration_SBCLKtoFS52_48 (0x3 << 2)
586 #define TAS2563_ClockConfiguration_SBCLKtoFS52_64 (0x4 << 2)
587 #define TAS2563_ClockConfiguration_SBCLKtoFS52_96 (0x5 << 2)
588 #define TAS2563_ClockConfiguration_SBCLKtoFS52_128 (0x6 << 2)
589 #define TAS2563_ClockConfiguration_SBCLKtoFS52_192 (0x7 << 2)
590 #define TAS2563_ClockConfiguration_SBCLKtoFS52_256 (0x8 << 2)
591 #define TAS2563_ClockConfiguration_SBCLKtoFS52_384 (0x9 << 2)
592 #define TAS2563_ClockConfiguration_SBCLKtoFS52_512 (0xa << 2)
593 #define TAS2563_ClockConfiguration_DISCLKRateDetect10_Mask (0x3 << 0)
594 #define TAS2563_ClockConfiguration_DISCLKRateDetect10_Disabled (0x1 << 0)
595 #define TAS2563_ClockConfiguration_DISCLKRateDetect10_Enabled (0x0 << 0)
598 #define TAS2563_BDIVSelection_BCLKMaster TAS2563_REG(0x0, 0x0, 0x3D)
599 #define TAS2563_BDIVSelection_BCLKMaster_ClockSource10_Mask (0x3 << 0)
600 #define TAS2563_BDIVSelection_BCLKMaster_ClockSource10_NDIV2Output (0x0 << 0)
601 #define TAS2563_BDIVSelection_BCLKMaster_ClockSource10_NDIV1Output (0x1 << 0)
602 #define TAS2563_BDIVSelection_BCLKMaster_ClockSource10_MCLKOutput (0x2 << 0)
603 #define TAS2563_BDIVSelection_BCLKMaster_ClockSource10_PDMCLK1PAD (0x3 << 0)
605 #define TAS2563_BDIVSelection_HOLDSARUPDATE TAS2563_REG(0x0, 0x0, 0x41)
606 #define TAS2563_BDIVSelection_HOLDSARUPDATE10_Mask (0x1 << 0)
607 #define TAS2563_BDIVSelection_HOLDSARUPDATE10_Disabled (0x0 << 0)
608 #define TAS2563_BDIVSelection_HOLDSARUPDATE10_Enabled (0x1 << 0)
611 /* TDM Clock detection monitor */
612 #define TAS2563_TDMClockdetectionmonitor TAS2563_REG(0x0, 0x0, 0x77)
613 #define TAS2563_TDMClockdetectionmonitor_SBCLKtoFSYNC63_Mask (0xf << 3)
614 #define TAS2563_TDMClockdetectionmonitor_SBCLKtoFSYNC63_16 (0x0 << 3)
615 #define TAS2563_TDMClockdetectionmonitor_SBCLKtoFSYNC63_24 (0x1 << 3)
616 #define TAS2563_TDMClockdetectionmonitor_SBCLKtoFSYNC63_32 (0x2 << 3)
617 #define TAS2563_TDMClockdetectionmonitor_SBCLKtoFSYNC63_48 (0x3 << 3)
618 #define TAS2563_TDMClockdetectionmonitor_SBCLKtoFSYNC63_64 (0x4 << 3)
619 #define TAS2563_TDMClockdetectionmonitor_SBCLKtoFSYNC63_96 (0x5 << 3)
620 #define TAS2563_TDMClockdetectionmonitor_SBCLKtoFSYNC63_128 (0x6 << 3)
621 #define TAS2563_TDMClockdetectionmonitor_SBCLKtoFSYNC63_192 (0x7 << 3)
622 #define TAS2563_TDMClockdetectionmonitor_SBCLKtoFSYNC63_256 (0x8 << 3)
623 #define TAS2563_TDMClockdetectionmonitor_SBCLKtoFSYNC63_384 (0x9 << 3)
624 #define TAS2563_TDMClockdetectionmonitor_SBCLKtoFSYNC63_512 (0xf << 3)
625 #define TAS2563_TDMClockdetectionmonitor_DetectedSampleRate20_Mask (0x7 << 0),
626 #define TAS2563_TDMClockdetectionmonitor_DetectedSampleRate20_8khz (0x0 << 0)
627 #define TAS2563_TDMClockdetectionmonitor_DetectedSampleRate20_16khz (0x1 << 0)
628 #define TAS2563_TDMClockdetectionmonitor_DetectedSampleRate20_32khz (0x2 << 0)
629 #define TAS2563_TDMClockdetectionmonitor_DetectedSampleRate20_48khz (0x3 << 0)
630 #define TAS2563_TDMClockdetectionmonitor_DetectedSampleRate20_96khz (0x4 << 0)
631 #define TAS2563_TDMClockdetectionmonitor_DetectedSampleRate20_192khz (0x5 << 0)
633 /* Revision and PG ID */
634 #define TAS2563_RevisionandPGID TAS2563_REG(0x0, 0x0, 0x7D)
635 #define TAS2563_RevisionandPGID_RevisionID74_Mask (0xf << 4)
636 #define TAS2563_RevisionandPGID_PGID30_Mask (0xf << 0)
638 /* I2C Checksum */
639 #define TAS2563_I2CChecksum TAS2563_REG(0x0, 0x0, 0x7E)
640 #define TAS2563_I2CChecksum_I2CChecksum70_Mask (0xff << 0)
642 #define TAS2563_SA_COEFF_SWAP_REG TAS2563_REG(0, 0x35, 0x2c)
643 #define TAS2563_CALI_T_REG TAS2563_REG(0x8c, 0x30, 0x20)
644 #define TAS2563_CALI_R0_REG TAS2563_REG(0x8c, 0x2f, 0x40)
645 //////////////////////////////////////
647 /* ICN set */
648 #define TAS2563_ICN_REG TAS2563_REG(0, 2, 0x5c)
649 #define TAS2563_ICN_DELAY TAS2563_REG(0, 2, 0x64)
651 /* Book */
652 #define TAS2563_Book TAS2563_REG(0x0, 0x0, 0x7F)
653 #define TAS2563_Book_Book70_Mask (0xff << 0)
655 #define TAS2563_FW_NAME "tas2563_uCDSP.bin"
657 #define TAS2563_POWER_ACTIVE 0
658 #define TAS2563_POWER_MUTE 1
659 #define TAS2563_POWER_SHUTDOWN 2
661 #define TAS2563_APP_ROM1MODE 0
662 #define TAS2563_APP_ROM2MODE 1
663 #define TAS2563_APP_TUNINGMODE 2
664 #define TAS2563_APP_ROM1_96KHZ 3
665 #define TAS2563_APP_ROM2_96KHZ 4
666 #define TAS2563_APP_RAMMODE 5
668 #define TAS2563_RegisterCount 55
670 #define ERROR_NONE 0x0000000
671 #define ERROR_PLL_ABSENT 0x0000000
672 #define ERROR_DEVA_I2C_COMM 0x0000000
673 #define ERROR_DEVB_I2C_COMM 0x0000000
674 #define ERROR_PRAM_CRCCHK 0x0000000
675 #define ERROR_YRAM_CRCCHK 0x0000001
676 #define ERROR_OVER_CURRENT 0x0000002
677 #define ERROR_DIE_OVERTEMP 0x0000004
678 #define ERROR_OVER_VOLTAGE 0x0000008
679 #define ERROR_UNDER_VOLTAGE 0x0000010
680 #define ERROR_BROWNOUT 0x0000020
681 #define ERROR_CLASSD_PWR 0x0000040
682 #define ERROR_FAILSAFE 0x4000000
684 #define TAS2563_COEFFICIENT_TMAX 0x7fffffff
685 #define TAS2563_SAFE_GUARD_PATTERN 0x5a
686 #define LOW_TEMPERATURE_CHECK_PERIOD 5000 /* 5 second */
688 struct tas2563_register {
689 int book;
690 int page;
691 int reg;
692 };
694 struct tas2563_dai_cfg {
695 unsigned int dai_fmt;
696 unsigned int tdm_delay;
697 };
699 struct TBlock {
700 unsigned int mnType;
701 unsigned char mbPChkSumPresent;
702 unsigned char mnPChkSum;
703 unsigned char mbYChkSumPresent;
704 unsigned char mnYChkSum;
705 unsigned int mnCommands;
706 unsigned char *mpData;
707 };
709 struct TData {
710 char mpName[64];
711 char *mpDescription;
712 unsigned int mnBlocks;
713 struct TBlock *mpBlocks;
714 };
716 struct TProgram {
717 char mpName[64];
718 char *mpDescription;
719 unsigned char mnAppMode;
720 // unsigned short mnBoost;
721 unsigned char mnI2sMode;
722 unsigned char mnISnsPD;
723 unsigned char mnVSnsPD;
724 unsigned char mnPowerLDG;
725 struct TData mData;
726 };
728 struct TPLL {
729 char mpName[64];
730 char *mpDescription;
731 struct TBlock mBlock;
732 };
735 struct TConfiguration {
736 char mpName[64];
737 char *mpDescription;
738 unsigned int mnDevices;
739 unsigned int mnProgram;
740 // unsigned int mnPLL;
741 unsigned int mnSamplingRate;
742 unsigned char mnPLLSrc;
743 unsigned int mnPLLSrcRate;
744 unsigned int mnFsRate;
745 struct TData mData;
746 };
748 struct TCalibration {
749 char mpName[64];
750 char *mpDescription;
751 unsigned int mnProgram;
752 unsigned int mnConfiguration;
753 struct TData mData;
754 };
756 struct TFirmware {
757 unsigned int mnFWSize;
758 unsigned int mnChecksum;
759 unsigned int mnPPCVersion;
760 unsigned int mnFWVersion;
761 unsigned int mnDriverVersion;
762 unsigned int mnTimeStamp;
763 char mpDDCName[64];
764 char *mpDescription;
765 unsigned int mnDeviceFamily;
766 unsigned int mnDevice;
767 unsigned int mnPLLs;
768 struct TPLL *mpPLLs;
769 unsigned int mnPrograms;
770 struct TProgram *mpPrograms;
771 unsigned int mnConfigurations;
772 struct TConfiguration *mpConfigurations;
773 unsigned int mnCalibrations;
774 struct TCalibration *mpCalibrations;
775 };
777 struct tas2563_priv {
778 struct device *dev;
779 struct regmap *regmap;
780 struct snd_soc_codec *codec;
781 struct mutex dev_lock;
782 struct delayed_work irq_work;
783 struct hrtimer mtimerwork;
784 int mnClkin;
785 int mnClkid;
786 int mnPowerState;
787 bool mbPowerUp;
788 int mnCurrentBook;
789 int mnCurrentPage;
790 struct TFirmware *mpFirmware;
791 struct TFirmware *mpCalFirmware;
792 int mnCurrentProgram;
793 int mnCurrentSampleRate;
794 int mnNewConfiguration;
795 int mnCurrentConfiguration;
796 int mnCurrentCalibration;
797 int mnLoad;
798 int mnASIFormat;
799 int mnResetGPIO;
800 int mnIRQGPIO;
801 int mnIRQ;
802 bool mbIRQEnable;
803 int mnSamplingRate;
804 int mnFrameSize;
805 int mnPLL;
806 int mnPPG;
807 int mnPGID;
808 int mnLeftSlot;
809 int mnRightSlot;
810 int mnSlot_width;
811 int mnVmon_slot_no;
812 int mnImon_slot_no;
813 int mnRestart;
814 int mnCh_size;
815 int mnDieTvReadCounter;
816 int mnPCMFormat;
817 bool mbLoadConfigurationPrePowerUp;
818 bool mbLoadCalibrationPostPowerUp;
819 bool mbCalibrationLoaded;
820 bool mbBypassTMax;
821 int (*read)(struct tas2563_priv *pTAS2563,
822 unsigned int reg, unsigned int *pValue);
823 int (*write)(struct tas2563_priv *pTAS2563,
824 unsigned int reg, unsigned int Value);
825 int (*bulk_read)(struct tas2563_priv *pTAS2563,
826 unsigned int reg, unsigned char *pData, unsigned int len);
827 int (*bulk_write)(struct tas2563_priv *pTAS2563,
828 unsigned int reg, unsigned char *pData, unsigned int len);
829 int (*update_bits)(struct tas2563_priv *pTAS2563,
830 unsigned int reg, unsigned int mask, unsigned int value);
831 void (*hw_reset)(struct tas2563_priv *pTAS2563);
832 void (*clearIRQ)(struct tas2563_priv *pTAS2563);
833 void (*enableIRQ)(struct tas2563_priv *pTAS2563, bool enable);
834 /* device is working, but system is suspended */
835 int (*runtime_suspend)(struct tas2563_priv *pTAS2563);
836 int (*runtime_resume)(struct tas2563_priv *pTAS2563);
837 int (*set_calibration)(struct tas2563_priv *pTAS2563,
838 int calibration);
839 int (*set_config)(struct tas2563_priv *pTAS2563, int config);
840 bool mbRuntimeSuspend;
842 unsigned int mnErrCode;
843 #ifdef CONFIG_TAS2563_CODEC
844 struct mutex codec_lock;
845 #endif
847 #ifdef CONFIG_TAS2563_MISC
848 int mnDBGCmd;
849 int mnCurrentReg;
850 struct mutex file_lock;
851 #endif
852 };
854 #endif /* __TAS2563_ */