8aaa6cff2b72e84707a8455a5edaf32d2d52ff89
2 #ifndef __TAS2770_
3 #define __TAS2770_
6 /* Book Control Register (available in page0 of each book) */
7 #define TAS2770_BOOKCTL_PAGE 0
8 #define TAS2770_BOOKCTL_REG 127
11 #define TAS2770_REG(page, reg) ((page * 128) + reg)
13 /* Page */
14 #define TAS2770_Page TAS2770_REG(0X0, 0x00)
15 #define TAS2770_Page_Page_Mask (0xff << 0)
17 /* Software Reset */
18 #define TAS2770_SoftwareReset TAS2770_REG(0X0, 0x01)
19 #define TAS2770_SoftwareReset_SoftwareReset_Mask (0x1 << 0)
20 #define TAS2770_SoftwareReset_SoftwareReset_DontReset (0x0 << 0)
21 #define TAS2770_SoftwareReset_SoftwareReset_Reset (0x1 << 0)
23 /* Power Control */
24 #define TAS2770_PowerControl TAS2770_REG(0X0, 0x02)
25 #define TAS2770_PowerControl_ISNSPower_Mask (0x1 << 3)
26 #define TAS2770_PowerControl_ISNSPower_Active (0x0 << 3)
27 #define TAS2770_PowerControl_ISNSPower_PoweredDown (0x1 << 3)
28 #define TAS2770_PowerControl_VSNSPower_Mask (0x1 << 2)
29 #define TAS2770_PowerControl_VSNSPower_Active (0x0 << 2)
30 #define TAS2770_PowerControl_VSNSPower_PoweredDown (0x1 << 2)
31 #define TAS2770_PowerControl_OperationalMode10_Mask (0x3 << 0)
32 #define TAS2770_PowerControl_OperationalMode10_Active (0x0 << 0)
33 #define TAS2770_PowerControl_OperationalMode10_Mute (0x1 << 0)
34 #define TAS2770_PowerControl_OperationalMode10_Shutdown (0x2 << 0)
36 /* data format */
37 #define TAS2770_DATAFORMAT_SHIFT 2
38 #define TAS2770_DATAFORMAT_I2S 0x0
39 #define TAS2770_DATAFORMAT_DSP 0x1
40 #define TAS2770_DATAFORMAT_RIGHT_J 0x2
41 #define TAS2770_DATAFORMAT_LEFT_J 0x3
43 #define TAS2770_DAI_FMT_MASK (0x7 << TAS2770_DATAFORMAT_SHIFT)
45 /* Playback Configuration Reg0 */
46 #define TAS2770_PlaybackConfigurationReg0 TAS2770_REG(0X0, 0x03)
47 #define TAS2770_PlaybackConfigurationReg0_PDMPinMapping_Mask (0x1 << 7)
48 #define TAS2770_PlaybackConfigurationReg0_PDMPinMapping_Pdm0 (0x0 << 7)
49 #define TAS2770_PlaybackConfigurationReg0_PDMPinMapping_Pdm1 (0x1 << 7)
50 #define TAS2770_PlaybackConfigurationReg0_PlaybackPDMSource_Mask (0x1 << 6)
51 #define TAS2770_PlaybackConfigurationReg0_PlaybackSource_Mask (0x1 << 5)
52 #define TAS2770_PlaybackConfigurationReg0_PlaybackSource_Pcm (0x0 << 5)
53 #define TAS2770_PlaybackConfigurationReg0_PlaybackSource_Pdm (0x1 << 5)
54 #define TAS2770_PlaybackConfigurationReg0_AmplifierLevel40_Mask (0x1f << 0)
56 /* Playback Configuration Reg1 */
57 #define TAS2770_PlaybackConfigurationReg1 TAS2770_REG(0X0, 0x04)
58 #define TAS2770_PlaybackConfigurationReg1_HPFFrequency20_Mask (0x7 << 0)
59 #define TAS2770_PlaybackConfigurationReg1_HPFFrequency20_2 (0x1 << 0)
60 #define TAS2770_PlaybackConfigurationReg1_HPFFrequency20_50 (0x2 << 0)
61 #define TAS2770_PlaybackConfigurationReg1_HPFFrequency20_100 (0x3 << 0)
62 #define TAS2770_PlaybackConfigurationReg1_HPFFrequency20_200 (0x4 << 0)
63 #define TAS2770_PlaybackConfigurationReg1_HPFFrequency20_400 (0x5 << 0)
64 #define TAS2770_PlaybackConfigurationReg1_HPFFrequency20_800 (0x6 << 0)
65 #define TAS2770_PlaybackConfigurationReg1_HPFFrequency20_Bypass (0x0 << 0)
67 /* Playback Configuration Reg2 */
68 #define TAS2770_PlaybackConfigurationReg2 TAS2770_REG(0X0, 0x05)
69 #define TAS2770_PlaybackConfigurationReg2_DVCPCM70_Mask (0xff << 0)
70 #define TAS2770_PlaybackConfigurationReg2_VOLMAX (0xc9 << 0)
72 /* Playback Configuration Reg3 */
73 #define TAS2770_PlaybackConfigurationReg3 TAS2770_REG(0X0, 0x06)
74 #define TAS2770_PlaybackConfigurationReg3_DVCPDM70_Mask (0xff << 0)
76 /* Misc Configuration Reg0 */
77 #define TAS2770_MiscConfigurationReg0 TAS2770_REG(0X0, 0x07)
78 #define TAS2770_MiscConfigurationReg0_DVCRampRate76_Mask (0x3 << 6)
79 #define TAS2770_MiscConfigurationReg0_DVCRampRate76_0_5dbPer1Sample (0x0 << 6)
80 #define TAS2770_MiscConfigurationReg0_DVCRampRate76_0_5dbPer4Sample (0x1 << 6)
81 #define TAS2770_MiscConfigurationReg0_DVCRampRate76_0_5dbPer8Sample (0x2 << 6)
82 #define TAS2770_MiscConfigurationReg0_DVCRampRate76_VolRampDisabled (0x3 << 6)
83 #define TAS2770_MiscConfigurationReg0_OCERetry_Mask (0x1 << 5)
84 #define TAS2770_MiscConfigurationReg0_OCERetry_DoNotRetry (0x0 << 5)
85 #define TAS2770_MiscConfigurationReg0_OCERetry_Retry (0x1 << 5)
86 #define TAS2770_MiscConfigurationReg0_OTERetry_Mask (0x1 << 4)
87 #define TAS2770_MiscConfigurationReg0_OTERetry_DoNotRetry (0x0 << 4)
88 #define TAS2770_MiscConfigurationReg0_OTERetry_Retry (0x1 << 4)
89 #define TAS2770_MiscConfigurationReg0_IRQZPull_Mask (0x1 << 3)
90 #define TAS2770_MiscConfigurationReg0_IRQZPull_Disabled (0x0 << 3)
91 #define TAS2770_MiscConfigurationReg0_IRQZPull_Enabled (0x1 << 3)
92 #define TAS2770_MiscConfigurationReg0_AMPSS_Mask (0x1 << 2)
93 #define TAS2770_MiscConfigurationReg0_AMPSS_Disabled (0x0 << 2)
94 #define TAS2770_MiscConfigurationReg0_AMPSS_Enabled (0x1 << 2)
96 /* PDM Input Reg0 */
97 #define TAS2770_PDMInputReg0 TAS2770_REG(0X0, 0x08)
98 #define TAS2770_PDMInputReg0_ClassDSYNC_Mask (0x1 << 6)
99 #define TAS2770_PDMInputReg0_ClassDSYNC_AsyncMode (0x0 << 6)
100 #define TAS2770_PDMInputReg0_ClassDSYNC_Retry (0x1 << 6)
101 #define TAS2770_PDMInputReg0_PDMRATESW54_Mask (0x3 << 4)
102 #define TAS2770_PDMInputReg0_PDMRATED132_Mask (0x3 << 2)
103 #define TAS2770_PDMInputReg0_PDMRATED132_2_543_38MHz (0x0 << 2)
104 #define TAS2770_PDMInputReg0_PDMRATED132_5_086_76MHz (0x1 << 2)
105 #define TAS2770_PDMInputReg0_PDMRATED010_Mask (0x3 << 0)
106 #define TAS2770_PDMInputReg0_PDMRATED010_2_543_38MHz (0x0 << 0)
107 #define TAS2770_PDMInputReg0_PDMRATED010_5_086_76MHz (0x1 << 0)
109 /* PDM Configuration Reg1 */
110 #define TAS2770_PDMConfigurationReg1 TAS2770_REG(0X0, 0x09)
111 #define TAS2770_PDMConfigurationReg1_PDMEDGED1_Mask (0x1 << 7)
112 #define TAS2770_PDMConfigurationReg1_PDMEDGED1_Rising (0x0 << 7)
113 #define TAS2770_PDMConfigurationReg1_PDMEDGED1_Falling (0x1 << 7)
114 #define TAS2770_PDMConfigurationReg1_PDMEDGED0_Mask (0x1 << 6)
115 #define TAS2770_PDMConfigurationReg1_PDMEDGED0_Rising (0x0 << 6)
116 #define TAS2770_PDMConfigurationReg1_PDMEDGED0_Falling (0x1 << 6)
117 #define TAS2770_PDMConfigurationReg1_PDMSLVD1_Mask (0x1 << 5)
118 #define TAS2770_PDMConfigurationReg1_PDMSLVD1_Slave (0x0 << 5)
119 #define TAS2770_PDMConfigurationReg1_PDMSLVD1_Master (0x1 << 5)
120 #define TAS2770_PDMConfigurationReg1_PDMSLVD0_Mask (0x1 << 4)
121 #define TAS2770_PDMConfigurationReg1_PDMSLVD0_Slave (0x0 << 4)
122 #define TAS2770_PDMConfigurationReg1_PDMSLVD0_Master (0x1 << 4)
123 #define TAS2770_PDMConfigurationReg1_PDMCLKD1_Mask (0x1 << 3)
124 #define TAS2770_PDMConfigurationReg1_PDMCLKD1_Pdmck0 (0x0 << 3)
125 #define TAS2770_PDMConfigurationReg1_PDMCLKD1_Pdmck1 (0x1 << 3)
126 #define TAS2770_PDMConfigurationReg1_PDMCLKD0_Mask (0x1 << 2)
127 #define TAS2770_PDMConfigurationReg1_PDMCLKD0_Pdmck0 (0x0 << 2)
128 #define TAS2770_PDMConfigurationReg1_PDMCLKD0_Pdmck1 (0x1 << 2)
129 #define TAS2770_PDMConfigurationReg1_PDMGATED1_Mask (0x1 << 1)
130 #define TAS2770_PDMConfigurationReg1_PDMGATED1_GatedOff (0x0 << 1)
131 #define TAS2770_PDMConfigurationReg1_PDMGATED1_Active (0x1 << 1)
132 #define TAS2770_PDMConfigurationReg1_PDMGATED0_Mask (0x1 << 0)
133 #define TAS2770_PDMConfigurationReg1_PDMGATED0_GatedOff (0x0 << 0)
134 #define TAS2770_PDMConfigurationReg1_PDMGATED0_Active (0x1 << 0)
136 /* TDM Configuration Reg0 */
137 #define TAS2770_TDMConfigurationReg0 TAS2770_REG(0X0, 0x0A)
138 #define TAS2770_TDMConfigurationReg0_SAMPRATERAMP_Mask (0x1 << 5)
139 #define TAS2770_TDMConfigurationReg0_SAMPRATERAMP_48KHz (0x0 << 5)
140 #define TAS2770_TDMConfigurationReg0_SAMPRATERAMP_44_1KHz (0x1 << 5)
141 #define TAS2770_TDMConfigurationReg0_DETECTSAMPRATE_Mask (0x1 << 4)
142 #define TAS2770_TDMConfigurationReg0_DETECTSAMPRATE_Disabled (0x1 << 4)
143 #define TAS2770_TDMConfigurationReg0_DETECTSAMPRATE_Enabled (0x0 << 4)
144 #define TAS2770_TDMConfigurationReg0_SAMPRATE31_Mask (0x7 << 1)
145 #define TAS2770_TDMConfigurationReg0_SAMPRATE31_44_1_48kHz (0x3 << 1)
146 #define TAS2770_TDMConfigurationReg0_SAMPRATE31_88_2_96kHz (0x4 << 1)
147 #define TAS2770_TDMConfigurationReg0_SAMPRATE31_176_4_192kHz (0x5 << 1)
148 #define TAS2770_TDMConfigurationReg0_FRAMESTART_Mask (0x1 << 0)
149 #define TAS2770_TDMConfigurationReg0_FRAMESTART_LowToHigh (0x0 << 0)
150 #define TAS2770_TDMConfigurationReg0_FRAMESTART_HighToLow (0x1 << 0)
152 /* TDM Configuration Reg1 */
153 #define TAS2770_TDMConfigurationReg1 TAS2770_REG(0X0, 0x0B)
154 #define TAS2770_TDMConfigurationReg1_RXJUSTIFY_Mask (0x1 << 6)
155 #define TAS2770_TDMConfigurationReg1_RXJUSTIFY_Left (0x0 << 6)
156 #define TAS2770_TDMConfigurationReg1_RXJUSTIFY_Right (0x1 << 6)
157 #define TAS2770_TDMConfigurationReg1_RXOFFSET51_Mask (0x1f << 1)
158 #define TAS2770_TDMConfigurationReg1_RXOFFSET51_Shift (1)
159 #define TAS2770_TDMConfigurationReg1_RXEDGE_Mask (0x1 << 0)
160 #define TAS2770_TDMConfigurationReg1_RXEDGE_Rising (0x0 << 0)
161 #define TAS2770_TDMConfigurationReg1_RXEDGE_Falling (0x1 << 0)
163 /* TDM Configuration Reg2 */
164 #define TAS2770_TDMConfigurationReg2 TAS2770_REG(0X0, 0x0C)
165 #define TAS2770_TDMConfigurationReg2_RXSCFG54_Mask (0x3 << 4)
166 #define TAS2770_TDMConfigurationReg2_RXSCFG54_Mono_I2C (0x0 << 4)
167 #define TAS2770_TDMConfigurationReg2_RXSCFG54_Mono_Left (0x1 << 4)
168 #define TAS2770_TDMConfigurationReg2_RXSCFG54_Mono_Right (0x2 << 4)
169 #define TAS2770_TDMConfigurationReg2_RXSCFG54_Stereo_DownMix (0x3 << 4)
170 #define TAS2770_TDMConfigurationReg2_RXWLEN32_Mask (0x3 << 2)
171 #define TAS2770_TDMConfigurationReg2_RXWLEN32_16Bits (0x0 << 2)
172 #define TAS2770_TDMConfigurationReg2_RXWLEN32_20Bits (0x1 << 2)
173 #define TAS2770_TDMConfigurationReg2_RXWLEN32_24Bits (0x2 << 2)
174 #define TAS2770_TDMConfigurationReg2_RXWLEN32_32Bits (0x3 << 2)
175 #define TAS2770_TDMConfigurationReg2_RXSLEN10_Mask (0x3 << 0)
176 #define TAS2770_TDMConfigurationReg2_RXSLEN10_16Bits (0x0 << 0)
177 #define TAS2770_TDMConfigurationReg2_RXSLEN10_24Bits (0x1 << 0)
178 #define TAS2770_TDMConfigurationReg2_RXSLEN10_32Bits (0x2 << 0)
180 /* TDM Configuration Reg3 */
181 #define TAS2770_TDMConfigurationReg3 TAS2770_REG(0X0, 0x0D)
182 #define TAS2770_TDMConfigurationReg3_RXSLOTRight74_Mask (0xf << 4)
183 #define TAS2770_TDMConfigurationReg3_RXSLOTRight74_Shift 4
184 #define TAS2770_TDMConfigurationReg3_RXSLOTLeft30_Mask (0xf << 0)
185 #define TAS2770_TDMConfigurationReg3_RXSLOTLeft30_Shift 0
187 /* TDM Configuration Reg4 */
188 #define TAS2770_TDMConfigurationReg4 TAS2770_REG(0X0, 0x0E)
189 #define TAS2770_TDMConfigurationReg4_TXKEEPER_Mask (0x1 << 5)
190 #define TAS2770_TDMConfigurationReg4_TXKEEPER_Disable (0x0 << 5)
191 #define TAS2770_TDMConfigurationReg4_TXKEEPER_Enable (0x1 << 5)
192 #define TAS2770_TDMConfigurationReg4_TXFILL_Mask (0x1 << 4)
193 #define TAS2770_TDMConfigurationReg4_TXFILL_Transmit0 (0x0 << 4)
194 #define TAS2770_TDMConfigurationReg4_TXFILL_TransmitHiz (0x1 << 4)
195 #define TAS2770_TDMConfigurationReg4_TXOFFSET31_Mask (0x7 << 1)
196 #define TAS2770_TDMConfigurationReg4_TXEDGE_Mask (0x1 << 0)
197 #define TAS2770_TDMConfigurationReg4_TXEDGE_Rising (0x0 << 0)
198 #define TAS2770_TDMConfigurationReg4_TXEDGE_Falling (0x1 << 0)
200 /* TDM Configuration Reg5 */
201 #define TAS2770_TDMConfigurationReg5 TAS2770_REG(0X0, 0x0F)
202 #define TAS2770_TDMConfigurationReg5_VSNSTX_Mask (0x1 << 6)
203 #define TAS2770_TDMConfigurationReg5_VSNSTX_Disable (0x0 << 6)
204 #define TAS2770_TDMConfigurationReg5_VSNSTX_Enable (0x1 << 6)
205 #define TAS2770_TDMConfigurationReg5_VSNSSLOT50_Mask (0x3f << 0)
207 /* TDM Configuration Reg6 */
208 #define TAS2770_TDMConfigurationReg6 TAS2770_REG(0X0, 0x10)
209 #define TAS2770_TDMConfigurationReg6_ISNSTX_Mask (0x1 << 6)
210 #define TAS2770_TDMConfigurationReg6_ISNSTX_Disable (0x0 << 6)
211 #define TAS2770_TDMConfigurationReg6_ISNSTX_Enable (0x1 << 6)
212 #define TAS2770_TDMConfigurationReg6_ISNSSLOT50_Mask (0x3f << 0)
214 /* TDM Configuration Reg7 */
215 #define TAS2770_TDMConfigurationReg7 TAS2770_REG(0X0, 0x11)
216 #define TAS2770_TDMConfigurationReg7_PDMTX_Mask (0x1 << 6)
217 #define TAS2770_TDMConfigurationReg7_PDMTX_Disable (0x0 << 6)
218 #define TAS2770_TDMConfigurationReg7_PDMTX_Enable (0x1 << 6)
219 #define TAS2770_TDMConfigurationReg7_PDMSLOT50_Mask (0x3f << 0)
221 /* TDM Configuration Reg8 */
222 #define TAS2770_TDMConfigurationReg8 TAS2770_REG(0X0, 0x12)
223 #define TAS2770_TDMConfigurationReg8_VBATSLEN_Mask (0x1 << 7)
224 #define TAS2770_TDMConfigurationReg8_VBATSLEN_8Bits (0x0 << 7)
225 #define TAS2770_TDMConfigurationReg8_VBATSLEN_16Bits (0x1 << 7)
226 #define TAS2770_TDMConfigurationReg8_VBATTX_Mask (0x1 << 6)
227 #define TAS2770_TDMConfigurationReg8_VBATTX_Disable (0x0 << 6)
228 #define TAS2770_TDMConfigurationReg8_VBATTX_Enable (0x1 << 6)
229 #define TAS2770_TDMConfigurationReg8_VBATSLOT50_Mask (0x3f << 0)
231 /* TDM Configuration Reg9 */
232 #define TAS2770_TDMConfigurationReg9 TAS2770_REG(0X0, 0x13)
233 #define TAS2770_TDMConfigurationReg9_TEMPTX_Mask (0x1 << 6)
234 #define TAS2770_TDMConfigurationReg9_TEMPTX_Disable (0x0 << 6)
235 #define TAS2770_TDMConfigurationReg9_TEMPTX_Enable (0x1 << 6)
236 #define TAS2770_TDMConfigurationReg9_TEMPSLOT50_Mask (0x3f << 0)
238 /* TDM Configuration Reg10 */
239 #define TAS2770_TDMConfigurationReg10 TAS2770_REG(0X0, 0x14)
240 #define TAS2770_TDMConfigurationReg10_GAINTX_Mask (0x1 << 6)
241 #define TAS2770_TDMConfigurationReg10_GAINTX_Disable (0x0 << 6)
242 #define TAS2770_TDMConfigurationReg10_GAINTX_Enable (0x1 << 6)
243 #define TAS2770_TDMConfigurationReg10_GAINSLOT50_Mask (0x3f << 0)
245 /* Limiter Configuration Reg0 */
246 #define TAS2770_LimiterConfigurationReg0 TAS2770_REG(0X0, 0x15)
247 #define TAS2770_LimiterConfigurationReg0_LIMATKST54_Mask (0x3 << 4)
248 #define TAS2770_LimiterConfigurationReg0_LIMATKST54_1 (0x2 << 4)
249 #define TAS2770_LimiterConfigurationReg0_LIMATKST54_2 (0x3 << 4)
250 #define TAS2770_LimiterConfigurationReg0_LIMATKST54_0_25 (0x0 << 4)
251 #define TAS2770_LimiterConfigurationReg0_LIMATKST54_0_5 (0x1 << 4)
252 #define TAS2770_LimiterConfigurationReg0_LIMATKRT31_Mask (0x7 << 1)
253 #define TAS2770_LimiterConfigurationReg0_LIMATKRT31_5 (0x0 << 1)
254 #define TAS2770_LimiterConfigurationReg0_LIMATKRT31_10 (0x1 << 1)
255 #define TAS2770_LimiterConfigurationReg0_LIMATKRT31_20 (0x2 << 1)
256 #define TAS2770_LimiterConfigurationReg0_LIMATKRT31_40 (0x3 << 1)
257 #define TAS2770_LimiterConfigurationReg0_LIMATKRT31_80 (0x4 << 1)
258 #define TAS2770_LimiterConfigurationReg0_LIMATKRT31_160 (0x5 << 1)
259 #define TAS2770_LimiterConfigurationReg0_LIMATKRT31_320 (0x6 << 1)
260 #define TAS2770_LimiterConfigurationReg0_LIMATKRT31_640 (0x7 << 1)
261 #define TAS2770_LimiterConfigurationReg0_LIMEN_Mask (0x1 << 0)
262 #define TAS2770_LimiterConfigurationReg0_LIMEN_Disabled (0x0 << 0)
263 #define TAS2770_LimiterConfigurationReg0_LIMEN_Enabled (0x1 << 0)
265 /* Limiter Configuration Reg1 */
266 #define TAS2770_LimiterConfigurationReg1 TAS2770_REG(0X0, 0x16)
267 #define TAS2770_LimiterConfigurationReg1_LIMRLSST76_Mask (0x3 << 6)
268 #define TAS2770_LimiterConfigurationReg1_LIMRLSST76_1 (0x2 << 6)
269 #define TAS2770_LimiterConfigurationReg1_LIMRLSST76_2 (0x3 << 6)
270 #define TAS2770_LimiterConfigurationReg1_LIMRLSST76_0_25 (0x0 << 6)
271 #define TAS2770_LimiterConfigurationReg1_LIMRLSST76_0_5 (0x1 << 6)
272 #define TAS2770_LimiterConfigurationReg1_LIMRLSRT53_Mask (0x7 << 3)
273 #define TAS2770_LimiterConfigurationReg1_LIMRLSRT53_10 (0x0 << 3)
274 #define TAS2770_LimiterConfigurationReg1_LIMRLSRT53_50 (0x1 << 3)
275 #define TAS2770_LimiterConfigurationReg1_LIMRLSRT53_100 (0x2 << 3)
276 #define TAS2770_LimiterConfigurationReg1_LIMRLSRT53_250 (0x3 << 3)
277 #define TAS2770_LimiterConfigurationReg1_LIMRLSRT53_500 (0x4 << 3)
278 #define TAS2770_LimiterConfigurationReg1_LIMRLSRT53_750 (0x5 << 3)
279 #define TAS2770_LimiterConfigurationReg1_LIMRLSRT53_1000 (0x6 << 3)
280 #define TAS2770_LimiterConfigurationReg1_LIMRLSRT53_1500 (0x7 << 3)
281 #define TAS2770_LimiterConfigurationReg1_LIMHLDTM20_Mask (0x7 << 0)
282 #define TAS2770_LimiterConfigurationReg1_LIMHLDTM20_0 (0x0 << 0)
283 #define TAS2770_LimiterConfigurationReg1_LIMHLDTM20_10 (0x1 << 0)
284 #define TAS2770_LimiterConfigurationReg1_LIMHLDTM20_25 (0x2 << 0)
285 #define TAS2770_LimiterConfigurationReg1_LIMHLDTM20_50 (0x3 << 0)
286 #define TAS2770_LimiterConfigurationReg1_LIMHLDTM20_100 (0x4 << 0)
287 #define TAS2770_LimiterConfigurationReg1_LIMHLDTM20_250 (0x5 << 0)
288 #define TAS2770_LimiterConfigurationReg1_LIMHLDTM20_500 (0x6 << 0)
289 #define TAS2770_LimiterConfigurationReg1_LIMHLDTM20_1000 (0x7 << 0)
291 /* Limiter Configuration Reg2 */
292 #define TAS2770_LimiterConfigurationReg2 TAS2770_REG(0X0, 0x17)
293 #define TAS2770_LimiterConfigurationReg2_LIMMAXATN40_Mask (0x1f << 0)
295 /* Limiter Configuration Reg3 */
296 #define TAS2770_LimiterConfigurationReg3 TAS2770_REG(0X0, 0x18)
297 #define TAS2770_LimiterConfigurationReg3_LIMTHMAX60_Mask (0x7f << 0)
299 /* Limiter Configuration Reg4 */
300 #define TAS2770_LimiterConfigurationReg4 TAS2770_REG(0X0, 0x19)
301 #define TAS2770_LimiterConfigurationReg4_LIMTHMIN60_Mask (0x7f << 0)
303 /* Limiter Configuration Reg5 */
304 #define TAS2770_LimiterConfigurationReg5 TAS2770_REG(0X0, 0x1A)
305 #define TAS2770_LimiterConfigurationReg5_LIMINFPOINT_Mask (0x7f << 0)
307 /* Brown Out Prevention Reg0 */
308 #define TAS2770_BrownOutPreventionReg0 TAS2770_REG(0X0, 0x1B)
309 #define TAS2770_BrownOutPreventionReg0_LIMSLOPE54_Mask (0x3 << 4)
310 #define TAS2770_BrownOutPreventionReg0_LIMSLOPE54_1 (0x0 << 4)
311 #define TAS2770_BrownOutPreventionReg0_LIMSLOPE54_2 (0x2 << 4)
312 #define TAS2770_BrownOutPreventionReg0_LIMSLOPE54_4 (0x3 << 4)
313 #define TAS2770_BrownOutPreventionReg0_LIMSLOPE54_1_5 (0x1 << 4)
314 #define TAS2770_BrownOutPreventionReg0_BOPHLDCLR_Mask (0x1 << 3)
315 #define TAS2770_BrownOutPreventionReg0_BOPHLDCLR_DontClear (0x0 << 3)
316 #define TAS2770_BrownOutPreventionReg0_BOPHLDCLR_Clear (0x1 << 3)
317 #define TAS2770_BrownOutPreventionReg0_BOPINFHLD_Mask (0x1 << 2)
318 #define TAS2770_BrownOutPreventionReg0_BOPINFHLD_UseHoldTime (0x0 << 2)
319 #define TAS2770_BrownOutPreventionReg0_BOPINFHLD_HoldUntilCleared (0x1 << 2)
320 #define TAS2770_BrownOutPreventionReg0_BOPMUTE_Mask (0x1 << 1)
321 #define TAS2770_BrownOutPreventionReg0_BOPMUTE_DoNotMute (0x0 << 1)
322 #define TAS2770_BrownOutPreventionReg0_BOPMUTE_Mute (0x1 << 1)
323 #define TAS2770_BrownOutPreventionReg0_BOPEN_Mask (0x1 << 0)
324 #define TAS2770_BrownOutPreventionReg0_BOPEN_Disabled (0x0 << 0)
325 #define TAS2770_BrownOutPreventionReg0_BOPEN_Enabled (0x1 << 0)
327 /* Brown Out Prevention Reg1 */
328 #define TAS2770_BrownOutPreventionReg1 TAS2770_REG(0X0, 0x1C)
329 #define TAS2770_BrownOutPreventionReg1_BOPTH70_Mask (0xff << 0)
331 /* Brown Out Prevention Reg2 */
332 #define TAS2770_BrownOutPreventionReg2 TAS2770_REG(0X0, 0x1D)
333 #define TAS2770_BrownOutPreventionReg2_BOPATKRT75_Mask (0x7 << 5)
334 #define TAS2770_BrownOutPreventionReg2_BOPATKRT75_5 (0x0 << 5)
335 #define TAS2770_BrownOutPreventionReg2_BOPATKRT75_10 (0x1 << 5)
336 #define TAS2770_BrownOutPreventionReg2_BOPATKRT75_20 (0x2 << 5)
337 #define TAS2770_BrownOutPreventionReg2_BOPATKRT75_40 (0x3 << 5)
338 #define TAS2770_BrownOutPreventionReg2_BOPATKRT75_80 (0x4 << 5)
339 #define TAS2770_BrownOutPreventionReg2_BOPATKRT75_160 (0x5 << 5)
340 #define TAS2770_BrownOutPreventionReg2_BOPATKRT75_320 (0x6 << 5)
341 #define TAS2770_BrownOutPreventionReg2_BOPATKRT75_640 (0x7 << 5)
342 #define TAS2770_BrownOutPreventionReg2_BOPATKST43_Mask (0x3 << 3)
343 #define TAS2770_BrownOutPreventionReg2_BOPATKST43_1 (0x1 << 3)
344 #define TAS2770_BrownOutPreventionReg2_BOPATKST43_2 (0x3 << 3)
345 #define TAS2770_BrownOutPreventionReg2_BOPATKST43_0_5 (0x0 << 3)
346 #define TAS2770_BrownOutPreventionReg2_BOPATKST43_1_5 (0x2 << 3)
347 #define TAS2770_BrownOutPreventionReg2_BOPHLDTM20_Mask (0x7 << 0)
348 #define TAS2770_BrownOutPreventionReg2_BOPHLDTM20_0 (0x0 << 0)
349 #define TAS2770_BrownOutPreventionReg2_BOPHLDTM20_10 (0x1 << 0)
350 #define TAS2770_BrownOutPreventionReg2_BOPHLDTM20_25 (0x2 << 0)
351 #define TAS2770_BrownOutPreventionReg2_BOPHLDTM20_50 (0x3 << 0)
352 #define TAS2770_BrownOutPreventionReg2_BOPHLDTM20_100 (0x4 << 0)
353 #define TAS2770_BrownOutPreventionReg2_BOPHLDTM20_250 (0x5 << 0)
354 #define TAS2770_BrownOutPreventionReg2_BOPHLDTM20_500 (0x6 << 0)
355 #define TAS2770_BrownOutPreventionReg2_BOPHLDTM20_1000 (0x7 << 0)
357 /* ICLA Reg0 */
358 #define TAS2770_ICLAReg0 TAS2770_REG(0X0, 0x1E)
359 #define TAS2770_ICLAReg0_ICLAUSEMAX_Mask (0x1 << 7)
360 #define TAS2770_ICLAReg0_ICLAUSEMAX_Min (0x0 << 7)
361 #define TAS2770_ICLAReg0_ICLAUSEMAX_Max (0x1 << 7)
362 #define TAS2770_ICLAReg0_ICLASLOT61_Mask (0x3f << 1)
363 #define TAS2770_ICLAReg0_ICLAEN_Mask (0x1 << 0)
364 #define TAS2770_ICLAReg0_ICLAEN_Disabled (0x0 << 0)
365 #define TAS2770_ICLAReg0_ICLAEN_Enabled (0x1 << 0)
367 /* ICLA Reg1 */
368 #define TAS2770_ICLAReg1 TAS2770_REG(0X0, 0x1F)
369 #define TAS2770_ICLAReg1_ICLASEN_Mask (0xff << 0)
370 #define TAS2770_ICLAReg1_ICLASLOT_7_Disable (0x0 << 7)
371 #define TAS2770_ICLAReg1_ICLASLOT_7_Enable (0x1 << 7)
372 #define TAS2770_ICLAReg1_ICLASLOT_6_Disable (0x0 << 6)
373 #define TAS2770_ICLAReg1_ICLASLOT_6_Enable (0x1 << 6)
374 #define TAS2770_ICLAReg1_ICLASLOT_5_Disable (0x0 << 5)
375 #define TAS2770_ICLAReg1_ICLASLOT_5_Enable (0x1 << 5)
376 #define TAS2770_ICLAReg1_ICLASLOT_4_Disable (0x0 << 4)
377 #define TAS2770_ICLAReg1_ICLASLOT_4_Enable (0x1 << 4)
378 #define TAS2770_ICLAReg1_ICLASLOT_3_Disable (0x0 << 3)
379 #define TAS2770_ICLAReg1_ICLASLOT_3_Enable (0x1 << 3)
380 #define TAS2770_ICLAReg1_ICLASLOT_2_Disable (0x0 << 2)
381 #define TAS2770_ICLAReg1_ICLASLOT_2_Enable (0x1 << 2)
382 #define TAS2770_ICLAReg1_ICLASLOT_1_Disable (0x0 << 1)
383 #define TAS2770_ICLAReg1_ICLASLOT_1_Enable (0x1 << 1)
384 #define TAS2770_ICLAReg1_ICLASLOT_0_Disable (0x0 << 0)
385 #define TAS2770_ICLAReg1_ICLASLOT_0_Enable (0x1 << 0)
387 /* Interrupt Mask Reg0 */
388 #define TAS2770_InterruptMaskReg0 TAS2770_REG(0X0, 0x20)
389 #define TAS2770_InterruptMaskReg0_LIMMUTEINTMASK_Mask (0x1 << 7)
390 #define TAS2770_InterruptMaskReg0_LIMMUTEINTMASK_Unmask (0x0 << 7)
391 #define TAS2770_InterruptMaskReg0_LIMMUTEINTMASK_Disable (0x1 << 7)
392 #define TAS2770_InterruptMaskReg0_LIMINFHLDINTMASK_Mask (0x1 << 6)
393 #define TAS2770_InterruptMaskReg0_LIMINFHLDINTMASK_Unmask (0x0 << 6)
394 #define TAS2770_InterruptMaskReg0_LIMINFHLDINTMASK_Disable (0x1 << 6)
395 #define TAS2770_InterruptMaskReg0_LIMMAXATNINTMASK_Mask (0x1 << 5)
396 #define TAS2770_InterruptMaskReg0_LIMMAXATNINTMASK_Unmask (0x0 << 5)
397 #define TAS2770_InterruptMaskReg0_LIMMAXATNINTMASK_Disable (0x1 << 5)
398 #define TAS2770_InterruptMaskReg0_VBATLessthanINFINTMASK_Mask (0x1 << 4)
399 #define TAS2770_InterruptMaskReg0_VBATLessthanINFINTMASK_Unmask (0x0 << 4)
400 #define TAS2770_InterruptMaskReg0_VBATLessthanINFINTMASK_Disable (0x1 << 4)
401 #define TAS2770_InterruptMaskReg0_LIMActiveFlagINTMASK_Mask (0x1 << 3)
402 #define TAS2770_InterruptMaskReg0_LIMActiveFlagINTMASK_Unmask (0x0 << 3)
403 #define TAS2770_InterruptMaskReg0_LIMActiveFlagINTMASK_Disable (0x1 << 3)
404 #define TAS2770_InterruptMaskReg0_TDMClockErrorINTMASK_Mask (0x1 << 2)
405 #define TAS2770_InterruptMaskReg0_TDMClockErrorINTMASK_Unmask (0x0 << 2)
406 #define TAS2770_InterruptMaskReg0_TDMClockErrorINTMASK_Disable (0x1 << 2)
407 #define TAS2770_InterruptMaskReg0_OCEINTMASK_Mask (0x1 << 1)
408 #define TAS2770_InterruptMaskReg0_OCEINTMASK_Unmask (0x0 << 1)
409 #define TAS2770_InterruptMaskReg0_OCEINTMASK_Disable (0x1 << 1)
410 #define TAS2770_InterruptMaskReg0_OTEINTMASK_Mask (0x1 << 0)
411 #define TAS2770_InterruptMaskReg0_OTEINTMASK_Unmask (0x0 << 0)
412 #define TAS2770_InterruptMaskReg0_OTEINTMASK_Disable (0x1 << 0)
413 #define TAS2770_InterruptMaskReg0_Disable 0xff
415 /* Interrupt Mask Reg1 */
416 #define TAS2770_InterruptMaskReg1 TAS2770_REG(0X0, 0x21)
417 #define TAS2770_InterruptMaskReg1_PDMAUDDATAINVALIDINTMASK_Mask (0x1 << 7)
418 #define TAS2770_InterruptMaskReg1_PDMAUDDATAINVALIDINTMASK_Unmask (0x0 << 7)
419 #define TAS2770_InterruptMaskReg1_PDMAUDDATAINVALIDINTMASK_Disable (0x1 << 7)
420 #define TAS2770_InterruptMaskReg1_VBATOVLOINTMASK_Mask (0x1 << 3)
421 #define TAS2770_InterruptMaskReg1_VBATOVLOINTMASK_Unmask (0x0 << 3)
422 #define TAS2770_InterruptMaskReg1_VBATOVLOINTMASK_Disable (0x1 << 3)
423 #define TAS2770_InterruptMaskReg1_VBATUVLOINTMASK_Mask (0x1 << 2)
424 #define TAS2770_InterruptMaskReg1_VBATUVLOINTMASK_Unmask (0x0 << 2)
425 #define TAS2770_InterruptMaskReg1_VBATUVLOINTMASK_Disable (0x1 << 2)
426 #define TAS2770_InterruptMaskReg1_BrownOutFlagINTMASK_Mask (0x1 << 1)
427 #define TAS2770_InterruptMaskReg1_BrownOutFlagINTMASK_Unmask (0x0 << 1)
428 #define TAS2770_InterruptMaskReg1_BrownOutFlagINTMASK_Disable (0x1 << 1)
429 #define TAS2770_InterruptMaskReg1_PDMClockErrorINTMASK_Mask (0x1 << 0)
430 #define TAS2770_InterruptMaskReg1_PDMClockErrorINTMASK_Unmask (0x0 << 0)
431 #define TAS2770_InterruptMaskReg1_PDMClockErrorINTMASK_Disable (0x1 << 0)
432 #define TAS2770_InterruptMaskReg1_Disable 0xff
434 /* Live-Interrupt Reg0 */
435 #define TAS2770_LiveInterruptReg0 TAS2770_REG(0X0, 0x22)
436 #define TAS2770_LiveInterruptReg0_LIMMUTE_Mask (0x1 << 7)
437 #define TAS2770_LiveInterruptReg0_LIMMUTE_NoInterrupt (0x0 << 7)
438 #define TAS2770_LiveInterruptReg0_LIMMUTE_Interrupt (0x1 << 7)
439 #define TAS2770_LiveInterruptReg0_LIMINFHLD_Mask (0x1 << 6)
440 #define TAS2770_LiveInterruptReg0_LIMINFHLD_NoInterrupt (0x0 << 6)
441 #define TAS2770_LiveInterruptReg0_LIMINFHLD_Interrupt (0x1 << 6)
442 #define TAS2770_LiveInterruptReg0_LIMMAXATN_Mask (0x1 << 5)
443 #define TAS2770_LiveInterruptReg0_LIMMAXATN_NoInterrupt (0x0 << 5)
444 #define TAS2770_LiveInterruptReg0_LIMMAXATN_Interrupt (0x1 << 5)
445 #define TAS2770_LiveInterruptReg0_VBATLessthanINF_Mask (0x1 << 4)
446 #define TAS2770_LiveInterruptReg0_VBATLessthanINF_NoInterrupt (0x0 << 4)
447 #define TAS2770_LiveInterruptReg0_VBATLessthanINF_Interrupt (0x1 << 4)
448 #define TAS2770_LiveInterruptReg0_LIMActiveFlag_Mask (0x1 << 3)
449 #define TAS2770_LiveInterruptReg0_LIMActiveFlag_NoInterrupt (0x0 << 3)
450 #define TAS2770_LiveInterruptReg0_LIMActiveFlag_Interrupt (0x1 << 3)
451 #define TAS2770_LiveInterruptReg0_TDMClockError_Mask (0x1 << 2)
452 #define TAS2770_LiveInterruptReg0_TDMClockError_NoInterrupt (0x0 << 2)
453 #define TAS2770_LiveInterruptReg0_TDMClockError_Interrupt (0x1 << 2)
454 #define TAS2770_LiveInterruptReg0_OCEFlag_Mask (0x1 << 1)
455 #define TAS2770_LiveInterruptReg0_OCEFlag_NoInterrupt (0x0 << 1)
456 #define TAS2770_LiveInterruptReg0_OCEFlag_Interrupt (0x1 << 1)
457 #define TAS2770_LiveInterruptReg0_OTEFlag_Mask (0x1 << 0)
458 #define TAS2770_LiveInterruptReg0_OTEFlag_NoInterrupt (0x0 << 0)
459 #define TAS2770_LiveInterruptReg0_OTEFlag_Interrupt (0x1 << 0)
461 /* Live-Interrupt Reg1 */
462 #define TAS2770_LiveInterruptReg1 TAS2770_REG(0X0, 0x23)
463 #define TAS2770_LiveInterruptReg1_PDMAUDDATAINVALID_Mask (0x1 << 7)
464 #define TAS2770_LiveInterruptReg1_PDMAUDDATAINVALID_NoInterrupt (0x0 << 7)
465 #define TAS2770_LiveInterruptReg1_PDMAUDDATAINVALID_Interrupt (0x1 << 7)
466 #define TAS2770_LiveInterruptReg1_VBATOVLO_Mask (0x1 << 3)
467 #define TAS2770_LiveInterruptReg1_VBATOVLO_NoInterrupt (0x0 << 3)
468 #define TAS2770_LiveInterruptReg1_VBATOVLO_Interrupt (0x1 << 3)
469 #define TAS2770_LiveInterruptReg1_VBATUVLO_Mask (0x1 << 2)
470 #define TAS2770_LiveInterruptReg1_VBATUVLO_NoInterrupt (0x0 << 2)
471 #define TAS2770_LiveInterruptReg1_VBATUVLO_Interrupt (0x1 << 2)
472 #define TAS2770_LiveInterruptReg1_BrownOutFlag_Mask (0x1 << 1)
473 #define TAS2770_LiveInterruptReg1_BrownOutFlag_NoInterrupt (0x0 << 1)
474 #define TAS2770_LiveInterruptReg1_BrownOutFlag_Interrupt (0x1 << 1)
475 #define TAS2770_LiveInterruptReg1_PDMClockError_Mask (0x1 << 0)
476 #define TAS2770_LiveInterruptReg1_PDMClockError_NoInterrupt (0x0 << 0)
477 #define TAS2770_LiveInterruptReg1_PDMClockError_Interrupt (0x1 << 0)
479 /* Latched-Interrupt Reg0 */
480 #define TAS2770_LatchedInterruptReg0 TAS2770_REG(0X0, 0x24)
481 #define TAS2770_LatchedInterruptReg0_LIMMUTESticky_Mask (0x1 << 7)
482 #define TAS2770_LatchedInterruptReg0_LIMMUTESticky_NoInterrupt (0x0 << 7)
483 #define TAS2770_LatchedInterruptReg0_LIMMUTESticky_Interrupt (0x1 << 7)
484 #define TAS2770_LatchedInterruptReg0_LIMINFHLDSticky_Mask (0x1 << 6)
485 #define TAS2770_LatchedInterruptReg0_LIMINFHLDSticky_NoInterrupt (0x0 << 6)
486 #define TAS2770_LatchedInterruptReg0_LIMINFHLDSticky_Interrupt (0x1 << 6)
487 #define TAS2770_LatchedInterruptReg0_LIMMAXATNSticky_Mask (0x1 << 5)
488 #define TAS2770_LatchedInterruptReg0_LIMMAXATNSticky_NoInterrupt (0x0 << 5)
489 #define TAS2770_LatchedInterruptReg0_LIMMAXATNSticky_Interrupt (0x1 << 5)
490 #define TAS2770_LatchedInterruptReg0_VBATLessthanINFSticky_Mask (0x1 << 4)
491 #define TAS2770_LatchedInterruptReg0_VBATLessthanINFSticky_NoInterrupt \
492 (0x0 << 4)
493 #define TAS2770_LatchedInterruptReg0_VBATLessthanINFSticky_Interrupt (0x1 << 4)
494 #define TAS2770_LatchedInterruptReg0_LIMActiveFlagSticky_Mask (0x1 << 3)
495 #define TAS2770_LatchedInterruptReg0_LIMActiveFlagSticky_NoInterrupt (0x0 << 3)
496 #define TAS2770_LatchedInterruptReg0_LIMActiveFlagSticky_Interrupt (0x1 << 3)
497 #define TAS2770_LatchedInterruptReg0_TDMClockErrorSticky_Mask (0x1 << 2)
498 #define TAS2770_LatchedInterruptReg0_TDMClockErrorSticky_NoInterrupt (0x0 << 2)
499 #define TAS2770_LatchedInterruptReg0_TDMClockErrorSticky_Interrupt (0x1 << 2)
500 #define TAS2770_LatchedInterruptReg0_OCEFlagSticky_Mask (0x1 << 1)
501 #define TAS2770_LatchedInterruptReg0_OCEFlagSticky_NoInterrupt (0x0 << 1)
502 #define TAS2770_LatchedInterruptReg0_OCEFlagSticky_Interrupt (0x1 << 1)
503 #define TAS2770_LatchedInterruptReg0_OTEFlagSticky_Mask (0x1 << 0)
504 #define TAS2770_LatchedInterruptReg0_OTEFlagSticky_NoInterrupt (0x0 << 0)
505 #define TAS2770_LatchedInterruptReg0_OTEFlagSticky_Interrupt (0x1 << 0)
507 /* Latched-Interrupt Reg1 */
508 #define TAS2770_LatchedInterruptReg1 TAS2770_REG(0X0, 0x25)
509 #define TAS2770_LatchedInterruptReg1_PDMAUDDATAINVALIDSticky_Mask (0x1 << 7)
510 #define TAS2770_LatchedInterruptReg1_PDMAUDDATAINVALIDSticky_NoInterrupt \
511 (0x0 << 7)
512 #define TAS2770_LatchedInterruptReg1_PDMAUDDATAINVALIDSticky_Interrupt \
513 (0x1 << 7)
514 #define TAS2770_LatchedInterruptReg1_VBATOVLOSticky_Mask (0x1 << 3)
515 #define TAS2770_LatchedInterruptReg1_VBATOVLOSticky_NoInterrupt (0x0 << 3)
516 #define TAS2770_LatchedInterruptReg1_VBATOVLOSticky_Interrupt (0x1 << 3)
517 #define TAS2770_LatchedInterruptReg1_VBATUVLOSticky_Mask (0x1 << 2)
518 #define TAS2770_LatchedInterruptReg1_VBATUVLOSticky_NoInterrupt (0x0 << 2)
519 #define TAS2770_LatchedInterruptReg1_VBATUVLOSticky_Interrupt (0x1 << 2)
520 #define TAS2770_LatchedInterruptReg1_BrownOutFlagSticky_Mask (0x1 << 1)
521 #define TAS2770_LatchedInterruptReg1_BrownOutFlagSticky_NoInterrupt (0x0 << 1)
522 #define TAS2770_LatchedInterruptReg1_BrownOutFlagSticky_Interrupt (0x1 << 1)
523 #define TAS2770_LatchedInterruptReg1_PDMClockErrorSticky_Mask (0x1 << 0)
524 #define TAS2770_LatchedInterruptReg1_PDMClockErrorSticky_NoInterrupt (0x0 << 0)
525 #define TAS2770_LatchedInterruptReg1_PDMClockErrorSticky_Interrupt (0x1 << 0)
527 /* VBAT MSB */
528 #define TAS2770_VBATMSB TAS2770_REG(0X0, 0x27)
529 #define TAS2770_VBATMSB_VBATMSB70_Mask (0xff << 0)
531 /* VBAT LSB */
532 #define TAS2770_VBATLSB TAS2770_REG(0X0, 0x28)
533 #define TAS2770_VBATLSB_VBATLSB74_Mask (0xf << 4)
535 /* TEMP MSB */
536 #define TAS2770_TEMPMSB TAS2770_REG(0X0, 0x29)
537 #define TAS2770_TEMPMSB_TEMPMSB70_Mask (0xff << 0)
539 /* TEMP LSB */
540 #define TAS2770_TEMPLSB TAS2770_REG(0X0, 0x2A)
541 #define TAS2770_TEMPLSB_TEMPLSB74_Mask (0xf << 4)
543 /* SDZ Config */
544 #define TAS2770_SDZCONFIG TAS2770_REG(0X0, 0x2F)
545 #define TAS2770_SDZCONFIG_ICLANONZEROMIN_Mask (0x1 << 4)
546 #define TAS2770_SDZCONFIG_ICLANONZEROMIN_Disable (0x0 << 4)
547 #define TAS2770_SDZCONFIG_ICLANONZEROMIN_Enable (0x1 << 4)
548 #define TAS2770_SDZCONFIG_SDZMODECONF_Mask (0x3 << 2)
549 #define TAS2770_SDZCONFIG_SDZMODECONF_ForcedShutdownAfterTimeout (0x0 << 2)
550 #define TAS2770_SDZCONFIG_SDZMODECONF_ForceShutdown (0x1 << 2)
551 #define TAS2770_SDZCONFIG_SDZMODECONF_NormalShutdown (0x2 << 2)
552 #define TAS2770_SDZCONFIG_SDZMODETIMEOUT_Mask (0x3 << 0)
553 #define TAS2770_SDZCONFIG_SDZMODETIMEOUT_2ms (0x0 << 0)
554 #define TAS2770_SDZCONFIG_SDZMODETIMEOUT_4ms (0x1 << 0)
555 #define TAS2770_SDZCONFIG_SDZMODETIMEOUT_6ms (0x2 << 0)
556 #define TAS2770_SDZCONFIG_SDZMODETIMEOUT_23p8ms (0x3 << 0)
559 /* Interrupt Configuration */
560 #define TAS2770_InterruptConfiguration TAS2770_REG(0X0, 0x30)
561 #define TAS2770_InterruptConfiguration_INTTHRUSW_Mask (0x1 << 2)
562 #define TAS2770_InterruptConfiguration_INTTHRUSW_IntOnIRQZ (0x0 << 2)
563 #define TAS2770_InterruptConfiguration_INTTHRUSW_IntFor2ms (0x1 << 2)
564 #define TAS2770_InterruptConfiguration_PININTConfig10_Mask (0x3 << 0)
565 #define TAS2770_InterruptConfiguration_PININTConfig10_AssertOnLiveInterrupts \
566 (0x0 << 0)
567 #define \
568 TAS2770_InterruptConfiguration_PININTConfig10_AssertOnLatchedInterrupts \
569 (0x1 << 0)
570 #define \
571 TAS2770_InterruptConfiguration_PININTConfig10_Assert2msOnLiveInterrupts \
572 (0x2 << 0)
573 #define \
574 TAS2770_InterruptConfiguration_PININTConfig10_Assert2msOnLatchedInterrupts \
575 (0x3 << 0)
577 /* Digital Input Pin Pull Down */
578 #define TAS2770_DigitalInputPinPullDown TAS2770_REG(0X0, 0x31)
579 #define TAS2770_DigitalInputPinPullDown_WKPulldownSDOUT_Mask (0x1 << 7)
580 #define TAS2770_DigitalInputPinPullDown_WKPulldownSDOUT_Disabled (0x0 << 7)
581 #define TAS2770_DigitalInputPinPullDown_WKPulldownSDOUT_Enabled (0x1 << 7)
582 #define TAS2770_DigitalInputPinPullDown_WKPulldownSDIN_Mask (0x1 << 6)
583 #define TAS2770_DigitalInputPinPullDown_WKPulldownSDIN_Disabled (0x0 << 6)
584 #define TAS2770_DigitalInputPinPullDown_WKPulldownSDIN_Enabled (0x1 << 6)
585 #define TAS2770_DigitalInputPinPullDown_WKPulldownFSYNC_Mask (0x1 << 5)
586 #define TAS2770_DigitalInputPinPullDown_WKPulldownFSYNC_Disabled (0x0 << 5)
587 #define TAS2770_DigitalInputPinPullDown_WKPulldownFSYNC_Enabled (0x1 << 5)
588 #define TAS2770_DigitalInputPinPullDown_WKPulldownSBCLK_Mask (0x1 << 4)
589 #define TAS2770_DigitalInputPinPullDown_WKPulldownSBCLK_Disabled (0x0 << 4)
590 #define TAS2770_DigitalInputPinPullDown_WKPulldownSBCLK_Enabled (0x1 << 4)
591 #define TAS2770_DigitalInputPinPullDown_WKPulldownPDMD0_Mask (0x1 << 3)
592 #define TAS2770_DigitalInputPinPullDown_WKPulldownPDMD0_Disabled (0x0 << 3)
593 #define TAS2770_DigitalInputPinPullDown_WKPulldownPDMD0_Enabled (0x1 << 3)
594 #define TAS2770_DigitalInputPinPullDown_WKPulldownPDMD1_Mask (0x1 << 2)
595 #define TAS2770_DigitalInputPinPullDown_WKPulldownPDMD1_Disabled (0x0 << 2)
596 #define TAS2770_DigitalInputPinPullDown_WKPulldownPDMD1_Enabled (0x1 << 2)
597 #define TAS2770_DigitalInputPinPullDown_WKPulldownPDMCK0_Mask (0x1 << 1)
598 #define TAS2770_DigitalInputPinPullDown_WKPulldownPDMCK0_Disabled (0x0 << 1)
599 #define TAS2770_DigitalInputPinPullDown_WKPulldownPDMCK0_Enabled (0x1 << 1)
600 #define TAS2770_DigitalInputPinPullDown_WKPulldownPDMCK1_Mask (0x1 << 0)
601 #define TAS2770_DigitalInputPinPullDown_WKPulldownPDMCK1_Disabled (0x0 << 0)
602 #define TAS2770_DigitalInputPinPullDown_WKPulldownPDMCK1_Enabled (0x1 << 0)
604 /* Misc IRQ */
605 #define TAS2770_MiscIRQ TAS2770_REG(0X0, 0x32)
606 #define TAS2770_MiscIRQ_IRQZREQD_Mask (0x1 << 7)
607 #define TAS2770_MiscIRQ_IRQZREQD_ActiveHigh (0x0 << 7)
608 #define TAS2770_MiscIRQ_IRQZREQD_ActiveLow (0x1 << 7)
609 #define TAS2770_MiscIRQ_IRQZBITBANG_Mask (0x1 << 0)
610 #define TAS2770_MiscIRQ_IRQZBITBANG_IRQZInputBuf0 (0x0 << 0)
611 #define TAS2770_MiscIRQ_IRQZBITBANG_IRQZInputBuf1 (0x1 << 0)
614 /* Clock Configuration */
615 #define TAS2770_ClockConfiguration TAS2770_REG(0X0, 0x3C)
616 #define TAS2770_ClockConfiguration_SBCLKtoFS52_Mask (0xf << 2)
617 #define TAS2770_ClockConfiguration_SBCLKtoFS52_16 (0x0 << 2)
618 #define TAS2770_ClockConfiguration_SBCLKtoFS52_24 (0x1 << 2)
619 #define TAS2770_ClockConfiguration_SBCLKtoFS52_32 (0x2 << 2)
620 #define TAS2770_ClockConfiguration_SBCLKtoFS52_48 (0x3 << 2)
621 #define TAS2770_ClockConfiguration_SBCLKtoFS52_64 (0x4 << 2)
622 #define TAS2770_ClockConfiguration_SBCLKtoFS52_96 (0x5 << 2)
623 #define TAS2770_ClockConfiguration_SBCLKtoFS52_128 (0x6 << 2)
624 #define TAS2770_ClockConfiguration_SBCLKtoFS52_192 (0x7 << 2)
625 #define TAS2770_ClockConfiguration_SBCLKtoFS52_256 (0x8 << 2)
626 #define TAS2770_ClockConfiguration_SBCLKtoFS52_384 (0x9 << 2)
627 #define TAS2770_ClockConfiguration_SBCLKtoFS52_512 (0xa << 2)
628 #define TAS2770_ClockConfiguration_DISCLKRateDetect10_Mask (0x3 << 0)
629 #define TAS2770_ClockConfiguration_DISCLKRateDetect10_Disabled (0x1 << 0)
630 #define TAS2770_ClockConfiguration_DISCLKRateDetect10_Enabled (0x0 << 0)
633 #define TAS2770_BDIVSelection_BCLKMaster TAS2770_REG(0X0, 0x3D)
634 #define TAS2770_BDIVSelection_BCLKMaster_ClockSource10_Mask (0x3 << 0)
635 #define TAS2770_BDIVSelection_BCLKMaster_ClockSource10_NDIV2Output (0x0 << 0)
636 #define TAS2770_BDIVSelection_BCLKMaster_ClockSource10_NDIV1Output (0x1 << 0)
637 #define TAS2770_BDIVSelection_BCLKMaster_ClockSource10_MCLKOutput (0x2 << 0)
638 #define TAS2770_BDIVSelection_BCLKMaster_ClockSource10_PDMCLK1PAD (0x3 << 0)
640 #define TAS2770_BDIVSelection_HOLDSARUPDATE TAS2770_REG(0X0, 0x41)
641 #define TAS2770_BDIVSelection_HOLDSARUPDATE10_Mask (0x1 << 0)
642 #define TAS2770_BDIVSelection_HOLDSARUPDATE10_Disabled (0x0 << 0)
643 #define TAS2770_BDIVSelection_HOLDSARUPDATE10_Enabled (0x1 << 0)
646 /* TDM Clock detection monitor */
647 #define TAS2770_TDMClockdetectionmonitor TAS2770_REG(0X0, 0x77)
648 #define TAS2770_TDMClockdetectionmonitor_SBCLKtoFSYNC63_Mask (0xf << 3)
649 #define TAS2770_TDMClockdetectionmonitor_SBCLKtoFSYNC63_16 (0x0 << 3)
650 #define TAS2770_TDMClockdetectionmonitor_SBCLKtoFSYNC63_24 (0x1 << 3)
651 #define TAS2770_TDMClockdetectionmonitor_SBCLKtoFSYNC63_32 (0x2 << 3)
652 #define TAS2770_TDMClockdetectionmonitor_SBCLKtoFSYNC63_48 (0x3 << 3)
653 #define TAS2770_TDMClockdetectionmonitor_SBCLKtoFSYNC63_64 (0x4 << 3)
654 #define TAS2770_TDMClockdetectionmonitor_SBCLKtoFSYNC63_96 (0x5 << 3)
655 #define TAS2770_TDMClockdetectionmonitor_SBCLKtoFSYNC63_128 (0x6 << 3)
656 #define TAS2770_TDMClockdetectionmonitor_SBCLKtoFSYNC63_192 (0x7 << 3)
657 #define TAS2770_TDMClockdetectionmonitor_SBCLKtoFSYNC63_256 (0x8 << 3)
658 #define TAS2770_TDMClockdetectionmonitor_SBCLKtoFSYNC63_384 (0x9 << 3)
659 #define TAS2770_TDMClockdetectionmonitor_SBCLKtoFSYNC63_512 (0xf << 3)
660 #define TAS2770_TDMClockdetectionmonitor_DetectedSampleRate20_Mask (0x7 << 0)
661 #define TAS2770_TDMClockdetectionmonitor_DetectedSampleRate20_8khz (0x0 << 0)
662 #define TAS2770_TDMClockdetectionmonitor_DetectedSampleRate20_16khz (0x1 << 0)
663 #define TAS2770_TDMClockdetectionmonitor_DetectedSampleRate20_32khz (0x2 << 0)
664 #define TAS2770_TDMClockdetectionmonitor_DetectedSampleRate20_48khz (0x3 << 0)
665 #define TAS2770_TDMClockdetectionmonitor_DetectedSampleRate20_96khz (0x4 << 0)
666 #define TAS2770_TDMClockdetectionmonitor_DetectedSampleRate20_192khz (0x5 << 0)
668 /* Revision and PG ID */
669 #define TAS2770_RevisionandPGID TAS2770_REG(0X0, 0x7D)
670 #define TAS2770_RevisionandPGID_RevisionID74_Mask (0xf << 4)
671 #define TAS2770_RevisionandPGID_PGID30_Mask (0xf << 0)
673 /* I2C Checksum */
674 #define TAS2770_I2CChecksum TAS2770_REG(0X0, 0x7E)
675 #define TAS2770_I2CChecksum_I2CChecksum70_Mask (0xff << 0)
677 /* Book */
678 #define TAS2770_Book TAS2770_REG(0X0, 0x7F)
679 #define TAS2770_Book_Book70_Mask (0xff << 0)
681 #define TAS2770_POWER_ACTIVE 0
682 #define TAS2770_POWER_MUTE 1
683 #define TAS2770_POWER_SHUTDOWN 2
685 #define TAS2770_RegisterCount 55
687 #define ERROR_NONE 0x0000000
688 #define ERROR_PLL_ABSENT 0x0000000
689 #define ERROR_DEVA_I2C_COMM 0x0000000
690 #define ERROR_DEVB_I2C_COMM 0x0000000
691 #define ERROR_PRAM_CRCCHK 0x0000000
692 #define ERROR_OVER_CURRENT 0x0000001
693 #define ERROR_DIE_OVERTEMP 0x0000002
694 #define ERROR_OVER_VOLTAGE 0x0000004
695 #define ERROR_UNDER_VOLTAGE 0x0000008
696 #define ERROR_BROWNOUT 0x0000010
697 #define ERROR_CLASSD_PWR 0x0000020
699 struct tas2770_register {
700 int book;
701 int page;
702 int reg;
703 };
705 struct tas2770_dai_cfg {
706 unsigned int dai_fmt;
707 unsigned int tdm_delay;
708 };
710 struct tas2770_priv {
711 struct device *dev;
712 struct regmap *regmap;
713 struct snd_soc_codec *codec;
714 struct mutex dev_lock;
715 struct delayed_work irq_work;
716 struct hrtimer mtimer;
717 int mnClkin;
718 int mnClkid;
719 int mnPowerState;
720 int mnCurrentBook;
721 int mnCurrentPage;
722 int mnLoad;
723 int mnASIFormat;
724 int mnResetGPIO;
725 int mnIRQGPIO;
726 int mnIRQ;
727 bool mbIRQEnable;
728 int mnSamplingRate;
729 int mnFrameSize;
730 int mnPLL;
731 int mnLeftSlot;
732 int mnRightSlot;
733 int mnCh_size;
734 int mnSlot_width;
735 int mnVmon_slot_no;
736 int mnImon_slot_no;
737 void (*hw_reset)(struct tas2770_priv *pTAS2770);
738 void (*clearIRQ)(struct tas2770_priv *pTAS2770);
739 void (*enableIRQ)(struct tas2770_priv *pTAS2770, bool enable);
740 /* device is working, but system is suspended */
741 int (*runtime_suspend)(struct tas2770_priv *pTAS2770);
742 int (*runtime_resume)(struct tas2770_priv *pTAS2770);
743 bool mbRuntimeSuspend;
745 unsigned int mnErrCode;
746 #ifdef CONFIG_TAS2770_CODEC
747 struct mutex codec_lock;
748 #endif
749 };
751 #endif /* __TAS2770_ */