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raw | patch | inline | side by side (parent: 66ac446)
raw | patch | inline | side by side (parent: 66ac446)
author | Tracy Yi <tracy-yi@ti.com> | |
Thu, 22 Feb 2018 07:12:47 +0000 (15:12 +0800) | ||
committer | Tracy Yi <tracy-yi@ti.com> | |
Thu, 22 Feb 2018 16:04:45 +0000 (00:04 +0800) |
Signed-off-by: Tracy Yi <tracy-yi@ti.com>
tas2770-codec.c | patch | blob | history | |
tas2770-regmap.c | patch | blob | history | |
tas2770.h | patch | blob | history |
diff --git a/tas2770-codec.c b/tas2770-codec.c
index 1dabd7b7b9d74796d7875abe7fa956c3f41b9090..ce05bc2172cb77d994b2350ed5e6cb115ea8b954 100644 (file)
--- a/tas2770-codec.c
+++ b/tas2770-codec.c
struct tas2770_priv *pTAS2770 = snd_soc_codec_get_drvdata(codec);
dev_err(pTAS2770->dev, "%s\n", __func__);
+ snd_soc_codec_init_regmap(codec, pTAS2770->regmap);
return 0;
}
}
static DECLARE_TLV_DB_SCALE(tas2770_digital_tlv, 1100, 50, 0);
+static DECLARE_TLV_DB_SCALE(tas2770_playback_volume, -10000, 50, 0);
static const struct snd_kcontrol_new tas2770_snd_controls[] = {
SOC_SINGLE_TLV("Amp Output Level", TAS2770_PlaybackConfigurationReg0,
0, TAS2770_PlaybackConfigurationReg0_AmplifierLevel40_Mask, 0,
tas2770_digital_tlv),
+ SOC_SINGLE_TLV("Playback Volume", TAS2770_PlaybackConfigurationReg2,
+ 0, TAS2770_PlaybackConfigurationReg2_DVCPCM70_Mask, 1,
+ tas2770_playback_volume),
};
static struct snd_soc_codec_driver soc_codec_driver_tas2770 = {
diff --git a/tas2770-regmap.c b/tas2770-regmap.c
index 8038b28cf0e37924bb42204bedef6c7fdecf2dc6..402d97320e2a5e09e98818143b26b0fdab7b61d4 100644 (file)
--- a/tas2770-regmap.c
+++ b/tas2770-regmap.c
pTAS2770->mnSlot_width = 0;
tas2770_hw_reset(pTAS2770);
+ regmap_write(pTAS2770->regmap, TAS2770_SoftwareReset,
+ TAS2770_SoftwareReset_SoftwareReset_Reset);
mutex_init(&pTAS2770->dev_lock);
if (nResult < 0)
diff --git a/tas2770.h b/tas2770.h
index 42ec701d6c1bc19015164640f02c060d9af06f4f..6545830a426a5d386f88e8ff48da2fc1f8af8673 100644 (file)
--- a/tas2770.h
+++ b/tas2770.h
/* Software Reset */
#define TAS2770_SoftwareReset TAS2770_REG(0X0, 0x01)
-#define TAS2770_SoftwareReset_SoftwareReset_Mask (0x1 << 0),
+#define TAS2770_SoftwareReset_SoftwareReset_Mask (0x1 << 0)
#define TAS2770_SoftwareReset_SoftwareReset_DontReset (0x0 << 0)
#define TAS2770_SoftwareReset_SoftwareReset_Reset (0x1 << 0)
#define TAS2770_PDMInputReg0 TAS2770_REG(0X0, 0x08)
#define TAS2770_PDMInputReg0_ClassDSYNC_Mask (0x1 << 6)
#define TAS2770_PDMInputReg0_ClassDSYNC_AsyncMode (0x0 << 6)
-#define TAS2770_PDMInputReg0_ClassDSYNC_Retry (0x1 << 6),
+#define TAS2770_PDMInputReg0_ClassDSYNC_Retry (0x1 << 6)
#define TAS2770_PDMInputReg0_PDMRATESW54_Mask (0x3 << 4)
#define TAS2770_PDMInputReg0_PDMRATED132_Mask (0x3 << 2)
#define TAS2770_PDMInputReg0_PDMRATED132_2_543_38MHz (0x0 << 2)
/* TDM Configuration Reg2 */
#define TAS2770_TDMConfigurationReg2 TAS2770_REG(0X0, 0x0C)
#define TAS2770_TDMConfigurationReg2_RXSCFG54_Mask (0x3 << 4)
-#define TAS2770_TDMConfigurationReg2_RXSCFG54_Mono_I2C (0x0 << 4),
-#define TAS2770_TDMConfigurationReg2_RXSCFG54_Mono_Left (0x1 << 4),
+#define TAS2770_TDMConfigurationReg2_RXSCFG54_Mono_I2C (0x0 << 4)
+#define TAS2770_TDMConfigurationReg2_RXSCFG54_Mono_Left (0x1 << 4)
#define TAS2770_TDMConfigurationReg2_RXSCFG54_Mono_Right (0x2 << 4)
#define TAS2770_TDMConfigurationReg2_RXSCFG54_Stereo_DownMix (0x3 << 4)
#define TAS2770_TDMConfigurationReg2_RXWLEN32_Mask (0x3 << 2)
/* Interrupt Configuration */
#define TAS2770_InterruptConfiguration TAS2770_REG(0X0, 0x30)
-#define TAS2770_InterruptConfiguration_INTTHRUSW_Mask (0x1 << 2),
+#define TAS2770_InterruptConfiguration_INTTHRUSW_Mask (0x1 << 2)
#define TAS2770_InterruptConfiguration_INTTHRUSW_IntOnIRQZ (0x0 << 2)
#define TAS2770_InterruptConfiguration_INTTHRUSW_IntFor2ms (0x1 << 2)
#define TAS2770_InterruptConfiguration_PININTConfig10_Mask (0x3 << 0)
#define TAS2770_TDMClockdetectionmonitor_SBCLKtoFSYNC63_256 (0x8 << 3)
#define TAS2770_TDMClockdetectionmonitor_SBCLKtoFSYNC63_384 (0x9 << 3)
#define TAS2770_TDMClockdetectionmonitor_SBCLKtoFSYNC63_512 (0xf << 3)
-#define TAS2770_TDMClockdetectionmonitor_DetectedSampleRate20_Mask (0x7 << 0),
+#define TAS2770_TDMClockdetectionmonitor_DetectedSampleRate20_Mask (0x7 << 0)
#define TAS2770_TDMClockdetectionmonitor_DetectedSampleRate20_8khz (0x0 << 0)
#define TAS2770_TDMClockdetectionmonitor_DetectedSampleRate20_16khz (0x1 << 0)
#define TAS2770_TDMClockdetectionmonitor_DetectedSampleRate20_32khz (0x2 << 0)