]> Gitweb @ Texas Instruments - Open Source Git Repositories - git.TI.com/gitweb - ti-analog-linux-kernel/dmurphy-analog.git/commitdiff
Merge branch 'drm-next-4.18' of git://people.freedesktop.org/~agd5f/linux into drm...
authorDave Airlie <airlied@redhat.com>
Tue, 15 May 2018 22:21:51 +0000 (08:21 +1000)
committerDave Airlie <airlied@redhat.com>
Tue, 15 May 2018 22:31:29 +0000 (08:31 +1000)
Main changes for 4.18.  I'd like to do a separate pull for vega20 later
this week or next.  Highlights:
- Reserve pre-OS scanout buffer during init for seemless transition from
  console to driver
- VEGAM support
- Improved GPU scheduler documentation
- Initial gfxoff support for raven
- SR-IOV fixes
- Default to non-AGP on PowerPC for radeon
- Fine grained clock voltage control for vega10
- Power profiles for vega10
- Further clean up of powerplay/driver interface
- Underlay fixes
- Display link bw updates
- Gamma fixes
- Scatter/Gather display support on CZ/ST
- Misc bug fixes and clean ups

[airlied: fixup v3d vs scheduler API change]

Link: https://patchwork.freedesktop.org/patch/msgid/20180515185450.1113-1-alexander.deucher@amd.com
Signed-off-by: Dave Airlie <airlied@redhat.com>
1  2 
drivers/gpu/drm/amd/amdgpu/Makefile
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
drivers/gpu/drm/amd/amdgpu/soc15d.h
drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
drivers/gpu/drm/amd/display/dc/core/dc.c
drivers/gpu/drm/v3d/v3d_drv.c

Simple merge
index 5296e24fd6620567d995a4b4d6d7651ce0e5907f,c1b0cdb401dcc8ed12b5d8af5512045dd37bcae8..72ab2b1ffe7510ef26b034a60addf51cd123f6fd
@@@ -1141,10 -1003,10 +1141,11 @@@ int amdgpu_amdkfd_gpuvm_alloc_memory_of
  {
        struct amdgpu_device *adev = get_amdgpu_device(kgd);
        struct amdgpu_vm *avm = (struct amdgpu_vm *)vm;
 +      uint64_t user_addr = 0;
        struct amdgpu_bo *bo;
+       struct amdgpu_bo_param bp;
        int byte_align;
 -      u32 alloc_domain;
 +      u32 domain, alloc_domain;
        u64 alloc_flags;
        uint32_t mapping_flags;
        int ret;
Simple merge
Simple merge
index 73fd48d6c756636e19f9dd70bedf2efa3614ebd3,8fd1b742985acad26dbf3fb747fe962acbb6e0a1..8fd1b742985acad26dbf3fb747fe962acbb6e0a1
mode 100644,100755..100644
index 38e8041b5f0c738c7e958dce36adb22391dd660b,0000000000000000000000000000000000000000..cdb582043b4fc26cc63a64e04eadcd1bd559e752
mode 100644,000000..100644
--- /dev/null
@@@ -1,371 -1,0 +1,371 @@@
-                                     32, NULL);
 +// SPDX-License-Identifier: GPL-2.0+
 +/* Copyright (C) 2014-2018 Broadcom */
 +
 +/**
 + * DOC: Broadcom V3D Graphics Driver
 + *
 + * This driver supports the Broadcom V3D 3.3 and 4.1 OpenGL ES GPUs.
 + * For V3D 2.x support, see the VC4 driver.
 + *
 + * Currently only single-core rendering using the binner and renderer
 + * is supported.  The TFU (texture formatting unit) and V3D 4.x's CSD
 + * (compute shader dispatch) are not yet supported.
 + */
 +
 +#include <linux/clk.h>
 +#include <linux/device.h>
 +#include <linux/io.h>
 +#include <linux/module.h>
 +#include <linux/of_platform.h>
 +#include <linux/platform_device.h>
 +#include <linux/pm_runtime.h>
 +#include <drm/drm_fb_cma_helper.h>
 +#include <drm/drm_fb_helper.h>
 +
 +#include "uapi/drm/v3d_drm.h"
 +#include "v3d_drv.h"
 +#include "v3d_regs.h"
 +
 +#define DRIVER_NAME "v3d"
 +#define DRIVER_DESC "Broadcom V3D graphics"
 +#define DRIVER_DATE "20180419"
 +#define DRIVER_MAJOR 1
 +#define DRIVER_MINOR 0
 +#define DRIVER_PATCHLEVEL 0
 +
 +#ifdef CONFIG_PM
 +static int v3d_runtime_suspend(struct device *dev)
 +{
 +      struct drm_device *drm = dev_get_drvdata(dev);
 +      struct v3d_dev *v3d = to_v3d_dev(drm);
 +
 +      v3d_irq_disable(v3d);
 +
 +      clk_disable_unprepare(v3d->clk);
 +
 +      return 0;
 +}
 +
 +static int v3d_runtime_resume(struct device *dev)
 +{
 +      struct drm_device *drm = dev_get_drvdata(dev);
 +      struct v3d_dev *v3d = to_v3d_dev(drm);
 +      int ret;
 +
 +      ret = clk_prepare_enable(v3d->clk);
 +      if (ret != 0)
 +              return ret;
 +
 +      /* XXX: VPM base */
 +
 +      v3d_mmu_set_page_table(v3d);
 +      v3d_irq_enable(v3d);
 +
 +      return 0;
 +}
 +#endif
 +
 +static const struct dev_pm_ops v3d_v3d_pm_ops = {
 +      SET_RUNTIME_PM_OPS(v3d_runtime_suspend, v3d_runtime_resume, NULL)
 +};
 +
 +static int v3d_get_param_ioctl(struct drm_device *dev, void *data,
 +                             struct drm_file *file_priv)
 +{
 +      struct v3d_dev *v3d = to_v3d_dev(dev);
 +      struct drm_v3d_get_param *args = data;
 +      int ret;
 +      static const u32 reg_map[] = {
 +              [DRM_V3D_PARAM_V3D_UIFCFG] = V3D_HUB_UIFCFG,
 +              [DRM_V3D_PARAM_V3D_HUB_IDENT1] = V3D_HUB_IDENT1,
 +              [DRM_V3D_PARAM_V3D_HUB_IDENT2] = V3D_HUB_IDENT2,
 +              [DRM_V3D_PARAM_V3D_HUB_IDENT3] = V3D_HUB_IDENT3,
 +              [DRM_V3D_PARAM_V3D_CORE0_IDENT0] = V3D_CTL_IDENT0,
 +              [DRM_V3D_PARAM_V3D_CORE0_IDENT1] = V3D_CTL_IDENT1,
 +              [DRM_V3D_PARAM_V3D_CORE0_IDENT2] = V3D_CTL_IDENT2,
 +      };
 +
 +      if (args->pad != 0)
 +              return -EINVAL;
 +
 +      /* Note that DRM_V3D_PARAM_V3D_CORE0_IDENT0 is 0, so we need
 +       * to explicitly allow it in the "the register in our
 +       * parameter map" check.
 +       */
 +      if (args->param < ARRAY_SIZE(reg_map) &&
 +          (reg_map[args->param] ||
 +           args->param == DRM_V3D_PARAM_V3D_CORE0_IDENT0)) {
 +              u32 offset = reg_map[args->param];
 +
 +              if (args->value != 0)
 +                      return -EINVAL;
 +
 +              ret = pm_runtime_get_sync(v3d->dev);
 +              if (args->param >= DRM_V3D_PARAM_V3D_CORE0_IDENT0 &&
 +                  args->param <= DRM_V3D_PARAM_V3D_CORE0_IDENT2) {
 +                      args->value = V3D_CORE_READ(0, offset);
 +              } else {
 +                      args->value = V3D_READ(offset);
 +              }
 +              pm_runtime_mark_last_busy(v3d->dev);
 +              pm_runtime_put_autosuspend(v3d->dev);
 +              return 0;
 +      }
 +
 +      /* Any params that aren't just register reads would go here. */
 +
 +      DRM_DEBUG("Unknown parameter %d\n", args->param);
 +      return -EINVAL;
 +}
 +
 +static int
 +v3d_open(struct drm_device *dev, struct drm_file *file)
 +{
 +      struct v3d_dev *v3d = to_v3d_dev(dev);
 +      struct v3d_file_priv *v3d_priv;
 +      int i;
 +
 +      v3d_priv = kzalloc(sizeof(*v3d_priv), GFP_KERNEL);
 +      if (!v3d_priv)
 +              return -ENOMEM;
 +
 +      v3d_priv->v3d = v3d;
 +
 +      for (i = 0; i < V3D_MAX_QUEUES; i++) {
 +              drm_sched_entity_init(&v3d->queue[i].sched,
 +                                    &v3d_priv->sched_entity[i],
 +                                    &v3d->queue[i].sched.sched_rq[DRM_SCHED_PRIORITY_NORMAL],
++                                    NULL);
 +      }
 +
 +      file->driver_priv = v3d_priv;
 +
 +      return 0;
 +}
 +
 +static void
 +v3d_postclose(struct drm_device *dev, struct drm_file *file)
 +{
 +      struct v3d_dev *v3d = to_v3d_dev(dev);
 +      struct v3d_file_priv *v3d_priv = file->driver_priv;
 +      enum v3d_queue q;
 +
 +      for (q = 0; q < V3D_MAX_QUEUES; q++) {
 +              drm_sched_entity_fini(&v3d->queue[q].sched,
 +                                    &v3d_priv->sched_entity[q]);
 +      }
 +
 +      kfree(v3d_priv);
 +}
 +
 +static const struct file_operations v3d_drm_fops = {
 +      .owner = THIS_MODULE,
 +      .open = drm_open,
 +      .release = drm_release,
 +      .unlocked_ioctl = drm_ioctl,
 +      .mmap = v3d_mmap,
 +      .poll = drm_poll,
 +      .read = drm_read,
 +      .compat_ioctl = drm_compat_ioctl,
 +      .llseek = noop_llseek,
 +};
 +
 +/* DRM_AUTH is required on SUBMIT_CL for now, while we don't have GMP
 + * protection between clients.  Note that render nodes would be be
 + * able to submit CLs that could access BOs from clients authenticated
 + * with the master node.
 + */
 +static const struct drm_ioctl_desc v3d_drm_ioctls[] = {
 +      DRM_IOCTL_DEF_DRV(V3D_SUBMIT_CL, v3d_submit_cl_ioctl, DRM_RENDER_ALLOW | DRM_AUTH),
 +      DRM_IOCTL_DEF_DRV(V3D_WAIT_BO, v3d_wait_bo_ioctl, DRM_RENDER_ALLOW),
 +      DRM_IOCTL_DEF_DRV(V3D_CREATE_BO, v3d_create_bo_ioctl, DRM_RENDER_ALLOW),
 +      DRM_IOCTL_DEF_DRV(V3D_MMAP_BO, v3d_mmap_bo_ioctl, DRM_RENDER_ALLOW),
 +      DRM_IOCTL_DEF_DRV(V3D_GET_PARAM, v3d_get_param_ioctl, DRM_RENDER_ALLOW),
 +      DRM_IOCTL_DEF_DRV(V3D_GET_BO_OFFSET, v3d_get_bo_offset_ioctl, DRM_RENDER_ALLOW),
 +};
 +
 +static const struct vm_operations_struct v3d_vm_ops = {
 +      .fault = v3d_gem_fault,
 +      .open = drm_gem_vm_open,
 +      .close = drm_gem_vm_close,
 +};
 +
 +static struct drm_driver v3d_drm_driver = {
 +      .driver_features = (DRIVER_GEM |
 +                          DRIVER_RENDER |
 +                          DRIVER_PRIME |
 +                          DRIVER_SYNCOBJ),
 +
 +      .open = v3d_open,
 +      .postclose = v3d_postclose,
 +
 +#if defined(CONFIG_DEBUG_FS)
 +      .debugfs_init = v3d_debugfs_init,
 +#endif
 +
 +      .gem_free_object_unlocked = v3d_free_object,
 +      .gem_vm_ops = &v3d_vm_ops,
 +
 +      .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
 +      .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
 +      .gem_prime_import = drm_gem_prime_import,
 +      .gem_prime_export = drm_gem_prime_export,
 +      .gem_prime_res_obj = v3d_prime_res_obj,
 +      .gem_prime_get_sg_table = v3d_prime_get_sg_table,
 +      .gem_prime_import_sg_table = v3d_prime_import_sg_table,
 +      .gem_prime_mmap = v3d_prime_mmap,
 +
 +      .ioctls = v3d_drm_ioctls,
 +      .num_ioctls = ARRAY_SIZE(v3d_drm_ioctls),
 +      .fops = &v3d_drm_fops,
 +
 +      .name = DRIVER_NAME,
 +      .desc = DRIVER_DESC,
 +      .date = DRIVER_DATE,
 +      .major = DRIVER_MAJOR,
 +      .minor = DRIVER_MINOR,
 +      .patchlevel = DRIVER_PATCHLEVEL,
 +};
 +
 +static const struct of_device_id v3d_of_match[] = {
 +      { .compatible = "brcm,7268-v3d" },
 +      { .compatible = "brcm,7278-v3d" },
 +      {},
 +};
 +MODULE_DEVICE_TABLE(of, v3d_of_match);
 +
 +static int
 +map_regs(struct v3d_dev *v3d, void __iomem **regs, const char *name)
 +{
 +      struct resource *res =
 +              platform_get_resource_byname(v3d->pdev, IORESOURCE_MEM, name);
 +
 +      *regs = devm_ioremap_resource(v3d->dev, res);
 +      return PTR_ERR_OR_ZERO(*regs);
 +}
 +
 +static int v3d_platform_drm_probe(struct platform_device *pdev)
 +{
 +      struct device *dev = &pdev->dev;
 +      struct drm_device *drm;
 +      struct v3d_dev *v3d;
 +      int ret;
 +      u32 ident1;
 +
 +      dev->coherent_dma_mask = DMA_BIT_MASK(36);
 +
 +      v3d = kzalloc(sizeof(*v3d), GFP_KERNEL);
 +      if (!v3d)
 +              return -ENOMEM;
 +      v3d->dev = dev;
 +      v3d->pdev = pdev;
 +      drm = &v3d->drm;
 +
 +      ret = map_regs(v3d, &v3d->bridge_regs, "bridge");
 +      if (ret)
 +              goto dev_free;
 +
 +      ret = map_regs(v3d, &v3d->hub_regs, "hub");
 +      if (ret)
 +              goto dev_free;
 +
 +      ret = map_regs(v3d, &v3d->core_regs[0], "core0");
 +      if (ret)
 +              goto dev_free;
 +
 +      ident1 = V3D_READ(V3D_HUB_IDENT1);
 +      v3d->ver = (V3D_GET_FIELD(ident1, V3D_HUB_IDENT1_TVER) * 10 +
 +                  V3D_GET_FIELD(ident1, V3D_HUB_IDENT1_REV));
 +      v3d->cores = V3D_GET_FIELD(ident1, V3D_HUB_IDENT1_NCORES);
 +      WARN_ON(v3d->cores > 1); /* multicore not yet implemented */
 +
 +      if (v3d->ver < 41) {
 +              ret = map_regs(v3d, &v3d->gca_regs, "gca");
 +              if (ret)
 +                      goto dev_free;
 +      }
 +
 +      v3d->mmu_scratch = dma_alloc_wc(dev, 4096, &v3d->mmu_scratch_paddr,
 +                                      GFP_KERNEL | __GFP_NOWARN | __GFP_ZERO);
 +      if (!v3d->mmu_scratch) {
 +              dev_err(dev, "Failed to allocate MMU scratch page\n");
 +              ret = -ENOMEM;
 +              goto dev_free;
 +      }
 +
 +      pm_runtime_use_autosuspend(dev);
 +      pm_runtime_set_autosuspend_delay(dev, 50);
 +      pm_runtime_enable(dev);
 +
 +      ret = drm_dev_init(&v3d->drm, &v3d_drm_driver, dev);
 +      if (ret)
 +              goto dma_free;
 +
 +      platform_set_drvdata(pdev, drm);
 +      drm->dev_private = v3d;
 +
 +      ret = v3d_gem_init(drm);
 +      if (ret)
 +              goto dev_destroy;
 +
 +      v3d_irq_init(v3d);
 +
 +      ret = drm_dev_register(drm, 0);
 +      if (ret)
 +              goto gem_destroy;
 +
 +      return 0;
 +
 +gem_destroy:
 +      v3d_gem_destroy(drm);
 +dev_destroy:
 +      drm_dev_put(drm);
 +dma_free:
 +      dma_free_wc(dev, 4096, v3d->mmu_scratch, v3d->mmu_scratch_paddr);
 +dev_free:
 +      kfree(v3d);
 +      return ret;
 +}
 +
 +static int v3d_platform_drm_remove(struct platform_device *pdev)
 +{
 +      struct drm_device *drm = platform_get_drvdata(pdev);
 +      struct v3d_dev *v3d = to_v3d_dev(drm);
 +
 +      drm_dev_unregister(drm);
 +
 +      v3d_gem_destroy(drm);
 +
 +      drm_dev_put(drm);
 +
 +      dma_free_wc(v3d->dev, 4096, v3d->mmu_scratch, v3d->mmu_scratch_paddr);
 +
 +      return 0;
 +}
 +
 +static struct platform_driver v3d_platform_driver = {
 +      .probe          = v3d_platform_drm_probe,
 +      .remove         = v3d_platform_drm_remove,
 +      .driver         = {
 +              .name   = "v3d",
 +              .of_match_table = v3d_of_match,
 +      },
 +};
 +
 +static int __init v3d_drm_register(void)
 +{
 +      return platform_driver_register(&v3d_platform_driver);
 +}
 +
 +static void __exit v3d_drm_unregister(void)
 +{
 +      platform_driver_unregister(&v3d_platform_driver);
 +}
 +
 +module_init(v3d_drm_register);
 +module_exit(v3d_drm_unregister);
 +
 +MODULE_ALIAS("platform:v3d-drm");
 +MODULE_DESCRIPTION("Broadcom V3D DRM Driver");
 +MODULE_AUTHOR("Eric Anholt <eric@anholt.net>");
 +MODULE_LICENSE("GPL v2");