4 years agoMerge branch 'ti-linux-4.19.y-for-next' of git://git.ti.com/~vigneshr/ti-linux-kernel... ti-linux-4.19.y-next-20190723
Merge branch 'ti-linux-4.19.y-for-next' of git://git.ti.com/~vigneshr/ti-linux-kernel/vigneshr-ti-linux-kernel into ti-linux-4.19.y-next
TI-Feature: vigneshr_next
TI-Tree: git://git.ti.com/~vigneshr/ti-linux-kernel/vigneshr-ti-linux-kernel.git
TI-Branch: ti-linux-4.19.y-for-next
* 'ti-linux-4.19.y-for-next' of git://git.ti.com/~vigneshr/ti-linux-kernel/vigneshr-ti-linux-kernel: (32 commits)
connectivity.cfg: Enable UFS related configs
arm64: dts: ti: k3-j721e-main: Add UFS DT nodes
scsi: ufs: Add TI glue layer driver for Cadence UFS controller
dt-bindings: ufs: Add DT bindings for TI J721e UFS glue layer
scsi: ufs: cdns-pltfrm: Disable Auto-Hibernate Idle Timer
scsi: ufs: cdns-pltfrm: Clear TX_LCC_ENABLE
scsi: ufs: cdns-pltfrm: Move clkdiv setting to hce_enable_notify()
scsi: ufs-cdns: Add support for UFSHCI with M31 PHY
scsi: dt-bindings: ufs-cdns: Update Cadence UFS compatibility list
scsi: ufs: Add UFS platform driver for Cadence UFS
scsi: dt-bindings: ufs: Add bindings for Cadence UFS
scsi: ufs: Add error-handling of Auto-Hibernate
scsi: ufs: Do not overwrite Auto-Hibernate timer
scsi: ufs: Introduce ufshcd_is_auto_hibern8_supported()
scsi: ufs: set the device reference clock setting
scsi: ufs: Fix RX_TERMINATION_FORCE_ENABLE define value
scsi: ufs: Check that space was properly alloced in copy_query_response
scsi: ufs-bsg: complete ufs-bsg job only if no error
scsi: ufs-bsg: fix typo in ufs_bsg_request
scsi: ufs-bsg: Allow reading descriptors
...
Signed-off-by: LCPD Auto Merger <lcpd_integration@list.ti.com>
TI-Feature: vigneshr_next
TI-Tree: git://git.ti.com/~vigneshr/ti-linux-kernel/vigneshr-ti-linux-kernel.git
TI-Branch: ti-linux-4.19.y-for-next
* 'ti-linux-4.19.y-for-next' of git://git.ti.com/~vigneshr/ti-linux-kernel/vigneshr-ti-linux-kernel: (32 commits)
connectivity.cfg: Enable UFS related configs
arm64: dts: ti: k3-j721e-main: Add UFS DT nodes
scsi: ufs: Add TI glue layer driver for Cadence UFS controller
dt-bindings: ufs: Add DT bindings for TI J721e UFS glue layer
scsi: ufs: cdns-pltfrm: Disable Auto-Hibernate Idle Timer
scsi: ufs: cdns-pltfrm: Clear TX_LCC_ENABLE
scsi: ufs: cdns-pltfrm: Move clkdiv setting to hce_enable_notify()
scsi: ufs-cdns: Add support for UFSHCI with M31 PHY
scsi: dt-bindings: ufs-cdns: Update Cadence UFS compatibility list
scsi: ufs: Add UFS platform driver for Cadence UFS
scsi: dt-bindings: ufs: Add bindings for Cadence UFS
scsi: ufs: Add error-handling of Auto-Hibernate
scsi: ufs: Do not overwrite Auto-Hibernate timer
scsi: ufs: Introduce ufshcd_is_auto_hibern8_supported()
scsi: ufs: set the device reference clock setting
scsi: ufs: Fix RX_TERMINATION_FORCE_ENABLE define value
scsi: ufs: Check that space was properly alloced in copy_query_response
scsi: ufs-bsg: complete ufs-bsg job only if no error
scsi: ufs-bsg: fix typo in ufs_bsg_request
scsi: ufs-bsg: Allow reading descriptors
...
Signed-off-by: LCPD Auto Merger <lcpd_integration@list.ti.com>
Merge branch 'rpmsg-ti-linux-4.19.y-next' of git://git.ti.com/rpmsg/rpmsg into ti-linux-4.19.y-next
TI-Feature: rpmsg_next
TI-Tree: git://git.ti.com/rpmsg/rpmsg.git
TI-Branch: rpmsg-ti-linux-4.19.y-next
* 'rpmsg-ti-linux-4.19.y-next' of git://git.ti.com/rpmsg/rpmsg:
soc: ti: pruss: update pruss_get() to retrieve a PRUSS id
soc: ti: pruss: store the pruss instance id
remoteproc: Add a sysfs interface for name
remoteproc/k3-r5: Extend IPC-only mode detection for AM65x SoCs
arm64: dts: ti: k3-am654-base-board: Reserve memory for IPC between R5F cores
arm64: dts: ti: k3-am654-base-board: Update R5F DDR carveout memory nodes
Signed-off-by: LCPD Auto Merger <lcpd_integration@list.ti.com>
TI-Feature: rpmsg_next
TI-Tree: git://git.ti.com/rpmsg/rpmsg.git
TI-Branch: rpmsg-ti-linux-4.19.y-next
* 'rpmsg-ti-linux-4.19.y-next' of git://git.ti.com/rpmsg/rpmsg:
soc: ti: pruss: update pruss_get() to retrieve a PRUSS id
soc: ti: pruss: store the pruss instance id
remoteproc: Add a sysfs interface for name
remoteproc/k3-r5: Extend IPC-only mode detection for AM65x SoCs
arm64: dts: ti: k3-am654-base-board: Reserve memory for IPC between R5F cores
arm64: dts: ti: k3-am654-base-board: Update R5F DDR carveout memory nodes
Signed-off-by: LCPD Auto Merger <lcpd_integration@list.ti.com>
Merge branch 'connectivity-next' of git://git.ti.com/~nsekhar/ti-linux-kernel/nsekhar-ti-linux-kernel into ti-linux-4.19.y-next
TI-Feature: connectivity_next
TI-Tree: git://git.ti.com/~nsekhar/ti-linux-kernel/nsekhar-ti-linux-kernel.git
TI-Branch: connectivity-next
* 'connectivity-next' of git://git.ti.com/~nsekhar/ti-linux-kernel/nsekhar-ti-linux-kernel:
ti_config_fragments/connectivity.cfg: enable DaVinci NAND explicitly
arm64: dts: ti: am654-pcie-usb3: Enable USB0 as High-speed Host
Signed-off-by: LCPD Auto Merger <lcpd_integration@list.ti.com>
TI-Feature: connectivity_next
TI-Tree: git://git.ti.com/~nsekhar/ti-linux-kernel/nsekhar-ti-linux-kernel.git
TI-Branch: connectivity-next
* 'connectivity-next' of git://git.ti.com/~nsekhar/ti-linux-kernel/nsekhar-ti-linux-kernel:
ti_config_fragments/connectivity.cfg: enable DaVinci NAND explicitly
arm64: dts: ti: am654-pcie-usb3: Enable USB0 as High-speed Host
Signed-off-by: LCPD Auto Merger <lcpd_integration@list.ti.com>
soc: ti: pruss: update pruss_get() to retrieve a PRUSS id
Update the pruss_get() function to take in an additional integer
pointer argument in which the PRUSS instance id is filled in and
provided back to the callers. This allows the drivers to add some
instance-specific logic/customization in their code, as the PRUSS
handle is not useful to build this logic.
The already existing usage within both the regular PRU Ethernet
and the ICSSG PRU Ethernet drivers have also been updated accordingly,
and this will cater to its need for supporting switching between
different Ethernet protocols dynamically per instance. The invocation
within the PRU Soft UART driver has also been updated, with this
driver not needing the PRUSS instance id at present.
Signed-off-by: Suman Anna <s-anna@ti.com>
Update the pruss_get() function to take in an additional integer
pointer argument in which the PRUSS instance id is filled in and
provided back to the callers. This allows the drivers to add some
instance-specific logic/customization in their code, as the PRUSS
handle is not useful to build this logic.
The already existing usage within both the regular PRU Ethernet
and the ICSSG PRU Ethernet drivers have also been updated accordingly,
and this will cater to its need for supporting switching between
different Ethernet protocols dynamically per instance. The invocation
within the PRU Soft UART driver has also been updated, with this
driver not needing the PRUSS instance id at present.
Signed-off-by: Suman Anna <s-anna@ti.com>
soc: ti: pruss: store the pruss instance id
Add logic to the PRUSS platform driver to store the instance id
of a PRUSS instance. This is being added to enable support for
the PRU Ethernet driver to be able to switch between different
Ethernet protocols dynamically per instance.
The values for instance ids are not always zero-indexed on all
SoCs, they were chosen to match the numbering used in the TRMs.
The instance ids are computed assigned using the PRUSS memory
region base address lookup table. The base address matching
logic is not robust for long-term for newer SoCs, but is okay
for currently supported SoCs as all the addresses are unique.
This is done this way to retain the current usage of minimal
static data and to avoid having to introduce the instance
specific static data just for the instance id data.
Signed-off-by: Suman Anna <s-anna@ti.com>
Add logic to the PRUSS platform driver to store the instance id
of a PRUSS instance. This is being added to enable support for
the PRU Ethernet driver to be able to switch between different
Ethernet protocols dynamically per instance.
The values for instance ids are not always zero-indexed on all
SoCs, they were chosen to match the numbering used in the TRMs.
The instance ids are computed assigned using the PRUSS memory
region base address lookup table. The base address matching
logic is not robust for long-term for newer SoCs, but is okay
for currently supported SoCs as all the addresses are unique.
This is done this way to retain the current usage of minimal
static data and to avoid having to introduce the instance
specific static data just for the instance id data.
Signed-off-by: Suman Anna <s-anna@ti.com>
remoteproc: Add a sysfs interface for name
This patch adds a sysfs interface that provides the name of the
remote processor to userspace. This allows the userspace to identify
a remote processor as the remoteproc devices themselves are created
based on probe order and can change from one boot to another or
at runtime.
The name is made available in debugfs originally, and is being
retained for now. This can be cleaned up after couple of releases
once users get familiar with the new interface.
Signed-off-by: Suman Anna <s-anna@ti.com>
This patch adds a sysfs interface that provides the name of the
remote processor to userspace. This allows the userspace to identify
a remote processor as the remoteproc devices themselves are created
based on probe order and can change from one boot to another or
at runtime.
The name is made available in debugfs originally, and is being
retained for now. This can be cleaned up after couple of releases
once users get familiar with the new interface.
Signed-off-by: Suman Anna <s-anna@ti.com>
remoteproc/k3-r5: Extend IPC-only mode detection for AM65x SoCs
The commit ad0833e3cf80 ("remoteproc/k3-r5: add support for IPC-only
mode for all R5Fs on J721E SoCs") has added the support for dynamic
detection of remoteproc mode or IPC-only mode but limited the feature
to only J721E SoCs. Extend this dynamic detection support now for
AM65x/DRA80x SoCs now that the early-boot support has been extended
in U-Boot for these SoCs as well. All that is needed is to simply
drop the SoC enforcement check.
Signed-off-by: Suman Anna <s-anna@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
The commit ad0833e3cf80 ("remoteproc/k3-r5: add support for IPC-only
mode for all R5Fs on J721E SoCs") has added the support for dynamic
detection of remoteproc mode or IPC-only mode but limited the feature
to only J721E SoCs. Extend this dynamic detection support now for
AM65x/DRA80x SoCs now that the early-boot support has been extended
in U-Boot for these SoCs as well. All that is needed is to simply
drop the SoC enforcement check.
Signed-off-by: Suman Anna <s-anna@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Merge branch 'topic/4.19/am65x' into rpmsg-ti-linux-4.19.y-next
* topic/4.19/am65x:
arm64: dts: ti: k3-am654-base-board: Reserve memory for IPC between R5F cores
arm64: dts: ti: k3-am654-base-board: Update R5F DDR carveout memory nodes
Signed-off-by: Suman Anna <s-anna@ti.com>
* topic/4.19/am65x:
arm64: dts: ti: k3-am654-base-board: Reserve memory for IPC between R5F cores
arm64: dts: ti: k3-am654-base-board: Update R5F DDR carveout memory nodes
Signed-off-by: Suman Anna <s-anna@ti.com>
arm64: dts: ti: k3-am654-base-board: Reserve memory for IPC between R5F cores
Add a reserved memory node to reserve a portion of the DDR memory to be
used for performing inter-processor communication between all the MCU R5F
remote processors running RTOS on all the TI AM654 boards. This memory
shall be exercised only if the MCU R5FSS cluster is configured for Split
mode. A single 1 MB of memory at 0xa2000000 is reserved for this purpose,
and this accounts for all the vrings and vring buffers between pair of
these R5F remote processors.
Signed-off-by: Suman Anna <s-anna@ti.com>
Add a reserved memory node to reserve a portion of the DDR memory to be
used for performing inter-processor communication between all the MCU R5F
remote processors running RTOS on all the TI AM654 boards. This memory
shall be exercised only if the MCU R5FSS cluster is configured for Split
mode. A single 1 MB of memory at 0xa2000000 is reserved for this purpose,
and this accounts for all the vrings and vring buffers between pair of
these R5F remote processors.
Signed-off-by: Suman Anna <s-anna@ti.com>
arm64: dts: ti: k3-am654-base-board: Update R5F DDR carveout memory nodes
The commit 144cef9df918 ("arm64: dts: ti: k3-am654-base-board: Add DDR
carveout memory nodes for R5Fs") has reserved some static carveouts
(8 MB @ 0x9c000000 for Core0 and 16 MB @ 0x9b000000 for Core1) for both
of the R5F cores in the MCU domain.
Update these regions to reserve 16 MB each for each core starting at
0xa0000000. This is to align and match the memory map for these MCU
R5Fs on both AM65x and J721E SoCs. All the existing firmware images
need to be updated to match these static reserved regions.
Signed-off-by: Suman Anna <s-anna@ti.com>
The commit 144cef9df918 ("arm64: dts: ti: k3-am654-base-board: Add DDR
carveout memory nodes for R5Fs") has reserved some static carveouts
(8 MB @ 0x9c000000 for Core0 and 16 MB @ 0x9b000000 for Core1) for both
of the R5F cores in the MCU domain.
Update these regions to reserve 16 MB each for each core starting at
0xa0000000. This is to align and match the memory map for these MCU
R5Fs on both AM65x and J721E SoCs. All the existing firmware images
need to be updated to match these static reserved regions.
Signed-off-by: Suman Anna <s-anna@ti.com>
Merge branch 'platform-ti-linux-4.19.y' of git://git.ti.com/~rrnayak/ti-linux-kernel/platform-linux-feature-tree into ti-linux-4.19.y
TI-Feature: platform_base
TI-Tree: git://git.ti.com/~rrnayak/ti-linux-kernel/platform-linux-feature-tree.git
TI-Branch: platform-ti-linux-4.19.y
* 'platform-ti-linux-4.19.y' of git://git.ti.com/~rrnayak/ti-linux-kernel/platform-linux-feature-tree:
arm64: dts: ti: k3-j721e-main.dtsi: Add dma-coherent to smmu0
arm64: dts: k3-j721: Enable the SMMU for guest cells
Signed-off-by: LCPD Auto Merger <lcpd_integration@list.ti.com>
TI-Feature: platform_base
TI-Tree: git://git.ti.com/~rrnayak/ti-linux-kernel/platform-linux-feature-tree.git
TI-Branch: platform-ti-linux-4.19.y
* 'platform-ti-linux-4.19.y' of git://git.ti.com/~rrnayak/ti-linux-kernel/platform-linux-feature-tree:
arm64: dts: ti: k3-j721e-main.dtsi: Add dma-coherent to smmu0
arm64: dts: k3-j721: Enable the SMMU for guest cells
Signed-off-by: LCPD Auto Merger <lcpd_integration@list.ti.com>
connectivity.cfg: Enable UFS related configs
Enable UFS related configs to support UFS on J721e SoC.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Enable UFS related configs to support UFS on J721e SoC.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
arm64: dts: ti: k3-j721e-main: Add UFS DT nodes
Add TI UFS glue layer and Cadence UFS Host controller DT nodes.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Add TI UFS glue layer and Cadence UFS Host controller DT nodes.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
scsi: ufs: Add TI glue layer driver for Cadence UFS controller
TI J721e SoC has Cadence UFS controller embedded inside a TI specific
glue layer that controls UFS slave device reset, UFS M-PHY clock
frequency and other M-PHY related parameter configuration. Add a driver
driver for the same.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
TI J721e SoC has Cadence UFS controller embedded inside a TI specific
glue layer that controls UFS slave device reset, UFS M-PHY clock
frequency and other M-PHY related parameter configuration. Add a driver
driver for the same.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
dt-bindings: ufs: Add DT bindings for TI J721e UFS glue layer
Add DT bindings TI specific glue layer driver for Cadence UFS Host
Controller present in J721e SoC
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Add DT bindings TI specific glue layer driver for Cadence UFS Host
Controller present in J721e SoC
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
scsi: ufs: cdns-pltfrm: Disable Auto-Hibernate Idle Timer
Disable Auto Hibernate Idle Timer by setting timer value to 0ms. This
provides max read/write throughput, userspace can always override the
value via sysfs if required.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Disable Auto Hibernate Idle Timer by setting timer value to 0ms. This
provides max read/write throughput, userspace can always override the
value via sysfs if required.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
scsi: ufs: cdns-pltfrm: Clear TX_LCC_ENABLE
M31 MPHY does not support LCC, therefore clear PA_LOCAL_TX_LCC_ENABLE so
that LCC is disabled at Host. Device LCC wil be disabled later on
after link startup based on UFSHCD_QUIRK_BROKEN_LCC flag
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
M31 MPHY does not support LCC, therefore clear PA_LOCAL_TX_LCC_ENABLE so
that LCC is disabled at Host. Device LCC wil be disabled later on
after link startup based on UFSHCD_QUIRK_BROKEN_LCC flag
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
scsi: ufs: cdns-pltfrm: Move clkdiv setting to hce_enable_notify()
Setting vendor specific CDNS_UFS_REG_HCLKDIV register during in
setup_clock() callback is not enough as host controller may be reset
later on (e.g: controller is reset if link startup fails first time
around) leading to loss of this configuration. Therefore move this code
to hce_enable_notify() callback that is called every time controller is
being re-enabled.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Setting vendor specific CDNS_UFS_REG_HCLKDIV register during in
setup_clock() callback is not enough as host controller may be reset
later on (e.g: controller is reset if link startup fails first time
around) leading to loss of this configuration. Therefore move this code
to hce_enable_notify() callback that is called every time controller is
being re-enabled.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
scsi: ufs-cdns: Add support for UFSHCI with M31 PHY
commit 4fed62bc1c2679d5d4684d71c5ef48a384f29e98 upstream.
This patch adds an additional PHY initialization, required for M31 PHY when
used with Cadence UFS HC. A new compatible string has been added for this
purpose.
[mkp: nuke superfluous status return]
Signed-off-by: Jan Kotas <jank@cadence.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
commit 4fed62bc1c2679d5d4684d71c5ef48a384f29e98 upstream.
This patch adds an additional PHY initialization, required for M31 PHY when
used with Cadence UFS HC. A new compatible string has been added for this
purpose.
[mkp: nuke superfluous status return]
Signed-off-by: Jan Kotas <jank@cadence.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
scsi: dt-bindings: ufs-cdns: Update Cadence UFS compatibility list
commit 5328efce9461ce39c04e7b0b6eec563f5ac1f3e9 upstream.
This patch adds a new compatible string description for CDNS UFS HCD + M31
16nm PHY.
Signed-off-by: Jan Kotas <jank@cadence.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
commit 5328efce9461ce39c04e7b0b6eec563f5ac1f3e9 upstream.
This patch adds a new compatible string description for CDNS UFS HCD + M31
16nm PHY.
Signed-off-by: Jan Kotas <jank@cadence.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
scsi: ufs: Add UFS platform driver for Cadence UFS
commit d90996dae8e48e042bd9fbfc11c73504a19a6e68 upstream.
This patch adds a device tree platform driver for Cadence UFS Host
Controller. It can be enabled with SCSI_UFS_CDNS_PLATFORM Kconfig option.
Signed-off-by: Jan Kotas <jank@cadence.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
commit d90996dae8e48e042bd9fbfc11c73504a19a6e68 upstream.
This patch adds a device tree platform driver for Cadence UFS Host
Controller. It can be enabled with SCSI_UFS_CDNS_PLATFORM Kconfig option.
Signed-off-by: Jan Kotas <jank@cadence.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
scsi: dt-bindings: ufs: Add bindings for Cadence UFS
commit 85408f830e704fdc2353dbf4454df01949f51257 upstream.
This patch adds a DT binding documentation for Cadence UFS Host Controller.
Signed-off-by: Jan Kotas <jank@cadence.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
commit 85408f830e704fdc2353dbf4454df01949f51257 upstream.
This patch adds a DT binding documentation for Cadence UFS Host Controller.
Signed-off-by: Jan Kotas <jank@cadence.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
scsi: ufs: Add error-handling of Auto-Hibernate
commit 821744403913d957cb52263b2016fd5bd29c30d0 upstream.
Currently auto-hibernate is activated if host supports auto-hibern8
capability. However error-handling is not implemented, which makes the
feature somewhat risky.
If either "Hibernate Enter" or "Hibernate Exit" fail during auto-hibernate
flow, the corresponding interrupt "UIC_HIBERNATE_ENTER" or
"UIC_HIBERNATE_EXIT" shall be raised according to UFS specification.
This patch adds auto-hibernate error-handling:
- Monitor "Hibernate Enter" and "Hibernate Exit" interrupts after
auto-hibernate feature is activated.
- If a failure happens, trigger error-handling just like
"manual-hibernate" failure and apply the same recovery flow: schedule
UFS error handler in ufshcd_check_errors(), and then do host reset and
restore in UFS error handler.
Signed-off-by: Stanley Chu <stanley.chu@mediatek.com>
Reviewed-by: Bean Huo <beanhuo@micron.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Avri Altman <Avri.Altman@wdc.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
commit 821744403913d957cb52263b2016fd5bd29c30d0 upstream.
Currently auto-hibernate is activated if host supports auto-hibern8
capability. However error-handling is not implemented, which makes the
feature somewhat risky.
If either "Hibernate Enter" or "Hibernate Exit" fail during auto-hibernate
flow, the corresponding interrupt "UIC_HIBERNATE_ENTER" or
"UIC_HIBERNATE_EXIT" shall be raised according to UFS specification.
This patch adds auto-hibernate error-handling:
- Monitor "Hibernate Enter" and "Hibernate Exit" interrupts after
auto-hibernate feature is activated.
- If a failure happens, trigger error-handling just like
"manual-hibernate" failure and apply the same recovery flow: schedule
UFS error handler in ufshcd_check_errors(), and then do host reset and
restore in UFS error handler.
Signed-off-by: Stanley Chu <stanley.chu@mediatek.com>
Reviewed-by: Bean Huo <beanhuo@micron.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Avri Altman <Avri.Altman@wdc.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
scsi: ufs: Do not overwrite Auto-Hibernate timer
commit f571b377ded7466e175e73c116df9ae09527dcb0 upstream.
Some vendor-specific initialization flow may set its own auto-hibernate
timer. In this case, do not overwrite timer value as "default value" in
ufshcd_init().
Signed-off-by: Stanley Chu <stanley.chu@mediatek.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Avri Altman <Avri.Altman@wdc.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
commit f571b377ded7466e175e73c116df9ae09527dcb0 upstream.
Some vendor-specific initialization flow may set its own auto-hibernate
timer. In this case, do not overwrite timer value as "default value" in
ufshcd_init().
Signed-off-by: Stanley Chu <stanley.chu@mediatek.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Avri Altman <Avri.Altman@wdc.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
scsi: ufs: Introduce ufshcd_is_auto_hibern8_supported()
commit ee5f1042b20e1ffbc5c7eb0e0883fdbc05cec85f upstream.
The checking of Auto-Hibernation support is used in many places in the
driver, thus re-factor it as ufshcd_is_auto_hibern8_supported() to make
code more clean.
Signed-off-by: Stanley Chu <stanley.chu@mediatek.com>
Reviewed-by: Bean Huo <beanhuo@micron.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Avri Altman <Avri.Altman@wdc.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
commit ee5f1042b20e1ffbc5c7eb0e0883fdbc05cec85f upstream.
The checking of Auto-Hibernation support is used in many places in the
driver, thus re-factor it as ufshcd_is_auto_hibern8_supported() to make
code more clean.
Signed-off-by: Stanley Chu <stanley.chu@mediatek.com>
Reviewed-by: Bean Huo <beanhuo@micron.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Avri Altman <Avri.Altman@wdc.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
scsi: ufs: set the device reference clock setting
commit 9e1e8a75708031937a0f92567c19760c92658410 upstream.
UFS host supplies the reference clock to UFS device and UFS device
specification allows host to provide one of the 4 frequencies (19.2 MHz, 26
MHz, 38.4 MHz, 52 MHz) for reference clock. Host should set the device
reference clock frequency setting in the device based on what frequency it
is supplying to UFS device.
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Signed-off-by: Can Guo <cang@codeaurora.org>
Signed-off-by: Sayali Lokhande <sayalil@codeaurora.org>
Reviewed-by: Evan Green <evgreen@chromium.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
commit 9e1e8a75708031937a0f92567c19760c92658410 upstream.
UFS host supplies the reference clock to UFS device and UFS device
specification allows host to provide one of the 4 frequencies (19.2 MHz, 26
MHz, 38.4 MHz, 52 MHz) for reference clock. Host should set the device
reference clock frequency setting in the device based on what frequency it
is supplying to UFS device.
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Signed-off-by: Can Guo <cang@codeaurora.org>
Signed-off-by: Sayali Lokhande <sayalil@codeaurora.org>
Reviewed-by: Evan Green <evgreen@chromium.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
scsi: ufs: Fix RX_TERMINATION_FORCE_ENABLE define value
commit ebcb8f8508c5edf428f52525cec74d28edea7bcb upstream.
Fix RX_TERMINATION_FORCE_ENABLE define value from 0x0089 to 0x00A9
according to MIPI Alliance MPHY specification.
Fixes: e785060ea3a1 ("ufs: definitions for phy interface")
Signed-off-by: Pedro Sousa <sousa@synopsys.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
commit ebcb8f8508c5edf428f52525cec74d28edea7bcb upstream.
Fix RX_TERMINATION_FORCE_ENABLE define value from 0x0089 to 0x00A9
according to MIPI Alliance MPHY specification.
Fixes: e785060ea3a1 ("ufs: definitions for phy interface")
Signed-off-by: Pedro Sousa <sousa@synopsys.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
scsi: ufs: Check that space was properly alloced in copy_query_response
commit 1c90836f70f9a8ef7b7ad9e1fdd8961903e6ced6 upstream.
struct ufs_dev_cmd is the main container that supports device management
commands. In the case of a read descriptor request, we assume that the
proper space was allocated in dev_cmd to hold the returning descriptor.
This is no longer true, as there are flows that doesn't use dev_cmd for
device management requests, and was wrong in the first place.
Fixes: d44a5f98bb49 (ufs: query descriptor API)
Signed-off-by: Avri Altman <avri.altman@wdc.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Acked-by: Bean Huo <beanhuo@micron.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
commit 1c90836f70f9a8ef7b7ad9e1fdd8961903e6ced6 upstream.
struct ufs_dev_cmd is the main container that supports device management
commands. In the case of a read descriptor request, we assume that the
proper space was allocated in dev_cmd to hold the returning descriptor.
This is no longer true, as there are flows that doesn't use dev_cmd for
device management requests, and was wrong in the first place.
Fixes: d44a5f98bb49 (ufs: query descriptor API)
Signed-off-by: Avri Altman <avri.altman@wdc.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Acked-by: Bean Huo <beanhuo@micron.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
scsi: ufs-bsg: complete ufs-bsg job only if no error
commit b13a3539eb2affcb8833c189d68d6a4b99c41f6e upstream.
In the case of UPIU/DME request execution failed in UFS device,
ufs_bsg_request() will complete the failed bsg job by calling
bsg_job_done(). Meanwhile, it returns this error status to blk-mq layer,
then triggers blk-mq completing this request again, this will cause the
following panic.
Call trace:
ll_sc___cmpxchg_case_acq_32+0x4/0x20
complete+0x28/0x70
blk_end_sync_rq+0x24/0x30
blk_mq_end_request+0xb8/0x118
bsg_job_put+0x4c/0x58
bsg_complete+0x20/0x30
blk_done_softirq+0xb4/0xe8
do_softirq+0x154/0x3f0
run_ksoftirqd+0x4c/0x68
smpboot_thread_fn+0x22c/0x268
kthread+0x130/0x138
ret_from_fork+0x10/0x1c
Code: f84107fe d65f03c0 d503201f f9800011 (885ffc10)
---[ end trace d92825bff6326e66 ]---
Kernel panic - not syncing: Fatal exception in interrupt
This patch is to fix this issue. The solution is to complete the ufs-bsg
job only if no error happened.
[mkp: commit description tweak]
Fixes: df032bf27a41 (scsi: ufs: Add a bsg endpoint that supports UPIUs)
Signed-off-by: Bean Huo <beanhuo@micron.com>
Reviewed-by: Avri Altman <Avri.Altman@wdc.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
commit b13a3539eb2affcb8833c189d68d6a4b99c41f6e upstream.
In the case of UPIU/DME request execution failed in UFS device,
ufs_bsg_request() will complete the failed bsg job by calling
bsg_job_done(). Meanwhile, it returns this error status to blk-mq layer,
then triggers blk-mq completing this request again, this will cause the
following panic.
Call trace:
ll_sc___cmpxchg_case_acq_32+0x4/0x20
complete+0x28/0x70
blk_end_sync_rq+0x24/0x30
blk_mq_end_request+0xb8/0x118
bsg_job_put+0x4c/0x58
bsg_complete+0x20/0x30
blk_done_softirq+0xb4/0xe8
do_softirq+0x154/0x3f0
run_ksoftirqd+0x4c/0x68
smpboot_thread_fn+0x22c/0x268
kthread+0x130/0x138
ret_from_fork+0x10/0x1c
Code: f84107fe d65f03c0 d503201f f9800011 (885ffc10)
---[ end trace d92825bff6326e66 ]---
Kernel panic - not syncing: Fatal exception in interrupt
This patch is to fix this issue. The solution is to complete the ufs-bsg
job only if no error happened.
[mkp: commit description tweak]
Fixes: df032bf27a41 (scsi: ufs: Add a bsg endpoint that supports UPIUs)
Signed-off-by: Bean Huo <beanhuo@micron.com>
Reviewed-by: Avri Altman <Avri.Altman@wdc.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
scsi: ufs-bsg: fix typo in ufs_bsg_request
commit c870d65fe3084193113ec622049b6906b899366c upstream.
Correct dev_dbg to dev_err, so as to print out the error information in
case of DME command failed.
Signed-off-by: Bean Huo <beanhuo@micron.com>
Reviewed-by: Avri Altman <Avri.Altman@wdc.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
commit c870d65fe3084193113ec622049b6906b899366c upstream.
Correct dev_dbg to dev_err, so as to print out the error information in
case of DME command failed.
Signed-off-by: Bean Huo <beanhuo@micron.com>
Reviewed-by: Avri Altman <Avri.Altman@wdc.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
scsi: ufs-bsg: Allow reading descriptors
commit 5c17f87abb1a86eb4d2a108477e56389622cf195 upstream.
Add this functionality, placing the descriptor being read in the actual
data buffer in the bio.
That is, for both read and write descriptors query upiu, we are using the
job's request_payload. This in turn, is mapped back in user land to the
applicable sg_io_v4 xferp: dout_xferp for write descriptor, and din_xferp
for read descriptor.
Signed-off-by: Avri Altman <avri.altman@wdc.com>
Reviewed-by: Evan Green <evgreen@chromium.org>
Reviewed-by: Bean Huo <beanhuo@micron.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
commit 5c17f87abb1a86eb4d2a108477e56389622cf195 upstream.
Add this functionality, placing the descriptor being read in the actual
data buffer in the bio.
That is, for both read and write descriptors query upiu, we are using the
job's request_payload. This in turn, is mapped back in user land to the
applicable sg_io_v4 xferp: dout_xferp for write descriptor, and din_xferp
for read descriptor.
Signed-off-by: Avri Altman <avri.altman@wdc.com>
Reviewed-by: Evan Green <evgreen@chromium.org>
Reviewed-by: Bean Huo <beanhuo@micron.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
scsi: ufs: Allow reading descriptor via raw upiu
commit 4bbbe2421634fe1d1b230006200ad9cdb0e17a9e upstream.
Allow to read descriptors via raw upiu. This in fact was forbidden just as
a precaution, as ufs-bsg actually enforces which functionality is
supported.
Signed-off-by: Avri Altman <avri.altman@wdc.com>
Reviewed-by: Evan Green <evgreen@chromium.org>
Reviewed-by: Bean Huo <beanhuo@micron.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
commit 4bbbe2421634fe1d1b230006200ad9cdb0e17a9e upstream.
Allow to read descriptors via raw upiu. This in fact was forbidden just as
a precaution, as ufs-bsg actually enforces which functionality is
supported.
Signed-off-by: Avri Altman <avri.altman@wdc.com>
Reviewed-by: Evan Green <evgreen@chromium.org>
Reviewed-by: Bean Huo <beanhuo@micron.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
scsi: ufs-bsg: Change the calling convention for write descriptor
commit 4eaa329e331343dd64996297583f2eee7d215e2a upstream.
When we had a write descriptor query upiu, we appended the descriptor right
after the bsg request. This was fine as the bsg driver allows to allocate
whatever buffer we needed in its job request.
Still, the proper way to deliver payload, however small (we only write
config descriptors of 144 bytes), is by using the job request payload data
buffer.
So change this ABI now, while ufs-bsg is still new, and nobody is actually
using it.
Signed-off-by: Avri Altman <avri.altman@wdc.com>
Reviewed-by: Evan Green <evgreen@chromium.org>
Reviewed-by: Bean Huo <beanhuo@micron.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
commit 4eaa329e331343dd64996297583f2eee7d215e2a upstream.
When we had a write descriptor query upiu, we appended the descriptor right
after the bsg request. This was fine as the bsg driver allows to allocate
whatever buffer we needed in its job request.
Still, the proper way to deliver payload, however small (we only write
config descriptors of 144 bytes), is by using the job request payload data
buffer.
So change this ABI now, while ufs-bsg is still new, and nobody is actually
using it.
Signed-off-by: Avri Altman <avri.altman@wdc.com>
Reviewed-by: Evan Green <evgreen@chromium.org>
Reviewed-by: Bean Huo <beanhuo@micron.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
bsg: provide bsg_remove_queue() helper
commit 5e28b8d8a1b03ce86f33d38a64a4983d2b5c7679 upstream.
All drivers do unregister + cleanup, provide a helper for that.
Cc: linux-scsi@vger.kernel.org
Reviewed-by: Hannes Reinecke <hare@suse.com>
Reviewed-by: Johannes Thumshirn <jthumshirn@suse.de>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Tested-by: Benjamin Block <bblock@linux.vnet.ibm.com>
Tested-by: Ming Lei <ming.lei@redhat.com>
Reviewed-by: Omar Sandoval <osandov@fb.com>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
commit 5e28b8d8a1b03ce86f33d38a64a4983d2b5c7679 upstream.
All drivers do unregister + cleanup, provide a helper for that.
Cc: linux-scsi@vger.kernel.org
Reviewed-by: Hannes Reinecke <hare@suse.com>
Reviewed-by: Johannes Thumshirn <jthumshirn@suse.de>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Tested-by: Benjamin Block <bblock@linux.vnet.ibm.com>
Tested-by: Ming Lei <ming.lei@redhat.com>
Reviewed-by: Omar Sandoval <osandov@fb.com>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
bsg: pass in desired timeout handler
commit aae3b069d5ce865ca5ef2902c2a22cef7ab4f3a2 upstream.
This will ease in the conversion to blk-mq, where we can't set
a timeout handler after queue init.
Cc: Johannes Thumshirn <jthumshirn@suse.de>
Cc: linux-scsi@vger.kernel.org
Reviewed-by: Hannes Reinecke <hare@suse.com>
Tested-by: Benjamin Block <bblock@linux.vnet.ibm.com>
Tested-by: Ming Lei <ming.lei@redhat.com>
Reviewed-by: Omar Sandoval <osandov@fb.com>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
commit aae3b069d5ce865ca5ef2902c2a22cef7ab4f3a2 upstream.
This will ease in the conversion to blk-mq, where we can't set
a timeout handler after queue init.
Cc: Johannes Thumshirn <jthumshirn@suse.de>
Cc: linux-scsi@vger.kernel.org
Reviewed-by: Hannes Reinecke <hare@suse.com>
Tested-by: Benjamin Block <bblock@linux.vnet.ibm.com>
Tested-by: Ming Lei <ming.lei@redhat.com>
Reviewed-by: Omar Sandoval <osandov@fb.com>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
scsi: ufs-bsg: Add support for uic commands in ufs_bsg_request()
commit e77044c5a8422e4e139f0a2ac5d49f4075779594 upstream.
Make ufshcd_send_uic_cmd() public for that.
Signed-off-by: Avri Altman <avri.altman@wdc.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Bart Van Assche <Bart.VanAssche@wdc.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
commit e77044c5a8422e4e139f0a2ac5d49f4075779594 upstream.
Make ufshcd_send_uic_cmd() public for that.
Signed-off-by: Avri Altman <avri.altman@wdc.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Bart Van Assche <Bart.VanAssche@wdc.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
scsi: ufs-bsg: Add support for raw upiu in ufs_bsg_request()
commit 95e34bf930eaee51dab23495342b148cd0ee2ba1 upstream.
Do that for the currently supported UPIUs: query, nop out, and task
management.
We do not support UPIU of type scsi command yet, while we are using the
job's request and reply pointers to hold the payload. We will look into
it in later patches. We might need to elaborate the raw upiu api for
that.
We also still not supporting uic commands: For first phase, we plan to
use the existing api, and send only uic commands that are already
supported. Anyway, all that will come in the next patch.
Signed-off-by: Avri Altman <avri.altman@wdc.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Bart Van Assche <Bart.VanAssche@wdc.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
commit 95e34bf930eaee51dab23495342b148cd0ee2ba1 upstream.
Do that for the currently supported UPIUs: query, nop out, and task
management.
We do not support UPIU of type scsi command yet, while we are using the
job's request and reply pointers to hold the payload. We will look into
it in later patches. We might need to elaborate the raw upiu api for
that.
We also still not supporting uic commands: For first phase, we plan to
use the existing api, and send only uic commands that are already
supported. Anyway, all that will come in the next patch.
Signed-off-by: Avri Altman <avri.altman@wdc.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Bart Van Assche <Bart.VanAssche@wdc.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
scsi: ufs: Add API to execute raw upiu commands
commit 5e0a86eed84607432436766e3e1bb37f8318f7b2 upstream.
The UFS host software uses a combination of a host register set and
Transfer Request Descriptors in system memory to communicate with host
controller hardware. In its mmio space, a separate places are assigned
to UTP Transfer Request Descriptor ("utrd") list, and to UTP Task
Management Request Descriptor ("utmrd") list.
The provided API supports utrd-typed requests: nop out and device
management commands. It also supports utmrd-type requests:
task management requests. Other UPIU types are not supported for now.
We utilize the already existing code for tag and task work queues.
That is, all utrd-typed UPIUs are "disguised" as device management
commands. Similarly, the utmrd-typed UPUIs uses the task management
infrastructure.
It is up to the caller to fill the upiu request properly, as it will be
copied without any further input validations.
Signed-off-by: Avri Altman <avri.altman@wdc.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Bart Van Assche <Bart.VanAssche@wdc.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
commit 5e0a86eed84607432436766e3e1bb37f8318f7b2 upstream.
The UFS host software uses a combination of a host register set and
Transfer Request Descriptors in system memory to communicate with host
controller hardware. In its mmio space, a separate places are assigned
to UTP Transfer Request Descriptor ("utrd") list, and to UTP Task
Management Request Descriptor ("utmrd") list.
The provided API supports utrd-typed requests: nop out and device
management commands. It also supports utmrd-type requests:
task management requests. Other UPIU types are not supported for now.
We utilize the already existing code for tag and task work queues.
That is, all utrd-typed UPIUs are "disguised" as device management
commands. Similarly, the utmrd-typed UPUIs uses the task management
infrastructure.
It is up to the caller to fill the upiu request properly, as it will be
copied without any further input validations.
Signed-off-by: Avri Altman <avri.altman@wdc.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Bart Van Assche <Bart.VanAssche@wdc.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
scsi: ufs: Use data structure size in pointer arithmetic
commit 220d17a69de432e520461531cb569f75a43ed6f5 upstream.
Use the structure size in pointer arithmetic instead of an opaque 32
bytes for the over-allocation of descriptors.
Signed-off-by: Avri Altman <avri.altman@wdc.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
commit 220d17a69de432e520461531cb569f75a43ed6f5 upstream.
Use the structure size in pointer arithmetic instead of an opaque 32
bytes for the over-allocation of descriptors.
Signed-off-by: Avri Altman <avri.altman@wdc.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
scsi: ufs: Add a bsg endpoint that supports UPIUs
commit df032bf27a414acf61c957ec2fad22a57d903b39 upstream.
For now, just provide an API to allocate and remove ufs-bsg node. We
will use this framework to manage ufs devices by sending UPIU
transactions.
For the time being, implements an empty bsg_request() - will add some
more functionality in coming patches.
Nonetheless, we reveal here the protocol we are planning to use: UFS
Transport Protocol Transactions. UFS transactions consist of packets
called UFS Protocol Information Units (UPIU).
There are UPIU’s defined for UFS SCSI commands, responses, data in and
data out, task management, utility functions, vendor functions,
transaction synchronization and control, and more.
By using UPIUs, we get access to the most fine-grained internals of this
protocol, and able to communicate with the device in ways, that are
sometimes beyond the capacity of the ufs driver.
Moreover and as a result, our core structure - ufs_bsg_node has a pretty
lean structure: using upiu transactions that contains the outmost
detailed info, so we don't really need complex constructs to support it.
Signed-off-by: Avri Altman <avri.altman@wdc.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Bart Van Assche <Bart.VanAssche@wdc.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
commit df032bf27a414acf61c957ec2fad22a57d903b39 upstream.
For now, just provide an API to allocate and remove ufs-bsg node. We
will use this framework to manage ufs devices by sending UPIU
transactions.
For the time being, implements an empty bsg_request() - will add some
more functionality in coming patches.
Nonetheless, we reveal here the protocol we are planning to use: UFS
Transport Protocol Transactions. UFS transactions consist of packets
called UFS Protocol Information Units (UPIU).
There are UPIU’s defined for UFS SCSI commands, responses, data in and
data out, task management, utility functions, vendor functions,
transaction synchronization and control, and more.
By using UPIUs, we get access to the most fine-grained internals of this
protocol, and able to communicate with the device in ways, that are
sometimes beyond the capacity of the ufs driver.
Moreover and as a result, our core structure - ufs_bsg_node has a pretty
lean structure: using upiu transactions that contains the outmost
detailed info, so we don't really need complex constructs to support it.
Signed-off-by: Avri Altman <avri.altman@wdc.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Bart Van Assche <Bart.VanAssche@wdc.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
scsi: uapi: ufs: Make utp_upiu_req visible to user space
commit a851b2bd363220feacbf36adb49616a49edc99fb upstream.
in preparation to send UPIU requests via bsg.
Signed-off-by: Avri Altman <avri.altman@wdc.com>
Reviewed-by: Bart Van Assche <Bart.VanAssche@wdc.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
commit a851b2bd363220feacbf36adb49616a49edc99fb upstream.
in preparation to send UPIU requests via bsg.
Signed-off-by: Avri Altman <avri.altman@wdc.com>
Reviewed-by: Bart Van Assche <Bart.VanAssche@wdc.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
scsi: ufs: add a low-level __ufshcd_issue_tm_cmd helper
commit c6049cd98212dfe39f67fb411d18d53df0ad9436 upstream.
Add a helper that takes a utp_task_req_desc and issues it, which will
be useful for UFS bsg support. Rewrite ufshcd_issue_tm_cmd0x to use
this new helper.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Avri Altman <avri.altman@wdc.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
commit c6049cd98212dfe39f67fb411d18d53df0ad9436 upstream.
Add a helper that takes a utp_task_req_desc and issues it, which will
be useful for UFS bsg support. Rewrite ufshcd_issue_tm_cmd0x to use
this new helper.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Avri Altman <avri.altman@wdc.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
scsi: ufs: cleanup struct utp_task_req_desc
commit 391e388f853dad5d1d7462a31bb50ff2446e37f0 upstream.
Remove the pointless task_req_upiu and task_rsp_upiu indirections,
which are __le32 arrays always cast to given structures and just add
the members directly. Also clean up variables names in use in the
callers a bit to make the code more readable.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Avri Altman <avri.altman@wdc.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
commit 391e388f853dad5d1d7462a31bb50ff2446e37f0 upstream.
Remove the pointless task_req_upiu and task_rsp_upiu indirections,
which are __le32 arrays always cast to given structures and just add
the members directly. Also clean up variables names in use in the
callers a bit to make the code more readable.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Avri Altman <avri.altman@wdc.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
arm64: dts: ti: k3-j721e-main.dtsi: Add dma-coherent to smmu0
When emulating stage 1 translations in Jailhouse, sometimes an update to
the command queue is not visible to the hypervisor, causing the command
previously in the slot to be issued. Adding dma-coherent fixes that.
Signed-off-by: Pratyush Yadav <p-yadav1@ti.com>
When emulating stage 1 translations in Jailhouse, sometimes an update to
the command queue is not visible to the hypervisor, causing the command
previously in the slot to be issued. Adding dma-coherent fixes that.
Signed-off-by: Pratyush Yadav <p-yadav1@ti.com>
arm64: dts: k3-j721: Enable the SMMU for guest cells
With stage 1 emulation support, we can enable the SMMU for guest cells.
Signed-off-by: Pratyush Yadav <p-yadav1@ti.com>
With stage 1 emulation support, we can enable the SMMU for guest cells.
Signed-off-by: Pratyush Yadav <p-yadav1@ti.com>
ti_config_fragments/connectivity.cfg: enable DaVinci NAND explicitly
DaVinci NAND support is disabled on Keystone2 platforms which
need it.
This happened because multi_v7_defconfig does not enable
CONFIG_MEMORY anymore because its selected by
CONFIG_ARCH_OMAP2PLUS (which is enabled). But we disable
CONFIG_ARCH_OMAP2PLUS when building for keystone2.
fix this by enabling the dependencies needed for NAND
support on keystone2 explicitly.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
DaVinci NAND support is disabled on Keystone2 platforms which
need it.
This happened because multi_v7_defconfig does not enable
CONFIG_MEMORY anymore because its selected by
CONFIG_ARCH_OMAP2PLUS (which is enabled). But we disable
CONFIG_ARCH_OMAP2PLUS when building for keystone2.
fix this by enabling the dependencies needed for NAND
support on keystone2 explicitly.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Merge branch 'connectivity-ti-linux-4.19.y' of git://git.ti.com/connectivity-integration-tree/connectivity-ti-linux-kernel into ti-linux-4.19.y
TI-Feature: connectivity
TI-Tree: git://git.ti.com/connectivity-integration-tree/connectivity-ti-linux-kernel.git
TI-Branch: connectivity-ti-linux-4.19.y
* 'connectivity-ti-linux-4.19.y' of git://git.ti.com/connectivity-integration-tree/connectivity-ti-linux-kernel:
pwm: tiehrpwm: Update shadow register for disabling PWMs
arm64: dts: k3-am654-base-board: change cpsw2g interface mode to rgmii-rxid
net: ethernet: ti: cpsw-phy-sel: am654: fix mac tx internal delay for rgmii-rxid
HACK: net: phy: dp83867: fix internal RX and TX delays configuration
Revert "scsi: reduce use of block bounce buffers"
ata: ahci_platform: add 32-bit quirk for dwc-ahci
net: prueth: Set proper MII TX_DELAY for 10M link
Signed-off-by: LCPD Auto Merger <lcpd_integration@list.ti.com>
TI-Feature: connectivity
TI-Tree: git://git.ti.com/connectivity-integration-tree/connectivity-ti-linux-kernel.git
TI-Branch: connectivity-ti-linux-4.19.y
* 'connectivity-ti-linux-4.19.y' of git://git.ti.com/connectivity-integration-tree/connectivity-ti-linux-kernel:
pwm: tiehrpwm: Update shadow register for disabling PWMs
arm64: dts: k3-am654-base-board: change cpsw2g interface mode to rgmii-rxid
net: ethernet: ti: cpsw-phy-sel: am654: fix mac tx internal delay for rgmii-rxid
HACK: net: phy: dp83867: fix internal RX and TX delays configuration
Revert "scsi: reduce use of block bounce buffers"
ata: ahci_platform: add 32-bit quirk for dwc-ahci
net: prueth: Set proper MII TX_DELAY for 10M link
Signed-off-by: LCPD Auto Merger <lcpd_integration@list.ti.com>
arm64: dts: ti: am654-pcie-usb3: Enable USB0 as High-speed Host
Enable USB0 in high-speed host mode. As USB0 doesn't work
if SERDES0 MUX is set to USB and SERDES0 is not
initialized, we workaround that by switching
SERDES0 MUX to ICSS2 SGMII.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Enable USB0 in high-speed host mode. As USB0 doesn't work
if SERDES0 MUX is set to USB and SERDES0 is not
initialized, we workaround that by switching
SERDES0 MUX to ICSS2 SGMII.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
pwm: tiehrpwm: Update shadow register for disabling PWMs
commit b00ef53053191d3025c15e8041699f8c9d132daf upstream.
It must be made sure that immediate mode is not already set, when
modifying shadow register value in ehrpwm_pwm_disable(). Otherwise
modifications to the action-qualifier continuous S/W force
register(AQSFRC) will be done in the active register.
This may happen when both channels are being disabled. In this case,
only the first channel state will be recorded as disabled in the shadow
register. Later, when enabling the first channel again, the second
channel would be enabled as well. Setting RLDCSF to zero, first, ensures
that the shadow register is updated as desired.
Fixes: 38dabd91ff0b ("pwm: tiehrpwm: Fix disabling of output of PWMs")
Signed-off-by: Christoph Vogtländer <c.vogtlaender@sigma-surface-science.com>
[vigneshr@ti.com: Improve commit message]
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
commit b00ef53053191d3025c15e8041699f8c9d132daf upstream.
It must be made sure that immediate mode is not already set, when
modifying shadow register value in ehrpwm_pwm_disable(). Otherwise
modifications to the action-qualifier continuous S/W force
register(AQSFRC) will be done in the active register.
This may happen when both channels are being disabled. In this case,
only the first channel state will be recorded as disabled in the shadow
register. Later, when enabling the first channel again, the second
channel would be enabled as well. Setting RLDCSF to zero, first, ensures
that the shadow register is updated as desired.
Fixes: 38dabd91ff0b ("pwm: tiehrpwm: Fix disabling of output of PWMs")
Signed-off-by: Christoph Vogtländer <c.vogtlaender@sigma-surface-science.com>
[vigneshr@ti.com: Improve commit message]
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
arm64: dts: k3-am654-base-board: change cpsw2g interface mode to rgmii-rxid
The AM654 SoC doesn't allow to disabling RGMII TX internal delay in CPSW2G
MAC. Hence, change CPSW2G interface mode to "rgmii-rxid" - RGMII with
internal RX delay provided by the PHY, the MAC will add an TX delay in this
case.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The AM654 SoC doesn't allow to disabling RGMII TX internal delay in CPSW2G
MAC. Hence, change CPSW2G interface mode to "rgmii-rxid" - RGMII with
internal RX delay provided by the PHY, the MAC will add an TX delay in this
case.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
net: ethernet: ti: cpsw-phy-sel: am654: fix mac tx internal delay for rgmii-rxid
Now cpsw-phy-sel will disable MAC TX internal delay for PHY interface mode
"rgmii-rxid" which is incorrect. Hence, fix it by keeping default value
(enabled) for MAC TX internal delay.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Now cpsw-phy-sel will disable MAC TX internal delay for PHY interface mode
"rgmii-rxid" which is incorrect. Hence, fix it by keeping default value
(enabled) for MAC TX internal delay.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
HACK: net: phy: dp83867: fix internal RX and TX delays configuration
The DP83867 PHY RX and TX internal delays configuration after POR or PHY
configuration applied by bootloader might be different from what Linux is
requesting ("rgmii-id" -> "rgmii-rxid").
Hence, clean up TX_CLK_DELAY_EN/RX_CLK_DELAY_EN enable bits in
DP83867_RGMIICTL(0x0032) register before applying new configuration.
Also, fix TX delay configuration.
HACK:
This is fixed upstream, but can't be backported.
commit c11669a2757e ("net: phy: dp83867: Rework delay rgmii delay...")
commit 2b892649254f ("net: phy: dp83867: Set up RGMII TX delay")
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The DP83867 PHY RX and TX internal delays configuration after POR or PHY
configuration applied by bootloader might be different from what Linux is
requesting ("rgmii-id" -> "rgmii-rxid").
Hence, clean up TX_CLK_DELAY_EN/RX_CLK_DELAY_EN enable bits in
DP83867_RGMIICTL(0x0032) register before applying new configuration.
Also, fix TX delay configuration.
HACK:
This is fixed upstream, but can't be backported.
commit c11669a2757e ("net: phy: dp83867: Rework delay rgmii delay...")
commit 2b892649254f ("net: phy: dp83867: Set up RGMII TX delay")
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Revert "scsi: reduce use of block bounce buffers"
This reverts commit 21e07dba9fb1179148089d611fc9e6e70d1887c3.
Slightly modified to use dma_dev instead of host_dev
as host_dev doesn't have the right dma_mask of the controller.
Without this change, the SATA controller gets DMA
addresses > 32-bit when LPAE is enabled and Sytem has
RAM at addresses > 32-bit, even though it has dma_mask set
correctly to 32-bits.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
This reverts commit 21e07dba9fb1179148089d611fc9e6e70d1887c3.
Slightly modified to use dma_dev instead of host_dev
as host_dev doesn't have the right dma_mask of the controller.
Without this change, the SATA controller gets DMA
addresses > 32-bit when LPAE is enabled and Sytem has
RAM at addresses > 32-bit, even though it has dma_mask set
correctly to 32-bits.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
ata: ahci_platform: add 32-bit quirk for dwc-ahci
On TI Platforms using LPAE, SATA breaks with 64-bit DMA.
Restrict it to 32-bit.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
On TI Platforms using LPAE, SATA breaks with 64-bit DMA.
Restrict it to 32-bit.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
net: prueth: Set proper MII TX_DELAY for 10M link
A different TX_DELAY is required for 10M link.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
A different TX_DELAY is required for 10M link.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Merge branch 'platform-ti-linux-4.19.y' of git://git.ti.com/~rrnayak/ti-linux-kernel/platform-linux-feature-tree into ti-linux-4.19.y
TI-Feature: platform_base
TI-Tree: git://git.ti.com/~rrnayak/ti-linux-kernel/platform-linux-feature-tree.git
TI-Branch: platform-ti-linux-4.19.y
* 'platform-ti-linux-4.19.y' of git://git.ti.com/~rrnayak/ti-linux-kernel/platform-linux-feature-tree:
arm64: dts: k3-j721: Fix device partitioning in VMs
Signed-off-by: LCPD Auto Merger <lcpd_integration@list.ti.com>
TI-Feature: platform_base
TI-Tree: git://git.ti.com/~rrnayak/ti-linux-kernel/platform-linux-feature-tree.git
TI-Branch: platform-ti-linux-4.19.y
* 'platform-ti-linux-4.19.y' of git://git.ti.com/~rrnayak/ti-linux-kernel/platform-linux-feature-tree:
arm64: dts: k3-j721: Fix device partitioning in VMs
Signed-off-by: LCPD Auto Merger <lcpd_integration@list.ti.com>
arm64: dts: k3-j721: Fix device partitioning in VMs
Video decoder, display port and corresponding serdes
are assigned to other virtual machines.
Disable these from the root cell kernel.
Also fix the dss device tree node children names as expected in
the driver.
Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
Video decoder, display port and corresponding serdes
are assigned to other virtual machines.
Disable these from the root cell kernel.
Also fix the dss device tree node children names as expected in
the driver.
Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
Merge branch 'audio_display-ti-linux-4.19.y' of git.ti.com:~jyrisarha/ti-linux-kernel/jyrisarhas-audio-video-linux-feature-tree into ti-linux-4.19.y
TI-Feature: audio-display
TI-Tree: git@git.ti.com:~jyrisarha/ti-linux-kernel/jyrisarhas-audio-video-linux-feature-tree.git
TI-Branch: audio_display-ti-linux-4.19.y
* 'audio_display-ti-linux-4.19.y' of git.ti.com:~jyrisarha/ti-linux-kernel/jyrisarhas-audio-video-linux-feature-tree:
drm/bridge: cdns-mhdp: Sum of VOD and PRE should not be greater than 3
drm/bridge: cdns-mhdp: No DPCD messaging if cable is not connected.
Signed-off-by: LCPD Auto Merger <lcpd_integration@list.ti.com>
TI-Feature: audio-display
TI-Tree: git@git.ti.com:~jyrisarha/ti-linux-kernel/jyrisarhas-audio-video-linux-feature-tree.git
TI-Branch: audio_display-ti-linux-4.19.y
* 'audio_display-ti-linux-4.19.y' of git.ti.com:~jyrisarha/ti-linux-kernel/jyrisarhas-audio-video-linux-feature-tree:
drm/bridge: cdns-mhdp: Sum of VOD and PRE should not be greater than 3
drm/bridge: cdns-mhdp: No DPCD messaging if cable is not connected.
Signed-off-by: LCPD Auto Merger <lcpd_integration@list.ti.com>
drm/bridge: cdns-mhdp: Sum of VOD and PRE should not be greater than 3
Not all combinations of Voltage Swing and Pre Emphasis are
valid. Their sum should not exceeds 3. We need to compromise if video
sink asks for those combinations.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Not all combinations of Voltage Swing and Pre Emphasis are
valid. Their sum should not exceeds 3. We need to compromise if video
sink asks for those combinations.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
drm/bridge: cdns-mhdp: No DPCD messaging if cable is not connected.
We should not try to power off the video sink if the cable is not connected.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Reviewed-by: Benoit Parrot <bparrot@ti.com>
We should not try to power off the video sink if the cable is not connected.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Reviewed-by: Benoit Parrot <bparrot@ti.com>
Merge branch 'platform-ti-linux-4.19.y' of git://git.ti.com/~rrnayak/ti-linux-kernel/platform-linux-feature-tree into ti-linux-4.19.y
TI-Feature: platform_base
TI-Tree: git://git.ti.com/~rrnayak/ti-linux-kernel/platform-linux-feature-tree.git
TI-Branch: platform-ti-linux-4.19.y
* 'platform-ti-linux-4.19.y' of git://git.ti.com/~rrnayak/ti-linux-kernel/platform-linux-feature-tree:
arm64: dts: k3-j721: Add jailhouse DT overlay
Signed-off-by: LCPD Auto Merger <lcpd_integration@list.ti.com>
TI-Feature: platform_base
TI-Tree: git://git.ti.com/~rrnayak/ti-linux-kernel/platform-linux-feature-tree.git
TI-Branch: platform-ti-linux-4.19.y
* 'platform-ti-linux-4.19.y' of git://git.ti.com/~rrnayak/ti-linux-kernel/platform-linux-feature-tree:
arm64: dts: k3-j721: Add jailhouse DT overlay
Signed-off-by: LCPD Auto Merger <lcpd_integration@list.ti.com>
arm64: dts: k3-j721: Add jailhouse DT overlay
Add a new DT overlay for k3-j721e-common-proc-board.dtb
to be applied with virtualization use cases.
* Reserve 6MB RAM for hypervisor, IVSHMEM and baremetal apps
* Reserve 153MB RAM for inmate Linux
* Partition the devices across VMs - Disable in root cell DTB,
all the devices owned by the inmate cell.
e.g. uart1, emmc, etc
* Add display sharing related properties in the dss node
for usage with vitual machine.
Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
Add a new DT overlay for k3-j721e-common-proc-board.dtb
to be applied with virtualization use cases.
* Reserve 6MB RAM for hypervisor, IVSHMEM and baremetal apps
* Reserve 153MB RAM for inmate Linux
* Partition the devices across VMs - Disable in root cell DTB,
all the devices owned by the inmate cell.
e.g. uart1, emmc, etc
* Add display sharing related properties in the dss node
for usage with vitual machine.
Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
Merge branch 'rpmsg-ti-linux-4.19.y-intg' of git://git.ti.com/rpmsg/rpmsg into ti-linux-4.19.y
TI-Feature: rpmsg
TI-Tree: git://git.ti.com/rpmsg/rpmsg.git
TI-Branch: rpmsg-ti-linux-4.19.y-intg
* 'rpmsg-ti-linux-4.19.y-intg' of git://git.ti.com/rpmsg/rpmsg:
irqchip/irq-pruss-intc: Fix incorrect macro replacement
irqchip/irq-pruss-intc: Fix erroneous channel/host mapping logic
irqchip/irq-pruss-intc: Use macros for operations on CMR and HMR
irqchip/irq-pruss-intc: Use macros for operations on CMR and HMR
TEMP: irqchip/irq-pruss-intc: Allow setting irq affinity for PRU events
irqchip/irq-pruss-intc: Reset chained handlers during cleanup
Signed-off-by: LCPD Auto Merger <lcpd_integration@list.ti.com>
TI-Feature: rpmsg
TI-Tree: git://git.ti.com/rpmsg/rpmsg.git
TI-Branch: rpmsg-ti-linux-4.19.y-intg
* 'rpmsg-ti-linux-4.19.y-intg' of git://git.ti.com/rpmsg/rpmsg:
irqchip/irq-pruss-intc: Fix incorrect macro replacement
irqchip/irq-pruss-intc: Fix erroneous channel/host mapping logic
irqchip/irq-pruss-intc: Use macros for operations on CMR and HMR
irqchip/irq-pruss-intc: Use macros for operations on CMR and HMR
TEMP: irqchip/irq-pruss-intc: Allow setting irq affinity for PRU events
irqchip/irq-pruss-intc: Reset chained handlers during cleanup
Signed-off-by: LCPD Auto Merger <lcpd_integration@list.ti.com>
Merge branch 'rpmsg-ti-linux-4.19.y' of git://git.ti.com/rpmsg/rpmsg into rpmsg-ti-linux-4.19.y-intg
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Merge branch 'topic/4.19/am65x' of git://git.ti.com/rpmsg/remoteproc into rpmsg-ti-linux-4.19.y
Pull in the dedicated AM65x remoteproc topic branch that fixes up an
incorrect macro usage in the pruss_intc_irq_set_affinity() function
introduced by code added in the most recent merge that pulled in a
bug fix for the INTC mapping configuration logic.
* 'topic/4.19/am65x' of git://git.ti.com/rpmsg/remoteproc:
irqchip/irq-pruss-intc: Fix incorrect macro replacement
Signed-off-by: Suman Anna <s-anna@ti.com>
Pull in the dedicated AM65x remoteproc topic branch that fixes up an
incorrect macro usage in the pruss_intc_irq_set_affinity() function
introduced by code added in the most recent merge that pulled in a
bug fix for the INTC mapping configuration logic.
* 'topic/4.19/am65x' of git://git.ti.com/rpmsg/remoteproc:
irqchip/irq-pruss-intc: Fix incorrect macro replacement
Signed-off-by: Suman Anna <s-anna@ti.com>
Merge branch 'topic/4.19/pruss' of git://git.ti.com/rpmsg/remoteproc into topic/4.19/am65x
Merge in the PRUSS topic branch into the AM65x remoteproc topic branch that
fixes an incorrect macro replacement in the pruss_intc_irq_set_affinity()
function.
* 'topic/4.19/pruss' of git://git.ti.com/rpmsg/remoteproc:
irqchip/irq-pruss-intc: Fix incorrect macro replacement
Signed-off-by: Suman Anna <s-anna@ti.com>
Merge in the PRUSS topic branch into the AM65x remoteproc topic branch that
fixes an incorrect macro replacement in the pruss_intc_irq_set_affinity()
function.
* 'topic/4.19/pruss' of git://git.ti.com/rpmsg/remoteproc:
irqchip/irq-pruss-intc: Fix incorrect macro replacement
Signed-off-by: Suman Anna <s-anna@ti.com>
irqchip/irq-pruss-intc: Fix incorrect macro replacement
The commit 57c76b3f2804 ("irqchip/irq-pruss-intc: Use macros
for operations on CMR and HMR") mistakenly replaced the number
of channels per Host Interrupt Map Register (4) with the wrong
macro HMR_CH_MAP_BITS which is the number of shift-bits to be
used per channel. Use the correct macro to fix this typo.
Fixes: 57c76b3f2804 ("irqchip/irq-pruss-intc: Use macros for operations on CMR and HMR")
Signed-off-by: Suman Anna <s-anna@ti.com>
The commit 57c76b3f2804 ("irqchip/irq-pruss-intc: Use macros
for operations on CMR and HMR") mistakenly replaced the number
of channels per Host Interrupt Map Register (4) with the wrong
macro HMR_CH_MAP_BITS which is the number of shift-bits to be
used per channel. Use the correct macro to fix this typo.
Fixes: 57c76b3f2804 ("irqchip/irq-pruss-intc: Use macros for operations on CMR and HMR")
Signed-off-by: Suman Anna <s-anna@ti.com>
Merge branch 'topic/4.19/am65x' of git://git.ti.com/rpmsg/remoteproc into rpmsg-ti-linux-4.19.y
Pull in the dedicated AM65x remoteproc topic branch that cleans up
the PRUSS INTC configuration code to use human-readable macros, and
a fix for an INTC mapping configuration logic bug exposed when running
different applications using different system event-to-channel and/or
channel-to-host interrupt mappings back to back.
* 'topic/4.19/am65x' of git://git.ti.com/rpmsg/remoteproc:
irqchip/irq-pruss-intc: Fix erroneous channel/host mapping logic
irqchip/irq-pruss-intc: Use macros for operations on CMR and HMR
irqchip/irq-pruss-intc: Use macros for operations on CMR and HMR
TEMP: irqchip/irq-pruss-intc: Allow setting irq affinity for PRU events
irqchip/irq-pruss-intc: Reset chained handlers during cleanup
Signed-off-by: Suman Anna <s-anna@ti.com>
Pull in the dedicated AM65x remoteproc topic branch that cleans up
the PRUSS INTC configuration code to use human-readable macros, and
a fix for an INTC mapping configuration logic bug exposed when running
different applications using different system event-to-channel and/or
channel-to-host interrupt mappings back to back.
* 'topic/4.19/am65x' of git://git.ti.com/rpmsg/remoteproc:
irqchip/irq-pruss-intc: Fix erroneous channel/host mapping logic
irqchip/irq-pruss-intc: Use macros for operations on CMR and HMR
irqchip/irq-pruss-intc: Use macros for operations on CMR and HMR
TEMP: irqchip/irq-pruss-intc: Allow setting irq affinity for PRU events
irqchip/irq-pruss-intc: Reset chained handlers during cleanup
Signed-off-by: Suman Anna <s-anna@ti.com>
Merge branch 'topic/4.19/pruss' of git://git.ti.com/rpmsg/remoteproc into topic/4.19/am65x
Merge in the PRUSS topic branch into the AM65x remoteproc topic branch
that pulls in a fix for properly clearing and configuring the PRUSS INTC
event-to-channel and channel-to-host interrupt mapping.
* 'topic/4.19/pruss' of git://git.ti.com/rpmsg/remoteproc:
irqchip/irq-pruss-intc: Fix erroneous channel/host mapping logic
irqchip/irq-pruss-intc: Use macros for operations on CMR and HMR
Signed-off-by: Suman Anna <s-anna@ti.com>
Merge in the PRUSS topic branch into the AM65x remoteproc topic branch
that pulls in a fix for properly clearing and configuring the PRUSS INTC
event-to-channel and channel-to-host interrupt mapping.
* 'topic/4.19/pruss' of git://git.ti.com/rpmsg/remoteproc:
irqchip/irq-pruss-intc: Fix erroneous channel/host mapping logic
irqchip/irq-pruss-intc: Use macros for operations on CMR and HMR
Signed-off-by: Suman Anna <s-anna@ti.com>
irqchip/irq-pruss-intc: Fix erroneous channel/host mapping logic
The PRUSS INTC uses two-levels of many-to-one mappings to route various
PRU System Events to a limited number of output interrupt lines connected
to various processors on the SoC. This event mapping configuration logic
is optimized to program the associated Channel Map Registers (CMRx) and
Host Interrupt Map Registers (HMRx) only when a new program is being
loaded/started and simply disables the same events and interrupt channels
without zeroing out the corresponding map registers when stopping a PRU.
The map logic currently does not zero out the previous field value before
programming the new value, and thereby potentially mapping a completely
different value in the CMR and HMR registers (if previous values are not
zero) and resulting in non-functional interrupts. Fix this erroneous
bitwise logic.
Reported-by: Nick Saulnier <nsaulnier@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Acked-by: Roger Quadros <rogerq@ti.com>
The PRUSS INTC uses two-levels of many-to-one mappings to route various
PRU System Events to a limited number of output interrupt lines connected
to various processors on the SoC. This event mapping configuration logic
is optimized to program the associated Channel Map Registers (CMRx) and
Host Interrupt Map Registers (HMRx) only when a new program is being
loaded/started and simply disables the same events and interrupt channels
without zeroing out the corresponding map registers when stopping a PRU.
The map logic currently does not zero out the previous field value before
programming the new value, and thereby potentially mapping a completely
different value in the CMR and HMR registers (if previous values are not
zero) and resulting in non-functional interrupts. Fix this erroneous
bitwise logic.
Reported-by: Nick Saulnier <nsaulnier@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Acked-by: Roger Quadros <rogerq@ti.com>
irqchip/irq-pruss-intc: Use macros for operations on CMR and HMR
The PRUSS INTC configuration code is currently using hard-coded numbers
directly for performing arithmatic operations on the Channel Map Registers
(CMRs) and Host Interrupt Map Registers (HMRs). Introduce and replace
these numbers with human readable macros.
While at this, use the modulo operator instead of bitwise-and for
the bit offset computation for the events and channels in CMR and
HMR registers.
Signed-off-by: Suman Anna <s-anna@ti.com>
The PRUSS INTC configuration code is currently using hard-coded numbers
directly for performing arithmatic operations on the Channel Map Registers
(CMRs) and Host Interrupt Map Registers (HMRs). Introduce and replace
these numbers with human readable macros.
While at this, use the modulo operator instead of bitwise-and for
the bit offset computation for the events and channels in CMR and
HMR registers.
Signed-off-by: Suman Anna <s-anna@ti.com>
irqchip/irq-pruss-intc: Use macros for operations on CMR and HMR
The PRUSS INTC configuration code is currently using hard-coded numbers
directly for performing arithmatic operations on the Channel Map Registers
(CMRs) and Host Interrupt Map Registers (HMRs). Introduce and replace
these numbers with human readable macros.
While at this, use the modulo operator instead of bitwise-and for
the bit offset computation for the events and channels in CMR and
HMR registers.
Signed-off-by: Suman Anna <s-anna@ti.com>
Acked-by: Roger Quadros <rogerq@ti.com>
The PRUSS INTC configuration code is currently using hard-coded numbers
directly for performing arithmatic operations on the Channel Map Registers
(CMRs) and Host Interrupt Map Registers (HMRs). Introduce and replace
these numbers with human readable macros.
While at this, use the modulo operator instead of bitwise-and for
the bit offset computation for the events and channels in CMR and
HMR registers.
Signed-off-by: Suman Anna <s-anna@ti.com>
Acked-by: Roger Quadros <rogerq@ti.com>
Merge branch 'topic/4.19/pruss' of git://git.ti.com/rpmsg/remoteproc into topic/4.19/am65x
Merge in the PRUSS topic branch into the AM65x remoteproc topic branch
that pulls in the support for setting affinity for the PRU System Events
and a fix for deactivating the PRUSS INTC interrupts when the module is
removed.
* 'topic/4.19/pruss' of git://git.ti.com/rpmsg/remoteproc:
TEMP: irqchip/irq-pruss-intc: Allow setting irq affinity for PRU events
irqchip/irq-pruss-intc: Reset chained handlers during cleanup
Signed-off-by: Suman Anna <s-anna@ti.com>
Merge in the PRUSS topic branch into the AM65x remoteproc topic branch
that pulls in the support for setting affinity for the PRU System Events
and a fix for deactivating the PRUSS INTC interrupts when the module is
removed.
* 'topic/4.19/pruss' of git://git.ti.com/rpmsg/remoteproc:
TEMP: irqchip/irq-pruss-intc: Allow setting irq affinity for PRU events
irqchip/irq-pruss-intc: Reset chained handlers during cleanup
Signed-off-by: Suman Anna <s-anna@ti.com>
TEMP: irqchip/irq-pruss-intc: Allow setting irq affinity for PRU events
The PRUSS INTC irqchip implementation provides a standard IRQ API
for consumers to directly use the PRU System Events as interrupts
and uses chained interrupts for connecting these to the main ARM
GIC interrupt controller. Add support to the irqchip driver to set
irq affinity for these consumer PRU interrupts.
These consumer PRU interrupts are not directly connected to the ARM
GIC, so it is not possible to directly set the affinity for these
interrupts. The affinity is instead set on the real system irq or
the actual chained interrupt that the PRU event is mapped to. The
system irq is looked up using the programmed channel map and host
map registers, and is validated against the configured channel and
hosts as the channel map and host map registers are not reset in
pruss_intc_unconfigure().
NOTE:
1. The affinity for a PRU event can only be set after its channel
map and host map are configured.
2. The PRUSS INTC design allows multiple events on a single system
irq, so the actual affinity on the corresponding chained interrupt
will be set to the last programmed affinity on any of the connected
PRU events. The IRQ affinity data for other events is not updated.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
[s-anna@ti.com: add error checks, update affinity logic & patch description]
Signed-off-by: Suman Anna <s-anna@ti.com>
The PRUSS INTC irqchip implementation provides a standard IRQ API
for consumers to directly use the PRU System Events as interrupts
and uses chained interrupts for connecting these to the main ARM
GIC interrupt controller. Add support to the irqchip driver to set
irq affinity for these consumer PRU interrupts.
These consumer PRU interrupts are not directly connected to the ARM
GIC, so it is not possible to directly set the affinity for these
interrupts. The affinity is instead set on the real system irq or
the actual chained interrupt that the PRU event is mapped to. The
system irq is looked up using the programmed channel map and host
map registers, and is validated against the configured channel and
hosts as the channel map and host map registers are not reset in
pruss_intc_unconfigure().
NOTE:
1. The affinity for a PRU event can only be set after its channel
map and host map are configured.
2. The PRUSS INTC design allows multiple events on a single system
irq, so the actual affinity on the corresponding chained interrupt
will be set to the last programmed affinity on any of the connected
PRU events. The IRQ affinity data for other events is not updated.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
[s-anna@ti.com: add error checks, update affinity logic & patch description]
Signed-off-by: Suman Anna <s-anna@ti.com>
irqchip/irq-pruss-intc: Reset chained handlers during cleanup
The PRUSS INTC irqchip implementation provides a standard IRQ API
for consumers to directly use the PRU System Events as interrupts
and uses chained interrupts for connecting these to the main ARM
GIC interrupt controllers. These chained irq handlers are not removed
at present during any failures in probe, or uninstalled in remove.
Reset these chained handlers so that the interrupts at the GIC
level are deactivated properly when the INTC devices are unbound
from the driver.
Signed-off-by: Suman Anna <s-anna@ti.com>
The PRUSS INTC irqchip implementation provides a standard IRQ API
for consumers to directly use the PRU System Events as interrupts
and uses chained interrupts for connecting these to the main ARM
GIC interrupt controllers. These chained irq handlers are not removed
at present during any failures in probe, or uninstalled in remove.
Reset these chained handlers so that the interrupts at the GIC
level are deactivated properly when the INTC devices are unbound
from the driver.
Signed-off-by: Suman Anna <s-anna@ti.com>
Merge branch 'audio_display-ti-linux-4.19.y' of git.ti.com:~jyrisarha/ti-linux-kernel/jyrisarhas-audio-video-linux-feature-tree into ti-linux-4.19.y
TI-Feature: audio-display
TI-Tree: git@git.ti.com:~jyrisarha/ti-linux-kernel/jyrisarhas-audio-video-linux-feature-tree.git
TI-Branch: audio_display-ti-linux-4.19.y
* 'audio_display-ti-linux-4.19.y' of git.ti.com:~jyrisarha/ti-linux-kernel/jyrisarhas-audio-video-linux-feature-tree:
HACK: phy: ti: j721e-wiz: override WIZ settings for DP
ti_config_fragments: add J7 DP to audio_display.cfg
HACK: arm64: dts: add k3-j721e-dp0.dtso
HACK: drm/mhdp: add j721e wrapper
HACK: drm/mhdp: Huge DP fix patch
drm: bridge: add support for Cadence MHDP DPI/DP bridge
dt-bindings: drm/bridge: Document Cadence MHDP bridge bindings
drm/dp: fix link probing for devices supporting DP 1.4+
drm/rockchip: prepare common code for cdns and rk dpi/dp driver
HACK: phy: phy-cadence-dp: Huge PHY fix
phy: add DisplayPort configuration options
phy: Add MIPI D-PHY configuration options
phy: Add configuration interface
phy: Add MIPI D-PHY mode
phy: core: clean up unused ethernet specific phy modes
phy: core: add PHY_MODE_ETHERNET
phy: core: rework phy_set_mode to accept phy mode and submode
phy: add QSGMII and PCIE modes
phy: mvebu-cp110-comphy: convert to use eth phy mode and submode
drm/dp: add extended receiver capability field present bit
Signed-off-by: Dan Murphy <dmurphy@ti.com>
TI-Feature: audio-display
TI-Tree: git@git.ti.com:~jyrisarha/ti-linux-kernel/jyrisarhas-audio-video-linux-feature-tree.git
TI-Branch: audio_display-ti-linux-4.19.y
* 'audio_display-ti-linux-4.19.y' of git.ti.com:~jyrisarha/ti-linux-kernel/jyrisarhas-audio-video-linux-feature-tree:
HACK: phy: ti: j721e-wiz: override WIZ settings for DP
ti_config_fragments: add J7 DP to audio_display.cfg
HACK: arm64: dts: add k3-j721e-dp0.dtso
HACK: drm/mhdp: add j721e wrapper
HACK: drm/mhdp: Huge DP fix patch
drm: bridge: add support for Cadence MHDP DPI/DP bridge
dt-bindings: drm/bridge: Document Cadence MHDP bridge bindings
drm/dp: fix link probing for devices supporting DP 1.4+
drm/rockchip: prepare common code for cdns and rk dpi/dp driver
HACK: phy: phy-cadence-dp: Huge PHY fix
phy: add DisplayPort configuration options
phy: Add MIPI D-PHY configuration options
phy: Add configuration interface
phy: Add MIPI D-PHY mode
phy: core: clean up unused ethernet specific phy modes
phy: core: add PHY_MODE_ETHERNET
phy: core: rework phy_set_mode to accept phy mode and submode
phy: add QSGMII and PCIE modes
phy: mvebu-cp110-comphy: convert to use eth phy mode and submode
drm/dp: add extended receiver capability field present bit
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Merge branch 'ti-linux-4.19.y-dp-beta' into audio_display-ti-linux-4.19.y
Early Cadence DisplayPort support for 2019.02
* ti-linux-4.19.y-dp-beta:
HACK: phy: ti: j721e-wiz: override WIZ settings for DP
ti_config_fragments: add J7 DP to audio_display.cfg
HACK: arm64: dts: add k3-j721e-dp0.dtso
HACK: drm/mhdp: add j721e wrapper
HACK: drm/mhdp: Huge DP fix patch
drm: bridge: add support for Cadence MHDP DPI/DP bridge
dt-bindings: drm/bridge: Document Cadence MHDP bridge bindings
drm/dp: fix link probing for devices supporting DP 1.4+
drm/rockchip: prepare common code for cdns and rk dpi/dp driver
HACK: phy: phy-cadence-dp: Huge PHY fix
phy: add DisplayPort configuration options
phy: Add MIPI D-PHY configuration options
phy: Add configuration interface
phy: Add MIPI D-PHY mode
phy: core: clean up unused ethernet specific phy modes
phy: core: add PHY_MODE_ETHERNET
phy: core: rework phy_set_mode to accept phy mode and submode
phy: add QSGMII and PCIE modes
phy: mvebu-cp110-comphy: convert to use eth phy mode and submode
drm/dp: add extended receiver capability field present bit
Early Cadence DisplayPort support for 2019.02
* ti-linux-4.19.y-dp-beta:
HACK: phy: ti: j721e-wiz: override WIZ settings for DP
ti_config_fragments: add J7 DP to audio_display.cfg
HACK: arm64: dts: add k3-j721e-dp0.dtso
HACK: drm/mhdp: add j721e wrapper
HACK: drm/mhdp: Huge DP fix patch
drm: bridge: add support for Cadence MHDP DPI/DP bridge
dt-bindings: drm/bridge: Document Cadence MHDP bridge bindings
drm/dp: fix link probing for devices supporting DP 1.4+
drm/rockchip: prepare common code for cdns and rk dpi/dp driver
HACK: phy: phy-cadence-dp: Huge PHY fix
phy: add DisplayPort configuration options
phy: Add MIPI D-PHY configuration options
phy: Add configuration interface
phy: Add MIPI D-PHY mode
phy: core: clean up unused ethernet specific phy modes
phy: core: add PHY_MODE_ETHERNET
phy: core: rework phy_set_mode to accept phy mode and submode
phy: add QSGMII and PCIE modes
phy: mvebu-cp110-comphy: convert to use eth phy mode and submode
drm/dp: add extended receiver capability field present bit
HACK: phy: ti: j721e-wiz: override WIZ settings for DP
This ugly hack rewrites WIZ registers with hardcoded values to get
DisplayPort working.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
This ugly hack rewrites WIZ registers with hardcoded values to get
DisplayPort working.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
ti_config_fragments: add J7 DP to audio_display.cfg
Add Kconfig options needed for J7 DisplayPort. The firmware will be
built-in to the kernel for early display.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Add Kconfig options needed for J7 DisplayPort. The firmware will be
built-in to the kernel for early display.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
HACK: arm64: dts: add k3-j721e-dp0.dtso
Add DT overlay for enabling J721E DisplayPort. Parts of this really
belong to the SoC dts, parts to the EVM dts. But considering the current
state of DP, it's best to keep this in an DT overlay for easy enabling
and disabling.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Add DT overlay for enabling J721E DisplayPort. Parts of this really
belong to the SoC dts, parts to the EVM dts. But considering the current
state of DP, it's best to keep this in an DT overlay for easy enabling
and disabling.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
HACK: drm/mhdp: add j721e wrapper
Add j721e wrapper for mhdp, which sets up the clock and data muxes.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Add j721e wrapper for mhdp, which sets up the clock and data muxes.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
HACK: drm/mhdp: Huge DP fix patch
This patch does a lots of things to get the DP driver working. Main
changes to the original driver:
* Drop MST support which is not needed (yet)
* Use DP PHY configuration API for proper link training
* runtime PM
* Many small fixes all around
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
This patch does a lots of things to get the DP driver working. Main
changes to the original driver:
* Drop MST support which is not needed (yet)
* Use DP PHY configuration API for proper link training
* runtime PM
* Many small fixes all around
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
drm: bridge: add support for Cadence MHDP DPI/DP bridge
This adds support for Cadence MHDP DPI to DP bridge.
Basically, it takes a DPI stream as input and output it encoded in DP
format. It supports SST and MST modes.
Changes made in the low level driver (cdn-dp-reg.*):
- moved it to from drivers/gpu/drm/rockchip to
drivers/gpu/drm/bridge/cdns-mhdp-common.c and
include/drm/bridge/cdns-mhdp-common.h
- functions for sending/receiving commands are now public
- added functions for reading registers and link training
adjustment
Changes made in RK's driver (cdn-dp-core.*):
- Moved audio_info and audio_pdev fields from cdn_dp_device to
cdns_mhdp_device structure.
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Signed-off-by: Piotr Sroka <piotrs@cadence.com>
Signed-off-by: Damian Kos <dkos@cadence.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
This adds support for Cadence MHDP DPI to DP bridge.
Basically, it takes a DPI stream as input and output it encoded in DP
format. It supports SST and MST modes.
Changes made in the low level driver (cdn-dp-reg.*):
- moved it to from drivers/gpu/drm/rockchip to
drivers/gpu/drm/bridge/cdns-mhdp-common.c and
include/drm/bridge/cdns-mhdp-common.h
- functions for sending/receiving commands are now public
- added functions for reading registers and link training
adjustment
Changes made in RK's driver (cdn-dp-core.*):
- Moved audio_info and audio_pdev fields from cdn_dp_device to
cdns_mhdp_device structure.
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Signed-off-by: Piotr Sroka <piotrs@cadence.com>
Signed-off-by: Damian Kos <dkos@cadence.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
dt-bindings: drm/bridge: Document Cadence MHDP bridge bindings
Document the bindings used for the Cadence MHDP DPI/DP bridge.
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Signed-off-by: Damian Kos <dkos@cadence.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Document the bindings used for the Cadence MHDP DPI/DP bridge.
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Signed-off-by: Damian Kos <dkos@cadence.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
drm/dp: fix link probing for devices supporting DP 1.4+
DP 1.4 introduced a DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT bit in
DP_TRAINING_AUX_RD_INTERVAL register. If set, DPCD registers from
DP_DPCD_REV to DP_ADAPTER_CAP should be retrieved starting from
DP_DPCD_REV_EXTENDED. All registers are copied except DP_DPCD_REV,
DP_MAX_LINK_RATE and DP_DOWNSTREAMPORT_PRESENT which represent the
"true capabilities" of DPRX device.
Original DP_DPCD_REV, DP_MAX_LINK_RATE and DP_DOWNSTREAMPORT_PRESENT
might falsely return lower capabilities to "avoid interoperability
issues with some of the existing DP Source devices that malfunction
when they discover the higher capabilities within those three
registers.".
Before DP 1.4, DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT bit was reserved
and read 0 so it's safe to check against it even if DP revision is
<1.4
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Signed-off-by: Damian Kos <dkos@cadence.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
DP 1.4 introduced a DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT bit in
DP_TRAINING_AUX_RD_INTERVAL register. If set, DPCD registers from
DP_DPCD_REV to DP_ADAPTER_CAP should be retrieved starting from
DP_DPCD_REV_EXTENDED. All registers are copied except DP_DPCD_REV,
DP_MAX_LINK_RATE and DP_DOWNSTREAMPORT_PRESENT which represent the
"true capabilities" of DPRX device.
Original DP_DPCD_REV, DP_MAX_LINK_RATE and DP_DOWNSTREAMPORT_PRESENT
might falsely return lower capabilities to "avoid interoperability
issues with some of the existing DP Source devices that malfunction
when they discover the higher capabilities within those three
registers.".
Before DP 1.4, DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT bit was reserved
and read 0 so it's safe to check against it even if DP revision is
<1.4
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Signed-off-by: Damian Kos <dkos@cadence.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
drm/rockchip: prepare common code for cdns and rk dpi/dp driver
- Extracted common fields from cdn_dp_device to a new cdns_mhdp_device
structure which will be used by two separate drivers later on.
- Moved some datatypes (audio_format, audio_info, vic_pxl_encoding_format,
video_info) from cdn-dp-core.c to cdn-dp-reg.h.
- Changed prefixes from cdn_dp to cdns_mhdp
cdn -> cdns to match the other Cadence's drivers
dp -> mhdp to distinguish it from a "just a DP" as the IP underneath
this registers map can be a HDMI (which is internally different,
but the interface for commands, events is pretty much the same).
- Modified cdn-dp-core.c to use the new driver structure and new function
names.
Signed-off-by: Damian Kos <dkos@cadence.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
- Extracted common fields from cdn_dp_device to a new cdns_mhdp_device
structure which will be used by two separate drivers later on.
- Moved some datatypes (audio_format, audio_info, vic_pxl_encoding_format,
video_info) from cdn-dp-core.c to cdn-dp-reg.h.
- Changed prefixes from cdn_dp to cdns_mhdp
cdn -> cdns to match the other Cadence's drivers
dp -> mhdp to distinguish it from a "just a DP" as the IP underneath
this registers map can be a HDMI (which is internally different,
but the interface for commands, events is pretty much the same).
- Modified cdn-dp-core.c to use the new driver structure and new function
names.
Signed-off-by: Damian Kos <dkos@cadence.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
HACK: phy: phy-cadence-dp: Huge PHY fix
This patch does many things to the original phy-cadence-dp.c driver,
which was effectively unusable. The main changes are:
* Add 19.2 MHz refclock support
* Dynamic PHY configuration via PHY DP ops
* Lots of register setups fixed
* Use reset_control
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
This patch does many things to the original phy-cadence-dp.c driver,
which was effectively unusable. The main changes are:
* Add 19.2 MHz refclock support
* Dynamic PHY configuration via PHY DP ops
* Lots of register setups fixed
* Use reset_control
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
phy: add DisplayPort configuration options
Similar to MIPI D-PHY API, this adds a generic DP API for configuring
DisplayPort PHYs.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Similar to MIPI D-PHY API, this adds a generic DP API for configuring
DisplayPort PHYs.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
phy: Add MIPI D-PHY configuration options
commit 2ed869990e14bc5528aeb00c45e42793c5406637 upstream.
Now that we have some infrastructure for it, allow the MIPI D-PHY phy's to
be configured through the generic functions through a custom structure
added to the generic union.
The parameters added here are the ones defined in the MIPI D-PHY spec, plus
the number of lanes in use. The current set of parameters should cover all
the potential users.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
commit 2ed869990e14bc5528aeb00c45e42793c5406637 upstream.
Now that we have some infrastructure for it, allow the MIPI D-PHY phy's to
be configured through the generic functions through a custom structure
added to the generic union.
The parameters added here are the ones defined in the MIPI D-PHY spec, plus
the number of lanes in use. The current set of parameters should cover all
the potential users.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
phy: Add configuration interface
commit aeaac93ddb28eeacc0dff9c12cb338eb1de7481d upstream.
The phy framework is only allowing to configure the power state of the PHY
using the init and power_on hooks, and their power_off and exit
counterparts.
While it works for most, simple, PHYs supported so far, some more advanced
PHYs need some configuration depending on runtime parameters. These PHYs
have been supported by a number of means already, often by using ad-hoc
drivers in their consumer drivers.
That doesn't work too well however, when a consumer device needs to deal
with multiple PHYs, or when multiple consumers need to deal with the same
PHY (a DSI driver and a CSI driver for example).
So we'll add a new interface, through two funtions, phy_validate and
phy_configure. The first one will allow to check that a current
configuration, for a given mode, is applicable. It will also allow the PHY
driver to tune the settings given as parameters as it sees fit.
phy_configure will actually apply that configuration in the phy itself.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
commit aeaac93ddb28eeacc0dff9c12cb338eb1de7481d upstream.
The phy framework is only allowing to configure the power state of the PHY
using the init and power_on hooks, and their power_off and exit
counterparts.
While it works for most, simple, PHYs supported so far, some more advanced
PHYs need some configuration depending on runtime parameters. These PHYs
have been supported by a number of means already, often by using ad-hoc
drivers in their consumer drivers.
That doesn't work too well however, when a consumer device needs to deal
with multiple PHYs, or when multiple consumers need to deal with the same
PHY (a DSI driver and a CSI driver for example).
So we'll add a new interface, through two funtions, phy_validate and
phy_configure. The first one will allow to check that a current
configuration, for a given mode, is applicable. It will also allow the PHY
driver to tune the settings given as parameters as it sees fit.
phy_configure will actually apply that configuration in the phy itself.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
phy: Add MIPI D-PHY mode
commit c8457828ff481411dca4cdea944c1a0980c862e1 upstream.
MIPI D-PHY is a MIPI standard meant mostly for display and cameras in
embedded systems. Add a mode for it.
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
commit c8457828ff481411dca4cdea944c1a0980c862e1 upstream.
MIPI D-PHY is a MIPI standard meant mostly for display and cameras in
embedded systems. Add a mode for it.
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
phy: core: clean up unused ethernet specific phy modes
commit b3af06451bf859a45a306678e02b12bb676a9687 upstream.
After recent changes PHY_MODE_SGMII, PHY_MODE_2500SGMII, PHY_MODE_QSGMII,
PHY_MODE_10GKR are not used any more and can be removed. Hence - remove
them.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
commit b3af06451bf859a45a306678e02b12bb676a9687 upstream.
After recent changes PHY_MODE_SGMII, PHY_MODE_2500SGMII, PHY_MODE_QSGMII,
PHY_MODE_10GKR are not used any more and can be removed. Hence - remove
them.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
phy: core: add PHY_MODE_ETHERNET
commit 2af8caeee47846a84bc96abc3a72f7c991153040 upstream.
Add new PHY's mode to be used by Ethernet PHY interface drivers or
multipurpose PHYs like serdes. It will be reused in further changes.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
commit 2af8caeee47846a84bc96abc3a72f7c991153040 upstream.
Add new PHY's mode to be used by Ethernet PHY interface drivers or
multipurpose PHYs like serdes. It will be reused in further changes.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
phy: core: rework phy_set_mode to accept phy mode and submode
commit 79a5a18aa9d1062205cdcfa183d4cd5241d1b8da upstream.
Currently the attempt to add support for Ethernet interface mode PHY
(MII/GMII/RGMII) will lead to the necessity of extending enum phy_mode and
duplicate there values from phy_interface_t enum (or introduce more PHY
callbacks) [1]. Both approaches are ineffective and would lead to fast
bloating of enum phy_mode or struct phy_ops in the process of adding more
PHYs for different subsystems which will make them unmaintainable.
As discussed in [1] the solution could be to introduce dual level PHYs mode
configuration - PHY mode and PHY submode. The PHY mode will define generic
PHY type (subsystem - PCIE/ETHERNET/USB_) while the PHY submode - subsystem
specific interface mode. The last is usually already defined in
corresponding subsystem headers (phy_interface_t for Ethernet, enum
usb_device_speed for USB).
This patch is cumulative change which refactors PHY framework code to
support dual level PHYs mode configuration - PHY mode and PHY submode. It
extends .set_mode() callback to support additional parameter "int submode"
and converts all corresponding PHY drivers to support new .set_mode()
callback declaration.
The new extended PHY API
int phy_set_mode_ext(struct phy *phy, enum phy_mode mode, int submode)
is introduced to support dual level PHYs mode configuration and existing
phy_set_mode() API is converted to macros, so PHY framework consumers do
not need to be changed (~21 matches).
[1] http://lkml.kernel.org/r/d63588f6-9ab0-848a-5ad4-8073143bd95d@ti.com
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
commit 79a5a18aa9d1062205cdcfa183d4cd5241d1b8da upstream.
Currently the attempt to add support for Ethernet interface mode PHY
(MII/GMII/RGMII) will lead to the necessity of extending enum phy_mode and
duplicate there values from phy_interface_t enum (or introduce more PHY
callbacks) [1]. Both approaches are ineffective and would lead to fast
bloating of enum phy_mode or struct phy_ops in the process of adding more
PHYs for different subsystems which will make them unmaintainable.
As discussed in [1] the solution could be to introduce dual level PHYs mode
configuration - PHY mode and PHY submode. The PHY mode will define generic
PHY type (subsystem - PCIE/ETHERNET/USB_) while the PHY submode - subsystem
specific interface mode. The last is usually already defined in
corresponding subsystem headers (phy_interface_t for Ethernet, enum
usb_device_speed for USB).
This patch is cumulative change which refactors PHY framework code to
support dual level PHYs mode configuration - PHY mode and PHY submode. It
extends .set_mode() callback to support additional parameter "int submode"
and converts all corresponding PHY drivers to support new .set_mode()
callback declaration.
The new extended PHY API
int phy_set_mode_ext(struct phy *phy, enum phy_mode mode, int submode)
is introduced to support dual level PHYs mode configuration and existing
phy_set_mode() API is converted to macros, so PHY framework consumers do
not need to be changed (~21 matches).
[1] http://lkml.kernel.org/r/d63588f6-9ab0-848a-5ad4-8073143bd95d@ti.com
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
phy: add QSGMII and PCIE modes
commit c2a90025ad09d830c8d8ae69f485eac6aaaa2472 upstream.
Prepare for upcoming phys that'll handle QSGMII or PCIe.
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
commit c2a90025ad09d830c8d8ae69f485eac6aaaa2472 upstream.
Prepare for upcoming phys that'll handle QSGMII or PCIe.
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
phy: mvebu-cp110-comphy: convert to use eth phy mode and submode
commit cccc43b853df4d2663d3890e3365513d55612794 upstream.
Convert mvebu-cp110-comphy PHY driver to use recently introduced
PHY_MODE_ETHERNET and phy_set_mode_ext().
Cc: Russell King - ARM Linux <linux@armlinux.org.uk>
Cc: Maxime Chevallier <maxime.chevallier@bootlin.com>
Cc: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Antoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
commit cccc43b853df4d2663d3890e3365513d55612794 upstream.
Convert mvebu-cp110-comphy PHY driver to use recently introduced
PHY_MODE_ETHERNET and phy_set_mode_ext().
Cc: Russell King - ARM Linux <linux@armlinux.org.uk>
Cc: Maxime Chevallier <maxime.chevallier@bootlin.com>
Cc: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Antoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
drm/dp: add extended receiver capability field present bit
commit 0aeb35ea0e1a4eb01d401b85b541181c796d5c86 upstream.
This bit was added to DP Training Aux RD interval with DP 1.3. Via
descriptiion of the spec this field indicates the panels true
capabilities are described in DPCD address space 02200h through 022FFh.
v2: version comment update
v3: version comment correction, commit message update
v4: white space correction
Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
[manasi: fixup whitespace per Rodrigo's comment]
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180723212735.23893-1-matthew.s.atwood@intel.com
commit 0aeb35ea0e1a4eb01d401b85b541181c796d5c86 upstream.
This bit was added to DP Training Aux RD interval with DP 1.3. Via
descriptiion of the spec this field indicates the panels true
capabilities are described in DPCD address space 02200h through 022FFh.
v2: version comment update
v3: version comment correction, commit message update
v4: white space correction
Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
[manasi: fixup whitespace per Rodrigo's comment]
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180723212735.23893-1-matthew.s.atwood@intel.com
Merge branch 'audio_display-ti-linux-4.19.y' of git.ti.com:~jyrisarha/ti-linux-kernel/jyrisarhas-audio-video-linux-feature-tree into ti-linux-4.19.y
TI-Feature: audio-display
TI-Tree: git@git.ti.com:~jyrisarha/ti-linux-kernel/jyrisarhas-audio-video-linux-feature-tree.git
TI-Branch: audio_display-ti-linux-4.19.y
* 'audio_display-ti-linux-4.19.y' of git.ti.com:~jyrisarha/ti-linux-kernel/jyrisarhas-audio-video-linux-feature-tree:
ti_config_fragments: add config for display sharing
arm64: dts: ti: add display sharing overlay
dt-bindings: ti,j7-dss: New bindings for J721E display-sharing
drm/tidss: do not run pm ops for virtual crtcs
drm/tidss: add support for remote resources
drm/tidss: add support for rpmsg-kdrv display
rpmsg-kdrv: Add support for device virtualization
drm/tidss: static partition of vp and planes
drm/tidss: static partitionning of common areas
drm/tidss: separate functions for common area
drm/tidss: add get_irq() to dispc_ops
Signed-off-by: LCPD Auto Merger <lcpd_integration@list.ti.com>
TI-Feature: audio-display
TI-Tree: git@git.ti.com:~jyrisarha/ti-linux-kernel/jyrisarhas-audio-video-linux-feature-tree.git
TI-Branch: audio_display-ti-linux-4.19.y
* 'audio_display-ti-linux-4.19.y' of git.ti.com:~jyrisarha/ti-linux-kernel/jyrisarhas-audio-video-linux-feature-tree:
ti_config_fragments: add config for display sharing
arm64: dts: ti: add display sharing overlay
dt-bindings: ti,j7-dss: New bindings for J721E display-sharing
drm/tidss: do not run pm ops for virtual crtcs
drm/tidss: add support for remote resources
drm/tidss: add support for rpmsg-kdrv display
rpmsg-kdrv: Add support for device virtualization
drm/tidss: static partition of vp and planes
drm/tidss: static partitionning of common areas
drm/tidss: separate functions for common area
drm/tidss: add get_irq() to dispc_ops
Signed-off-by: LCPD Auto Merger <lcpd_integration@list.ti.com>
Merge branch 'multimedia-ti-linux-4.19.y' of git://git.ti.com/+mm-admins/ti-linux-kernel/multimedia-ti-linux-kernel into ti-linux-4.19.y
TI-Feature: multimedia
TI-Tree: git://git.ti.com/+mm-admins/ti-linux-kernel/multimedia-ti-linux-kernel.git
TI-Branch: multimedia-ti-linux-4.19.y
* 'multimedia-ti-linux-4.19.y' of git://git.ti.com/+mm-admins/ti-linux-kernel/multimedia-ti-linux-kernel:
v4l: videodev2: Add 10bit definitions for NV12 and NV16 color formats
ti_config_fragments: Add multimedia.cfg
drivers: media: platform: Kconfig: Add Video decoder kconfig entries
arm64: dts: ti: k3-j721e-main.dtsi: Add D5520 node
dt-bindings: Add binding for img,d5520-vxd for J721E
Signed-off-by: LCPD Auto Merger <lcpd_integration@list.ti.com>
TI-Feature: multimedia
TI-Tree: git://git.ti.com/+mm-admins/ti-linux-kernel/multimedia-ti-linux-kernel.git
TI-Branch: multimedia-ti-linux-4.19.y
* 'multimedia-ti-linux-4.19.y' of git://git.ti.com/+mm-admins/ti-linux-kernel/multimedia-ti-linux-kernel:
v4l: videodev2: Add 10bit definitions for NV12 and NV16 color formats
ti_config_fragments: Add multimedia.cfg
drivers: media: platform: Kconfig: Add Video decoder kconfig entries
arm64: dts: ti: k3-j721e-main.dtsi: Add D5520 node
dt-bindings: Add binding for img,d5520-vxd for J721E
Signed-off-by: LCPD Auto Merger <lcpd_integration@list.ti.com>
v4l: videodev2: Add 10bit definitions for NV12 and NV16 color formats
The default color formats support only 8bit color depth. This patch
adds 10bit definitions for NV12 and NV16.
Signed-off-by: Amit Makani <amit.makani@ti.com>
Signed-off-by: Sunita Nadampalli <sunitan@ti.com>
Reviewed-by: Benoit Parrot <bparrot@ti.com>
The default color formats support only 8bit color depth. This patch
adds 10bit definitions for NV12 and NV16.
Signed-off-by: Amit Makani <amit.makani@ti.com>
Signed-off-by: Sunita Nadampalli <sunitan@ti.com>
Reviewed-by: Benoit Parrot <bparrot@ti.com>