author | Tom Rini <trini@konsulko.com> | |
Tue, 23 Feb 2021 15:45:55 +0000 (10:45 -0500) | ||
committer | Tom Rini <trini@konsulko.com> | |
Tue, 23 Feb 2021 15:45:55 +0000 (10:45 -0500) |
Xilinx changes for v2021.04-rc3
qspi:
- Support for dual/quad mode
- Fix speed handling
clk:
- Add clock enable function for zynq/zynqmp/versal
gem:
- Enable clock for Versal
- Fix error path
- Fix mdio deregistration path
fpga:
- Fix buffer alignment for ZynqMP
xilinx:
- Fix reset reason clearing in ZynqMP
- Show silicon version in SPL for Zynq/ZynqMP
- Fix DTB selection for ZynqMP
- Rename zc1275 to zcu1275 to match DT name
qspi:
- Support for dual/quad mode
- Fix speed handling
clk:
- Add clock enable function for zynq/zynqmp/versal
gem:
- Enable clock for Versal
- Fix error path
- Fix mdio deregistration path
fpga:
- Fix buffer alignment for ZynqMP
xilinx:
- Fix reset reason clearing in ZynqMP
- Show silicon version in SPL for Zynq/ZynqMP
- Fix DTB selection for ZynqMP
- Rename zc1275 to zcu1275 to match DT name
1 | 2 | |||
---|---|---|---|---|
board/xilinx/common/board.c | patch | | diff1 | | diff2 | | blob | history |
board/xilinx/zynq/board.c | patch | | diff1 | | diff2 | | blob | history |
board/xilinx/zynqmp/zynqmp.c | patch | | diff1 | | diff2 | | blob | history |
drivers/clk/clk_zynq.c | patch | | diff1 | | diff2 | | blob | history |
drivers/spi/zynq_qspi.c | patch | | diff1 | | diff2 | | blob | history |
drivers/spi/zynq_spi.c | patch | | diff1 | | diff2 | | blob | history |
drivers/spi/zynqmp_gqspi.c | patch | | diff1 | | diff2 | | blob | history |
diff --cc board/xilinx/common/board.c
Simple merge
diff --cc board/xilinx/zynq/board.c
Simple merge
diff --cc board/xilinx/zynqmp/zynqmp.c
Simple merge
diff --cc drivers/clk/clk_zynq.c
Simple merge
diff --cc drivers/spi/zynq_qspi.c
Simple merge
diff --cc drivers/spi/zynq_spi.c
Simple merge
diff --cc drivers/spi/zynqmp_gqspi.c
Simple merge