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author | Yaniv Machani <yanivma@ti.com> | |
Tue, 7 Apr 2015 08:39:54 +0000 (11:39 +0300) | ||
committer | Yaniv Machani <yanivma@ti.com> | |
Tue, 7 Apr 2015 08:47:39 +0000 (11:47 +0300) |
Fix Settings value to be 0x0 (opreational settings)
Signed-off-by: Yaniv Machani <yanivma@ti.com>
Signed-off-by: Yaniv Machani <yanivma@ti.com>
wlconf/official_inis/WL1837MOD_INI_FCC_CE.ini | patch | blob | history | |
wlconf/official_inis/WL1837MOD_INI_FCC_CE_JP.ini | patch | blob | history |
diff --git a/wlconf/official_inis/WL1837MOD_INI_FCC_CE.ini b/wlconf/official_inis/WL1837MOD_INI_FCC_CE.ini
index 357f2a8f2912c2ed6e95140c48b3978b8d9f0e1b..82d47eb77fa9c1bbcc7f08ae4e02f1c53e914c6f 100755 (executable)
XTALItrimVal = 04 # 185x Only; Current trimming for XTAL, (Default) 0x4
IO_configuration = 01 # Configure drive strength of all non-fixed IO's (Detailed in 18xx_PG2_spinner_xls_sheets.xml) according to the following table:0x0 - 8mA.0x1 - 4mA (default).0x2 - 6mA.0x3 - 2mA
SDIO_configuration = 00 # [Not Supported] Bit 0: SDIO IB Enable sync; Bit 1: SDIO IB Enable async; Bit 2: SDIO IB Enable BlockMode;
-Settings = 02 # [Not Supported] TI internal - General configuration:Bit 0: N/A ;Bit 1: Enable OCLA over SoC 32K PRAM mode
+Settings = 00 # [Not Supported] TI internal - General configuration:Bit 0: N/A ;Bit 1: Enable OCLA over SoC 32K PRAM mode
RxProfile = 00 # [Not Supported] TI Internal Usage
PwrLimitReference11ABG = 55 # Single absolute output power value (dBm) that serves as the baseline for all perChanPwrLimitArrABG. Range 0..25.5dBm, Resolution 0.1dB;
PwrLimitReference11P = 64 # Single absolute output power value (dBm) that serves as the baseline for all perChanPwrLimitArr11P. Range 0..25.5dBm, Resolution 0.1dB;
diff --git a/wlconf/official_inis/WL1837MOD_INI_FCC_CE_JP.ini b/wlconf/official_inis/WL1837MOD_INI_FCC_CE_JP.ini
index 5c2f1be2d710d44b07d372c02ba71a444b2d6d91..dbc37c3820c05b5ed54f57cb38f1342ec810f8d4 100755 (executable)
XTALItrimVal = 04 # 185x Only; Current trimming for XTAL, (Default) 0x4
IO_configuration = 01 # Configure drive strength of all non-fixed IO's (Detailed in 18xx_PG2_spinner_xls_sheets.xml) according to the following table:0x0 - 8mA.0x1 - 4mA (default).0x2 - 6mA.0x3 - 2mA
SDIO_configuration = 00 # [Not Supported] Bit 0: SDIO IB Enable sync; Bit 1: SDIO IB Enable async; Bit 2: SDIO IB Enable BlockMode;
-Settings = 02 # [Not Supported] TI internal - General configuration:Bit 0: N/A ;Bit 1: Enable OCLA over SoC 32K PRAM mode
+Settings = 00 # [Not Supported] TI internal - General configuration:Bit 0: N/A ;Bit 1: Enable OCLA over SoC 32K PRAM mode
RxProfile = 00 # [Not Supported] TI Internal Usage
PwrLimitReference11ABG = 55 # Single absolute output power value (dBm) that serves as the baseline for all perChanPwrLimitArrABG. Range 0..25.5dBm, Resolution 0.1dB;
PwrLimitReference11P = 64 # Single absolute output power value (dBm) that serves as the baseline for all perChanPwrLimitArr11P. Range 0..25.5dBm, Resolution 0.1dB;