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raw | patch | inline | side by side (from parent 1: 7a37c35)
| author | Eyal Reizer <eyalr@ti.com> | |
| Mon, 23 Mar 2015 11:17:27 +0000 (13:17 +0200) | ||
| committer | Eyal Reizer <eyalr@ti.com> | |
| Mon, 23 Mar 2015 11:17:27 +0000 (13:17 +0200) |
Add a patch adding wilink8 support for the imx6sl-evk platform
when using the imx-3.10.53 kernel from the 1.1.0_ga release
Signed-off-by: Eyal Reizer <eyalr@ti.com>
when using the imx-3.10.53 kernel from the 1.1.0_ga release
Signed-off-by: Eyal Reizer <eyalr@ti.com>
| patches/kernel_patches/imx-3.10.53/0008-imx6sl-evk-add-support-for-wilink8-wlan-and-bluetoot.patch | [new file with mode: 0644] | patch | blob |
diff --git a/patches/kernel_patches/imx-3.10.53/0008-imx6sl-evk-add-support-for-wilink8-wlan-and-bluetoot.patch b/patches/kernel_patches/imx-3.10.53/0008-imx6sl-evk-add-support-for-wilink8-wlan-and-bluetoot.patch
--- /dev/null
+++ b/patches/kernel_patches/imx-3.10.53/0008-imx6sl-evk-add-support-for-wilink8-wlan-and-bluetoot.patch
@@ -0,0 +1,175 @@
+From 92adbbd7e6082277eb1865a7b8b3c24a8cab8fe3 Mon Sep 17 00:00:00 2001
+From: Eyal Reizer <eyalr@ti.com>
+Date: Mon, 23 Mar 2015 13:14:06 +0200
+Subject: [PATCH] imx6sl-evk: add support for wilink8 wlan and bluetooth
+
+* enable uart4 used for bluetooth with wilink8 with flow control
+* configure SD3 to be used for sdio communication to wilink8 wlan
+* configure gpios used for wlan/bt enables and wlan_irq
+* setup voltage regulator used for wl8 wlan power control
+* disable SD1 as it pins are used for BT/WLAN EN, IRQ, BT UART
+
+Signed-off-by: Alexey Berd <alexeyb@ti.com>
+---
+ arch/arm/boot/dts/imx6sl-evk-common.dtsi | 59 +++++++++++++++++++++---------
+ arch/arm/boot/dts/imx6sl.dtsi | 43 ++++------------------
+ 2 files changed, 49 insertions(+), 53 deletions(-)
+
+diff --git a/arch/arm/boot/dts/imx6sl-evk-common.dtsi b/arch/arm/boot/dts/imx6sl-evk-common.dtsi
+index 7e0088f..1e7f7ce 100644
+--- a/arch/arm/boot/dts/imx6sl-evk-common.dtsi
++++ b/arch/arm/boot/dts/imx6sl-evk-common.dtsi
+@@ -11,6 +11,28 @@
+ reg = <0x80000000 0x40000000>;
+ };
+
++ wlan_en_reg: fixedregulator@2 {
++ compatible = "regulator-fixed";
++ regulator-name = "wlan-en-regulator";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ /* WLAN_EN GPIO for this board - Bank5, pin13 */
++ gpio = <&gpio5 13 0>;
++ enable-active-high;
++ };
++
++ kim {
++ compatible = "kim";
++ nshutdown_gpio = <134>; // GPIO5_6 The wl8 driver expects gpio to be an integer, so gpio5_6 is (5-1)*32+6=134
++ dev_name = "/dev/ttymxc3";
++ flow_cntrl = <1>;
++ baud_rate = <3000000>;
++ };
++
++ btwilink {
++ compatible = "btwilink";
++ };
++
+ battery: max8903@0 {
+ compatible = "fsl,max8903-charger";
+ pinctrl-names = "default";
+@@ -452,6 +474,13 @@
+ status = "okay";
+ };
+
++&uart4 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_uart4_1>;
++ status = "okay";
++ fsl,uart-has-rtscts; // enable rts/cts usage on uart4
++};
++
+ &usbotg1 {
+ vbus-supply = <®_usb_otg1_vbus>;
+ pinctrl-names = "default";
+@@ -468,19 +497,6 @@
+ status = "okay";
+ };
+
+-&usdhc1 {
+- pinctrl-names = "default", "state_100mhz", "state_200mhz";
+- pinctrl-0 = <&pinctrl_usdhc1_1>;
+- pinctrl-1 = <&pinctrl_usdhc1_1_100mhz>;
+- pinctrl-2 = <&pinctrl_usdhc1_1_200mhz>;
+- bus-width = <8>;
+- cd-gpios = <&gpio4 7 0>;
+- wp-gpios = <&gpio4 6 0>;
+- keep-power-in-suspend;
+- enable-sdio-wakeup;
+- status = "okay";
+-};
+-
+ &usdhc2 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc2_1>;
+@@ -494,12 +510,21 @@
+ };
+
+ &usdhc3 {
+- pinctrl-names = "default", "state_100mhz", "state_200mhz";
++ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc3_1>;
+- pinctrl-1 = <&pinctrl_usdhc3_1_100mhz>;
+- pinctrl-2 = <&pinctrl_usdhc3_1_200mhz>;
+- cd-gpios = <&gpio3 22 0>;
+ keep-power-in-suspend;
+ enable-sdio-wakeup;
++ vmmc-supply = <&wlan_en_reg>;
++ non-removable; // non-removable is not a variable, the fact it is listed is all that is used by driver
++ cap-power-off-card;
+ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ wlcore: wlcore@0 {
++ compatible = "ti,wlcore";
++ reg = <2>;
++ interrupt-parent = <&gpio5>;
++ interrupts = <8 0>;
++ platform-quirks = <1>;
++ };
+ };
+diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
+index 92ca6c5..260d431 100644
+--- a/arch/arm/boot/dts/imx6sl.dtsi
++++ b/arch/arm/boot/dts/imx6sl.dtsi
+@@ -1158,19 +1158,11 @@
+ uart4 {
+ pinctrl_uart4_1: uart4grp-1 {
+ fsl,pins = <
+- MX6SL_PAD_SD1_DAT4__UART4_RX_DATA 0x1b0b1
+- MX6SL_PAD_SD1_DAT5__UART4_TX_DATA 0x1b0b1
+- MX6SL_PAD_SD1_DAT7__UART4_CTS_B 0x1b0b1
+- MX6SL_PAD_SD1_DAT6__UART4_RTS_B 0x1b0b1
+- >;
+- };
+-
+- pinctrl_uart4dte_1: uart4dtegrp-1 {
+- fsl,pins = <
+- MX6SL_PAD_SD1_DAT5__UART4_RX_DATA 0x1b0b1
+- MX6SL_PAD_SD1_DAT4__UART4_TX_DATA 0x1b0b1
+- MX6SL_PAD_SD1_DAT6__UART4_CTS_B 0x1b0b1
+- MX6SL_PAD_SD1_DAT7__UART4_RTS_B 0x1b0b1
++ MX6SL_PAD_SD1_DAT4__UART4_RX_DATA 0x13059 // used for HOST_HCI_RX
++ MX6SL_PAD_SD1_DAT5__UART4_TX_DATA 0x13059 // used for HOST_HCI_TX
++ MX6SL_PAD_SD1_DAT7__UART4_CTS_B 0x13059 // used for HOST_HCI_RTS, note reversed to TI nomenclature
++ MX6SL_PAD_SD1_DAT6__UART4_RTS_B 0x13059 // used for HOST_HCI_CTS
++ MX6SL_PAD_SD1_DAT3__GPIO5_IO06 0x13059 // used for BT_EN
+ >;
+ };
+ };
+@@ -1325,30 +1317,9 @@
+ MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x17059
+ MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x17059
+ MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x17059
++ MX6SL_PAD_SD1_DAT2__GPIO5_IO13 0x13059 // reserve two pins from sd1 for wl8 gpio, this is pulled low at reset for WL_EN
++ MX6SL_PAD_SD1_DAT1__GPIO5_IO08 0x13059 // this is for wl_irq which driver will configure as an input with a pull down
+ >;
+ };
+-
+- pinctrl_usdhc3_1_100mhz: usdhc3grp-1-100mhz {
+- fsl,pins = <
+- MX6SL_PAD_SD3_CMD__SD3_CMD 0x170b9
+- MX6SL_PAD_SD3_CLK__SD3_CLK 0x100b9
+- MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
+- MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
+- MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
+- MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
+- >;
+- };
+-
+- pinctrl_usdhc3_1_200mhz: usdhc3grp-1-200mhz {
+- fsl,pins = <
+- MX6SL_PAD_SD3_CMD__SD3_CMD 0x170f9
+- MX6SL_PAD_SD3_CLK__SD3_CLK 0x100f9
+- MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
+- MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
+- MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
+- MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
+- >;
+- };
+-
+ };
+ };
+--
+1.7.9.5
+