]> Gitweb @ Texas Instruments - Open Source Git Repositories - git.TI.com/gitweb - wilink8-wlan/wl18xx.git/commitdiff
wl18xx: FW/PHY arguments added for pg2
authorIdo Reis <idor@ti.com>
Mon, 23 Apr 2012 13:49:19 +0000 (16:49 +0300)
committerIdo Reis <idor@ti.com>
Sun, 13 May 2012 17:14:04 +0000 (20:14 +0300)
Added 4 new parameters that are passed by the firmware to PHY.

Parameter Name| Description                    | Type  | Default Value
--------------|--------------------------------|-------|---------------------
Psat          | enable point saturation        | bool  | false
--------------|--------------------------------|-------|---------------------
low_power_val | low tx power value in dBm      | s8    | 0
--------------|--------------------------------|-------|---------------------
med_power_val | medium tx power value in dBm   | s8    | 0xa
--------------|--------------------------------|-------|---------------------
high_power_val| high tx power value in dBm     | s8    | 0x1e

Signed-off-by: Ido Reis <idor@ti.com>
drivers/net/wireless/ti/wl18xx/conf.h
drivers/net/wireless/ti/wl18xx/main.c
drivers/net/wireless/ti/wl18xx/reg.h

index ffad302b6cb760fedac756edbdd19d1f2483ecae..a5937325d1bff9ddc7e7e0388fa440eaf20f67e4 100644 (file)
@@ -44,6 +44,10 @@ struct wl18xx_conf_phy {
        u8 clock_valid_on_wake_up;
        u8 secondary_clock_setting_time;
        u8 pwr_limit_reference_11_abg;
+       u8 Psat;
+       s8 low_power_val;
+       s8 med_power_val;
+       s8 high_power_val;
 };
 
 struct wl18xx_priv_conf {
index 2e0da60d0768ddd0801e933e818bcad0837f7f4a..b4a625efcc201cc4e9315b080bb935884fb79d7f 100644 (file)
@@ -57,6 +57,10 @@ static int high_band_component_type = -1;
 static int pwr_limit_reference_11_abg = -1;
 static bool disable_yield_fix = true;
 static bool enable_pad_last_frame = true;
+static int Psat = -1;
+static int low_power_val = 0xff;
+static int med_power_val = 0xff;
+static int high_power_val = 0xff;
 
 static const u8 wl18xx_rate_to_idx_2ghz[] = {
        /* MCS rates are used only with 11n */
@@ -510,6 +514,10 @@ static struct wl18xx_priv_conf wl18xx_default_priv_conf = {
                .enable_tx_low_pwr_on_siso_rdl  = 0x00,
                .rx_profile                     = 0x00,
                .pwr_limit_reference_11_abg     = 0xc8,
+               .Psat                           = 0,
+               .low_power_val                  = 0x00,
+               .med_power_val                  = 0x0a,
+               .high_power_val                 = 0x1e,
        },
 };
 
@@ -927,6 +935,11 @@ static void wl18xx_set_mac_and_phy(struct wl1271 *wl)
        params.pwr_limit_reference_11_abg =
                phy->pwr_limit_reference_11_abg;
 
+       params.Psat = phy->Psat;
+       params.low_power_val = phy->low_power_val;
+       params.med_power_val = phy->med_power_val;
+       params.high_power_val = phy->high_power_val;
+
        params.board_type = priv->board_type;
 
        wlcore_set_partition(wl, &wl->ptable[PART_PHY_INIT]);
@@ -1398,6 +1411,26 @@ int __devinit wl18xx_probe(struct platform_device *pdev)
                priv->conf.phy.pwr_limit_reference_11_abg =
                        pwr_limit_reference_11_abg;
 
+       if (Psat == -1)
+               Psat = priv->conf.phy.Psat;
+       else
+               priv->conf.phy.Psat = Psat;
+
+       if (low_power_val == 0xff)
+               low_power_val = priv->conf.phy.low_power_val;
+       else
+               priv->conf.phy.low_power_val = low_power_val;
+
+       if (med_power_val == 0xff)
+               med_power_val = priv->conf.phy.med_power_val;
+       else
+               priv->conf.phy.med_power_val = med_power_val;
+
+       if (high_power_val == 0xff)
+               high_power_val = priv->conf.phy.high_power_val;
+       else
+               priv->conf.phy.high_power_val = high_power_val;
+
        if (!checksum_param) {
                wl18xx_ops.set_rx_csum = NULL;
                wl18xx_ops.init_vif = NULL;
@@ -1494,6 +1527,22 @@ module_param(enable_pad_last_frame, bool, S_IRUSR);
 MODULE_PARM_DESC(enable_pad_last_frame, "enable last sdio packet padding: "
                "bool (default is true)");
 
+module_param(Psat, uint, S_IRUSR);
+MODULE_PARM_DESC(Psat, "Psat: u8 "
+                "(default is 0)");
+
+module_param(low_power_val, uint, S_IRUSR);
+MODULE_PARM_DESC(low_power_val, "low_power_val: u8 "
+                "(default is 0x00)");
+
+module_param(med_power_val, uint, S_IRUSR);
+MODULE_PARM_DESC(med_power_val, "med_power_val: u8 "
+                "(default is 0x0a)");
+
+module_param(high_power_val, uint, S_IRUSR);
+MODULE_PARM_DESC(high_power_val, "high_power_val: u8 "
+                "(default is 0x1e)");
+
 MODULE_LICENSE("GPL v2");
 MODULE_AUTHOR("Luciano Coelho <coelho@ti.com>");
 MODULE_FIRMWARE(WL18XX_FW_PG1_NAME);
index 3bb5b7c17a1f8247a6a1ebab606a5ac96fb919d0..ffcb0dff19d6824199a0841da1dcdc47a29163f5 100644 (file)
@@ -257,6 +257,10 @@ struct wl18xx_mac_and_phy_params {
        u8 clock_valid_on_wake_up;
        u8 secondary_clock_setting_time;
        u8 board_type;
+       u8 Psat;
+       s8 low_power_val;
+       s8 med_power_val;
+       s8 high_power_val;
        u8 padding[1];
 } __packed;